coreboot February 2014

coreboot@coreboot.org

52 participants
148 discussions

Re: [coreboot] licensing text
by David Hendricks 12 Feb '14

12 Feb '14

On Tue, Feb 11, 2014 at 11:30 PM, ron minnich <rminnich(a)gmail.com> wrote: > This note is motivated by mr.nuke.me's recent CLs with a short-form GPL > notice in them. I like that notice but I think it needs a tweak, then we > can just use it everywhere. > > I just got done relicensing a different project under the GPL. In the > process I had to discuss wording and such with Eben Moglen. > > Based on his suggestions the other project ended up with a very standard > form which I've adapted for coreboot. > > In each file, we'd have this to replace the current pile of text. > > "This file is part of Coreboot Project. It is subject to the license terms > in the LICENSE file found in the top-level directory of this distribution > and at http://www.coreboot.org/license.html. No part of the Coreboot > Project, including this file, may be copied, modified, propagated, or > distributed except according to the terms contained in the LICENSE file." > Looks good so far! How does it work if one contributes or ports a BSD-licensed piece of code? > > OK, I admit, I painted it because I'm sure the shed will end up with a > different color :-) > Yes, yes, no html formatting in emails etc. etc. but sometimes rules must > be broken. > > I regret that it contains a URL, but in these dark times, one must make > concessions. > > But before we go much further, it's probably a good time to get this > standard short-form text right, before we end up with another pile of > license text in files that doesn't match anything else. > > So, does this work or do people have objections? > > ron > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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licensing text
by ron minnich 12 Feb '14

12 Feb '14

This note is motivated by mr.nuke.me's recent CLs with a short-form GPL notice in them. I like that notice but I think it needs a tweak, then we can just use it everywhere. I just got done relicensing a different project under the GPL. In the process I had to discuss wording and such with Eben Moglen. Based on his suggestions the other project ended up with a very standard form which I've adapted for coreboot. In each file, we'd have this to replace the current pile of text. "This file is part of Coreboot Project. It is subject to the license terms in the LICENSE file found in the top-level directory of this distribution and at http://www.coreboot.org/license.html. No part of the Coreboot Project, including this file, may be copied, modified, propagated, or distributed except according to the terms contained in the LICENSE file." OK, I admit, I painted it because I'm sure the shed will end up with a different color :-) Yes, yes, no html formatting in emails etc. etc. but sometimes rules must be broken. I regret that it contains a URL, but in these dark times, one must make concessions. But before we go much further, it's probably a good time to get this standard short-form text right, before we end up with another pile of license text in files that doesn't match anything else. So, does this work or do people have objections? ron

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Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
by Peter Stuge 11 Feb '14

11 Feb '14

David Hubbard wrote: > > It seems the problem is getting a good debug log with IDSOPT_IDS_ENABLED, You might want to test my patch which exposes the IDS options in Kconfig: git fetch http://review.coreboot.org/coreboot refs/changes/61/5161/1 && \ git checkout FETCH_HEAD This adds an AGESA menu where Integrated Debug Support can be enabled fairly easily. I haven't tested this on actual hardware, but config.h looks good. I would appreciate feedback from real testing; I don't have any AGESA hardware myself. //Peter

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Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
by David Hubbard 11 Feb '14

11 Feb '14

On Mon, Feb 10, 2014 at 11:59 AM, David Hubbard < david.c.hubbard+coreboot(a)gmail.com> wrote: > On Mon, Feb 10, 2014 at 12:16 AM, HacKurx <hackurx(a)gmail.com> wrote: > >> > Please double check IDSOPT_IDS_ENABLED. >> > >> > I have first-hand experience with Rudolf's suggestion to use that >> #define, I >> > have an F2A85-M as well. With IDSOPT_IDS_ENABLED, the serial output is >> > significantly longer. I suspect the build system does not catch the >> change >> > since it's not in menuconfig. >> > >> > Perhaps try 'make clean' followed by all the normal build steps? >> >> I tried several times but I still get the same result. I tried to >> start with clean git, and I've already used "make clean" to no avail. >> If in doubt, do not hesitate to create a rom for me that I test. >> >> So the output now that I can get without this: >> coreboot-4.0-5454-g400c05c-dirty vendredi 7 février 2014, 09:25:15 >> (UTC+0100) starting... >> POST: 0x34 >> BSP Family_Model: 00610f31 >> cpu_init_detectedx = 00000000 >> POST: 0x37 >> agesawrapper_amdinitreset >> >> > Very odd. I had hoped it was something easy. I wonder what differs for > Richland (as Idwer said) so that it doesn't work. My best understanding of > Richland (A10-6800K) is that the memory controller has higher rated speeds > but should work with Trinity AGESA code, since the Trinity AGESA code > already had the ability to overclock to 2133 MHz DDR3. > > It seems the problem is getting a good debug log with IDSOPT_IDS_ENABLED, > and that is baffling. I've attached a coreboot image, but please check the > config and use cbfstool for payloads *before* flashing it. > > David > > > > Here is the .config I used. Also, this is a pretty old version of coreboot > (7bb29d72ab89c300fa899a8cf39803ae8f101ff4). > > The email with the rom attached is too big for the coreboot list, but HacKurx, please let me know if you try out the rom. David

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[RFC] board_status: Add serial log to `serial_console.txt`
by Paul Menzel 10 Feb '14

10 Feb '14

Dear coreboot folks, currently no coreboot messages are stored for boards not supporting CBMEM console (or where this option is disabled (currently by default)) or no coreboot *romstage* messages are stored for boards, where the data cannot be preserved (passed to ramstage). Using the serial (or USB) console all these messages can be captured with no problem, so I propose to just add these captured messages into the file `serial_console.txt`. Of course this file probably contains also the payload and (Linux) kernel log, but I think that is fine. SeaBIOS’ `readserial.py` should be used for capturing the messages as it adds time stamps. Scripting this is going to be hard, as the log is captured on a different system. So for now I propose to add it manually. Thanks, Paul

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Error while creating FILO payload
by Naman Govil 10 Feb '14

10 Feb '14

Hi, I was trying to build a FILO payload to see the functionality of coreboot on qemu. For doing this, I went for building libpayload and FILO in one go using the build.sh script, with default options for both of them. But I got the following error: # configuration written to .config # Building libpayload... Warning: no suitable GCC for armv7. /bin/sh: 1: -print-libgcc-file-name: not found /bin/sh: 1: -print-libgcc-file-name: not found cp: cannot stat 'lib.config': No such file or directory make: *** [/home/naman/coreboot/payloads/filo/build/libpayload/lib/libpayload.a] Error 1 Hence the config file was not created and thus ELF FILO image was not created. Can someone help me understand why this happened and how to rectify it? Also I wanted to know, once the filo.elf payload is ready, how to create a hard disk image containing the Linux kernel and optional initramfs that FILO loads. My ultimate goal is to use this hard-disk image with a coreboot.rom i create. Regards, Naman Govil

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coreboot GSoC 2014
by Marc Jones 10 Feb '14

10 Feb '14

Hello coreboot, We (coreboot) are going to apply for GSoC 2014 again this year. We had a very successful 2013 and I would like to keep the momentum. We need your help to do that. - We are seeking active contributors to mentor students. If you are interested, please update the mentor section on the wiki with your info. http://www.coreboot.org/GSoC - We need good project ideas for students to work on. Anyone can have an idea. Please put them on the Projects page. http://www.coreboot.org/Project_Ideas - We need students! Please direct students to the wiki for information about coreboot. Patrick and I are filling out the application and handling some of the administration pieces. Please contact either one of us if you have any questions or comments. Regards, Marc -- http://se-eng.com

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Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
by Rudolf Marek 10 Feb '14

10 Feb '14

> Perfect thank you for this whole procedure. This is what I obtain: > > My rom (with my vga bios): > coreboot-4.0-5394-gba6b07e Thu Jan 30 19:48:58 CET 2014 starting... > BSP Family_Model: 00610f31 > cpu_init_detectedx = 00000000 > agesawrapper_amdinitreset OK. Please can you enable AGESA debug stuff. It should produce more output. You can do that by uncommenting #define IDSOPT_IDS_ENABLED in mainboard directory OptionsIds.h file. We dont have a menuconfig for that yet. Thanks Rudolf

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Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
by HacKurx 10 Feb '14

10 Feb '14

> Please double check IDSOPT_IDS_ENABLED. > > I have first-hand experience with Rudolf's suggestion to use that #define, I > have an F2A85-M as well. With IDSOPT_IDS_ENABLED, the serial output is > significantly longer. I suspect the build system does not catch the change > since it's not in menuconfig. > > Perhaps try 'make clean' followed by all the normal build steps? I tried several times but I still get the same result. I tried to start with clean git, and I've already used "make clean" to no avail. If in doubt, do not hesitate to create a rom for me that I test. So the output now that I can get without this: coreboot-4.0-5454-g400c05c-dirty vendredi 7 février 2014, 09:25:15 (UTC+0100) starting... POST: 0x34 BSP Family_Model: 00610f31 cpu_init_detectedx = 00000000 POST: 0x37 agesawrapper_amdinitreset Thank -- Best regards, HacKurx www.hackurx.info

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Re: [coreboot] Setting up build environment
by Peter Stuge 10 Feb '14

10 Feb '14

Idwer Vollering wrote: > Actually, this happens when you clone coreboot into a dir where its > parent dir has a dot in it, and compile for any board without touching > the payload defaults: > > python ./tools/acpi_extract.py > /home/idwer/tmp/coreboot.fresh/build/seabios/out/acpi-dsdt.lst > > /home/idwer/tmp/coreboot.fresh/build/seabios/out/acpi-dsdt.off > Traceback (most recent call last): > File "./tools/acpi_extract.py", line 221, in <module> > for line in fileinput.input(): > File "/usr/lib/python2.7/fileinput.py", line 252, in next > line = self.readline() > File "/usr/lib/python2.7/fileinput.py", line 344, in readline > self._file = open(self._filename, self._mode) > IOError: [Errno 2] No such file or directory: > '/home/idwer/tmp/coreboot.fresh/build/seabios/out/acpi-dsdt.lst' The path isn't mangled in any way so the problem must be a dependency in the Makefile. Perhaps there's a pattern substitution which doesn't do greedy patterh matching where that's what would be needed. //Peter

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coreboot February 2014