coreboot November 2014

coreboot@coreboot.org

43 participants
82 discussions

Lenovo T410 Coreboot
by A. Veek 14 Dec '18

14 Dec '18

2 1

Re: [coreboot] No VGA output on e350m1 after flashing. what to do?
by Reiner Luett 12 Sep '17

12 Sep '17

Hi! On 30.06.2013 19:28, Christian Weinz wrote: > Maybe I didn't include the VGA option in the make menuconfig process. > How can I solve this problem? You need to add the VGA Option ROM (VGA BIOS -> Add VGA BIOS image). I've extracted it from the UEFI, but you also could use these: http://www.coreboot.org/index.php?title=ASRock_E350M1&oldid=11114 at the end of the page or you also may be able to use the default AMD fam14 (Persimmon) vbios. You will need to agree to the click through: http://wwwd.amd.com/support/vbioslic.nsf/userverify?openform http://www.coreboot.org/AMD_DB-FT1_PERSIMMON It's a pity, that bios_extract didn't work for now. You could use the AMI Aptio EFI MMTool with wine: http://win-lite.de/benutzer/fernando/BIOS-Tools/AMI_Aptio_EFI_MMTool_v4.50.… You need to extract OntarioEFIVbios with PCI ID 1002,9802 as Option ROM. Regards, Reiner --

5 6

FOSDEM 2015
by Carl-Daniel Hailfinger 29 Jan '15

29 Jan '15

Hi everyone! 31 Jan 2015 and 1 Feb 2015: https://fosdem.org/2015/news/2014-09-19-call-for-participation-part-two/ I would love to be there again and some of you already said they'd try to be there, but I forgot who. Who can be there with me at the booth and when can you be there? A preliminary stand application has already been sent by me to somewhat hit the deadline, but I'd like to fill it in a bit more. Side note: If someone has an interesting topic for a lightning talk, please submit one! Regards, Carl-Daniel

1 2

board-status "binary"
by John Lewis 28 Jan '15

28 Jan '15

Hey y'all, I've modified the board-status script to have as few external dependencies as possible, be a self-extracting, self-running "binary". and removed the time-stamp to keep the number initial commits down. Feel free to tell me how bad it is and how it murdered your children. :P John.

3 6

Re: [coreboot] Memory corruption on Resume from S3 Baytrail
by Stefan Reinauer 10 Dec '14

10 Dec '14

On 11/19/14 11:36 AM, Gailu Singh wrote: > Hi Experts, > > I am using Baytrail SoC board (Bayleybay CRB) and testing > suspend/resume from Linux (kernel 3.10). I can suspend with pm-suspend > and resume with power button; however after resuming I get following > logs in Linux > Corrupted low memory at c0001004 (1004 phys) = 0008eaea > Corrupted low memory at c0001008 (1008 phys) = b0606600 > ... > Corrupted low memory at c00018fc (18fc phys) = 000008ea > > This seems to be caused by coreboot as I do not see these logs if I > use BIOS instead of coreboot. > Is it true that during resume coreboot uses RAM portion already mapped > by Linux and thus corrupting it. How to I avoid the RAM conflict? Looks like coreboot (or FSP) is overwriting this memory with some trampoline code. One (ugly) way to fix this would be to just reserve the space in the memory table. The better way would be to track down where this is actually happening and fix it there. Stefan

2 1

#95: Run coreboot in VirtualBox
by coreboot 10 Dec '14

10 Dec '14

#95: Run coreboot in VirtualBox ---------------------------------+------------------------------------------ Reporter: uwe | Owner: somebody Type: defect | Status: new Priority: minor | Milestone: Component: misc | Version: Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ It would be nice if we could test coreboot images in VirtualBox, see http://virtualbox.org/. VirtualBox does not (yet) provide a simple mechanism to use a different BIOS in their emulated machines (something like "-L" in qemu). Instead the BIOS image (a custom bochs BIOS + LGPL'g VGABIOS) is converted to C code (an array of bytes, or the like) and merged into the VirtualBox executable. The relevant files are {{{ src/VBox/Devices/PC/DevPcBios.cpp bldprogs/bin2c.c }}} if someone want to hack VirtualBox to easily support using coreboot images instead of their usual BIOS. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/95> coreboot <http://www.coreboot.org/>

2 8

Re: [coreboot] IBM x60t test - DSDT is in fact incomplete
by Vladimir 'φ-coder/phcoder' Serbinenko 05 Dec '14

05 Dec '14

On 25.08.2014 04:39, Charles Devereaux wrote: > Hello > > Previously > (http://www.coreboot.org/pipermail/coreboot/2014-July/078320.html) I > mentioned that 3 bugs seemed to be related to the DSDT: > - missing ACPI events when the stylus is inserted/removed How is the OS supposed to react to them? > - errors when trying to make the leds blink with tpacpi details? usecase? > - errors during TPM initialization Some people here would call it a feature. > Ideally, the DSDT should be fixed within coreboot, but this goes beyond > my present abilities. Not true. Just do the same changes to the corresponding *.asl files in coreboot repo and send the patch to gerrit. Other than a layer of preprocessing, it's exactly the same code as you got from disassembly.

2 4

I'll be in cambridge in mid-december
by ron minnich 30 Nov '14

30 Nov '14

Anybody around that area? Might be fun to have a mini-meeting. I'm open on sunday the 14th, monday the 15th, and wed. the 17th. I do want to get in a visit to some of the sights (I have to get back to didcot railway again!) so would like to keep it to one day but ... ron

1 0

Re: [coreboot] where is pnputils?
by Peter Stuge 30 Nov '14

30 Nov '14

Rogelio M. Serrano Jr. wrote: > where do we find pnputils? Maybe in the isapnp distribution package. //Peter

1 0

where is pnputils?
by Rogelio M. Serrano Jr. 30 Nov '14

30 Nov '14

where do we find pnputils?

1 0

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coreboot November 2014