coreboot December 2013

coreboot@coreboot.org

40 participants
108 discussions

Re: [coreboot] coreboot 4772 & PCI ROM's errors and warnings
by Gelip 12 Dec '13

12 Dec '13

I found why appears errors and warnings in debug log and how resolve this: http://www.seabios.org/pipermail/seabios/2013-December/007391.html

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FOSDEM 2014?
by Carl-Daniel Hailfinger 12 Dec '13

12 Dec '13

Hi, is anyone going to visit FOSDEM 2014, and if so, do we have enough people for a stand? Deadline is right now. Regards, Carl-Daniel

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Re: [coreboot] Hack A Day is slamming the PCduino
by Gregg Levine 11 Dec '13

11 Dec '13

Hello! Same here. I may buy one for the novelty of it, then again I may not. But those low brow comments are getting more and more vile...... And David, I'm referring to all of them. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again." On Tue, Dec 10, 2013 at 6:16 PM, David Hubbard <david.c.hubbard+coreboot(a)gmail.com> wrote: > On Tue, Dec 10, 2013 at 3:41 PM, Gregg Levine <gregg.drwho8(a)gmail.com> > wrote: >> >> Hello! >> It is interesting. A number of weeks after Ron brought up the >> existence of this gadget, the site I track the availability of >> discussed the thing. >> >> Basically they are trying to stay out of the argument, but the >> comments are quite negative. It seems the connector across one end >> makes it available for the accessories for the rest of us, have the >> gadget making it an interesting thing to use, but see for yourselves: >> http://hackaday.com/2013/12/09/the-40-x86-arduino/ >> >> as you all will see the comments aren't quite positive in their >> statements. > > > I'm not sure which comment you refer to, but a quick review shows only the > most trite of "negative" comments, along the lines of "ARM is cheaper." > > It would be silly to spend any time discussing things in the hackaday.com > comments anyway. The site itself admits they have a problem with the > low-brow comments. > > But even though I personally have no interest in an x86 clone stuffed into > an arduino package, I can find no actual attacks. The comments are pretty > tame for what typically happens on hackaday. > > Cheers, > David

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Re: [coreboot] Hack A Day is slamming the PCduino
by David Hubbard 11 Dec '13

11 Dec '13

On Tue, Dec 10, 2013 at 3:41 PM, Gregg Levine <gregg.drwho8(a)gmail.com>wrote: > Hello! > It is interesting. A number of weeks after Ron brought up the > existence of this gadget, the site I track the availability of > discussed the thing. > > Basically they are trying to stay out of the argument, but the > comments are quite negative. It seems the connector across one end > makes it available for the accessories for the rest of us, have the > gadget making it an interesting thing to use, but see for yourselves: > http://hackaday.com/2013/12/09/the-40-x86-arduino/ > > as you all will see the comments aren't quite positive in their statements. > I'm not sure which comment you refer to, but a quick review shows only the most trite of "negative" comments, along the lines of "ARM is cheaper." It would be silly to spend any time discussing things in the hackaday.comcomments anyway. The site itself admits they have a problem with the low-brow comments. But even though I personally have no interest in an x86 clone stuffed into an arduino package, I can find no actual attacks. The comments are pretty tame for what typically happens on hackaday. Cheers, David

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Hack A Day is slamming the PCduino
by Gregg Levine 10 Dec '13

10 Dec '13

Hello! It is interesting. A number of weeks after Ron brought up the existence of this gadget, the site I track the availability of discussed the thing. Basically they are trying to stay out of the argument, but the comments are quite negative. It seems the connector across one end makes it available for the accessories for the rest of us, have the gadget making it an interesting thing to use, but see for yourselves: http://hackaday.com/2013/12/09/the-40-x86-arduino/ as you all will see the comments aren't quite positive in their statements. Me? I'll wait until I get one, if I do. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again."

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CBFS hardlinks
by Vladimir 'φ-coder/phcoder' Serbinenko 10 Dec '13

10 Dec '13

Hello, all. Currently coreboot does the mapping from PCIID to the name of option ROM in platform-dependent part (one PCIID is chosen as representative of whole family). Unfortunately SeaBIOS doesn't have this mapping and so doesn't find the right file. Could we perhaps have hardlinks in CBFS and store the same file under several names? The hardlink would have a type 0xf1 (File Link) and would be a file with just 2 fields: 4-byte big-endian offset 4-byte big-endian size which point to the real contents of the file. Should I prepare patches for this approach?

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Re: [coreboot] coreboot Digest, Vol 106, Issue 12
by Christopher Lang 09 Dec '13

09 Dec '13

Hi Peter, I will try a debug kernel set to panic on an oops. Hopefully I can get some better diagnostics. Thanks, Chris On Mon, Dec 9, 2013 at 5:00 AM, <coreboot-request(a)coreboot.org> wrote: > Send coreboot mailing list submissions to > coreboot(a)coreboot.org > > To subscribe or unsubscribe via the World Wide Web, visit > http://www.coreboot.org/mailman/listinfo/coreboot > or, via email, send a message with subject or body 'help' to > coreboot-request(a)coreboot.org > > You can reach the person managing the list at > coreboot-owner(a)coreboot.org > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of coreboot digest..." > > > Today's Topics: > > 1. Re: [Bug 66261] Kernel oops upon reboot from suspend - > Flashed Acer C7 using coreboot (Peter Stuge) > 2. Re: Request to see if Coreboot will work for a Gigabyte BRIX > GB-XM14-1037 (Gerd Hoffmann) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Sun, 8 Dec 2013 18:15:53 +0100 > From: Peter Stuge <peter(a)stuge.se> > To: coreboot(a)coreboot.org > Subject: Re: [coreboot] [Bug 66261] Kernel oops upon reboot from > suspend - Flashed Acer C7 using coreboot > Message-ID: <20131208171553.23607.qmail(a)stuge.se> > Content-Type: text/plain; charset=us-ascii > > Christopher Lang wrote: > > upon resume the kernel oops. The hardware is an Acer C7 Parrot > > board. I have attached the kernel config, coreboot config and > > the kernel oops message log. > > There's no actual kernel log. That log is unfortunately some > uninformative ubuntu thing. > > You'll need a way to capture the kernel log when resuming. > > That may involve a USB debug device or otherwise some hardware > development and soldering. > > > //Peter > > > > ------------------------------ > > Message: 2 > Date: Mon, 09 Dec 2013 08:36:23 +0100 > From: Gerd Hoffmann <kraxel(a)redhat.com> > To: Patrick Georgi <patrick(a)georgi-clan.de> > Cc: Jeremy White <jwhite(a)codeweavers.com>, coreboot(a)coreboot.org > Subject: Re: [coreboot] Request to see if Coreboot will work for a > Gigabyte BRIX GB-XM14-1037 > Message-ID: <1386574583.8684.14.camel(a)nilsson.home.kraxel.org> > Content-Type: text/plain; charset="UTF-8" > > On Sa, 2013-12-07 at 09:54 +0100, Patrick Georgi wrote: > > Am Freitag, den 06.12.2013, 20:05 -0600 schrieb Jeremy White: > > > If I were to change the second paragraph as follows: > > > > > > If your board is not already supported, it will likely take > > > you years of work to port coreboot to operate correctly on it. > > "unless you have experience with firmware level C development and > > good knowledge of the x86 architecture." > > "But then you probably wouldn't read this FAQ but the code to figure > what the support status is ;)" > > cheers, > Gerd > > > > > > ------------------------------ > > _______________________________________________ > coreboot mailing list > coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > > End of coreboot Digest, Vol 106, Issue 12 > ***************************************** >

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Re: [coreboot] INTEL FSP support coreboot-v4.0-4966
by David Woodhouse 09 Dec '13

09 Dec '13

On Sat, 2013-12-07 at 14:38 -0800, ron minnich wrote: > > FSP is a delivery vehicle for binary code. It is designed to be a > binary blob with well-defined entry points. > > So, what you're saying is "the best option for delivering the binary > blob is to be delivered as not a binary blob." > > At that point my head explodes as I try to parse the > contradiction. :-) Some things have to be binary blobs. Because the world will apparently end if we tell someone how to initialise a memory controller. But the *infrastructure* that ties those binary blobs together, that knows how to invoke the individual PEI modules, doesn't have to be binary too. That part could reasonably be done in source code (hell, most of it already exists in EDKII), and could give FSP users a lot more flexibility and debugability. It would also help to combat the trend of including stuff in the FSP that *doesn't* belong there because we *can* have open code that does it (such as graphics setup). -- dwmw2

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Request to see if Coreboot will work for a Gigabyte BRIX GB-XM14-1037
by Jeremy White 09 Dec '13

09 Dec '13

As per the coreboot FAQ [1], am I writing to ask for help with my system. It is a Gigabyte BRIX compact PC GB-XM14-1037. They don't provide a lot of detailed information on the product page: http://www.gigabyte.com/products/product-page.aspx?pid=4606#ov The high level tech specs say: 3rd generation Intel® Celeron® 1037U 1.8GHz Chipset Intel® NM70 I've attached an lspci -tvnnn output to this email. Superiotool (run from today's git) found a ITE IT8728F; the full output is attached. A flashrom (run from today's trunk) output of: flashrom -p internal -V indicates that it's one of MX25L6405(D), MX25L6406E/MX25L6436E, MX25L6445 Full output of flashrom is also attached. A picture of the BIOS chip is attached; the fuzzy reading would suggest it's a MX25L6406E. Side note: does it make sense to amend the FAQ to suggest the '-p internal'? I'm also trying to be available on IRC as nick jwhite if that's easier. Guidance is appreciated. Thanks, Jeremy [1] http://www.coreboot.org/FAQ#Will_coreboot_work_on_my_machine.3F

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Re: [coreboot] [Bug 66261] Kernel oops upon reboot from suspend - Flashed Acer C7 using coreboot
by Peter Stuge 08 Dec '13

08 Dec '13

Christopher Lang wrote: > upon resume the kernel oops. The hardware is an Acer C7 Parrot > board. I have attached the kernel config, coreboot config and > the kernel oops message log. There's no actual kernel log. That log is unfortunately some uninformative ubuntu thing. You'll need a way to capture the kernel log when resuming. That may involve a USB debug device or otherwise some hardware development and soldering. //Peter

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coreboot December 2013