coreboot August 2011

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217 discussions

Patch merged into master: 81713d0 X60/T60: remove obsolete dmi.h
by gerrit＠coreboot.org 26 Aug '11

26 Aug '11

the following patch was just integrated into master: commit 81713d0ca03e3b0c0bd9713bd88440776810b0cb Author: Sven Schnelle <svens(a)stackframe.org> Date: Fri Aug 26 22:18:46 2011 +0200 X60/T60: remove obsolete dmi.h Change-Id: Id0e8bcc1b93a629f0620b84a060d7ff99a82de78 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> See http://review.coreboot.org/174 for details. -gerrit

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Re: [coreboot] coreboot support/port for Asus M3A78-EM matherboard?
by xdrudis 26 Aug '11

26 Aug '11

On Wed, Aug 24, 2011 at 03:37:58PM -0700, SAL-e wrote: > Hi, > > I have old Asus M3A78-EM [1] board inside my HTPC. I'm looking to > speed up the boot process of my HTPC. I have heard that coreboot can > boot directly into Linux or GRUB. I checked the supported list and > found out that my board is not on the list, but at the same time I see > that very similar board Asus M4A78-EM [2] is on and supported well. So > I am wondering how difficult and how much work wold be required to > port coreboot to my board. > I'm not the best one to answer, I've been trying to get my M4A77TD-PRO to boot for one year or more and it only loads FILO, SeaBIOS + GRUB and then linux but linux can't find the disks (the same disk that the three payload read without problem). There's a FAQ which tells you the information you can send to the list to enable people to advise you better: http://www.coreboot.org/FAQ#Will_coreboot_work_on_my_machine.3F >From what I see in the Asus web you link to, the two boards are not that similar. They have the same southbridge but they're different sockets. M3A78-EM is AM2 / AM2+ . I haven't checked the coreboot support for that, but maybe there's some other supported board more similar than M4A78-EM (AM3)? maybe mahogany_fam10 ? It might depend on the CPU model too, or the SuperIO. There's not enough info to tell, but for the existing info it does not seem a very difficult case. The socket and southbridge are used in other supported boards. But it's not going to be compile and install. You'll need spare flash chips, a serial port cable, and define a new board, mostly by copying from elsewhere, testing, etc. As far as I can tell the chips are documented and similar code to copy from should be there. > Secondary question would be if I have to upgrade my HTPC witch board > would be better for using with coreboot: Intel i3-2100T based system > or AMD E-350 based? > In general AMD works much better for coreboot, because AMD contributes much code to coreboot and has detailed documentation published in developer.amd.com . Intel does not help coreboot, usually requires NDAs (from what I hear) for disclosing documentation and it looks more like a guessing game. In particular I hear people are using E-350 with coreboot, although I don't remember the details. > Thank you, > SAL-e > > [1] http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/ > [2] http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/ > > PS. Please replay directly or CC in your reply to me, because I am not > member of the list yet. 10x > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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New patch to review: 81713d0 X60/T60: remove obsolete dmi.h
by Sven Schnelle 26 Aug '11

26 Aug '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/174 -gerrit commit 81713d0ca03e3b0c0bd9713bd88440776810b0cb Author: Sven Schnelle <svens(a)stackframe.org> Date: Fri Aug 26 22:18:46 2011 +0200 X60/T60: remove obsolete dmi.h Change-Id: Id0e8bcc1b93a629f0620b84a060d7ff99a82de78 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/mainboard/lenovo/t60/dmi.h | 29 ----------------------------- src/mainboard/lenovo/x60/dmi.h | 29 ----------------------------- 2 files changed, 0 insertions(+), 58 deletions(-) diff --git a/src/mainboard/lenovo/t60/dmi.h b/src/mainboard/lenovo/t60/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/lenovo/t60/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/lenovo/x60/dmi.h b/src/mainboard/lenovo/x60/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/lenovo/x60/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -};

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New patch to review: a04bb6f Add dirty flag to git describe
by Sven Schnelle 26 Aug '11

26 Aug '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/173 -gerrit commit a04bb6f22eec2673f61fc98c03c224a5f5985b13 Author: Sven Schnelle <svens(a)stackframe.org> Date: Fri Aug 26 21:57:53 2011 +0200 Add dirty flag to git describe git describe knows --dirty, which adds -dirty to the verion number if the tree contains uncommited changes. We should add this flag to make it obvious that the COREBOOT_VERSION might be misleading. This is especially important as this version number is now used in the SMBIOS data structures. Change-Id: If4c608c7455e1bbf0cc530c6299fa00eb0fe4d58 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- Makefile.inc | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index d6f58ed..37e4fb6 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -19,7 +19,7 @@ ####################################################################### # misleadingly named, this is the coreboot version -export KERNELVERSION := $(shell if [ -d "$(top)/.git" -a -f "`which git`" ]; then git describe; else echo unknown; fi) +export KERNELVERSION := $(shell if [ -d "$(top)/.git" -a -f "`which git`" ]; then git describe --dirty; else echo unknown; fi) ####################################################################### # Basic component discovery

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New patch to review: abea90d Add a few more patterns to .gitignore
by Sven Schnelle 26 Aug '11

26 Aug '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/172 -gerrit commit abea90d19c4b6a1120566fc8470fcfd6e8835eab Author: Sven Schnelle <svens(a)stackframe.org> Date: Fri Aug 26 21:48:32 2011 +0200 Add a few more patterns to .gitignore Change-Id: If7c1c6d9a96dd788bacee72b6e18a435069cad6e Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- .gitignore | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore index 78f083c..6ea623e 100644 --- a/.gitignore +++ b/.gitignore @@ -7,3 +7,10 @@ payloads/external/FILO/filo/ payloads/external/SeaBIOS/seabios/ util/crossgcc/tarballs/ util/crossgcc/xgcc/ +*.o +*.elf +*.debug +*.out +*.\# +*.swp +*.bin

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Patch merged into master: 92d0649 Add automatic SMBIOS table generation
by gerrit＠coreboot.org 26 Aug '11

26 Aug '11

the following patch was just integrated into master: commit 92d0649385391dace77950191e3146fb1d38e513 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Aug 14 20:56:34 2011 +0200 Add automatic SMBIOS table generation Change-Id: I0ae16dda8969638a8f70fe1d2e29e992aef3a834 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> See http://review.coreboot.org/152 for details. -gerrit

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Patch set updated: 92d0649 Add automatic SMBIOS table generation
by Sven Schnelle 26 Aug '11

26 Aug '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/152 -gerrit commit 92d0649385391dace77950191e3146fb1d38e513 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Aug 14 20:56:34 2011 +0200 Add automatic SMBIOS table generation Change-Id: I0ae16dda8969638a8f70fe1d2e29e992aef3a834 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- Makefile.inc | 1 + src/Kconfig | 15 ++- src/arch/x86/boot/Makefile.inc | 2 + src/arch/x86/boot/smbios.c | 293 ++++++++++++++++++++++++ src/arch/x86/boot/tables.c | 24 ++- src/include/cbmem.h | 1 + src/include/device/device.h | 6 + src/include/smbios.h | 197 ++++++++++++++++ src/lib/cbmem.c | 1 + src/mainboard/emulation/qemu-x86/northbridge.c | 72 ++++++- src/mainboard/getac/p470/acpi_tables.c | 10 - src/mainboard/getac/p470/dmi.h | 31 --- src/mainboard/ibase/mb899/acpi_tables.c | 10 - src/mainboard/ibase/mb899/dmi.h | 29 --- src/mainboard/intel/d945gclf/acpi_tables.c | 10 - src/mainboard/intel/d945gclf/dmi.h | 29 --- src/mainboard/iwave/iWRainbowG6/acpi_tables.c | 10 - src/mainboard/iwave/iWRainbowG6/dmi.h | 34 --- src/mainboard/kontron/986lcd-m/acpi_tables.c | 10 - src/mainboard/kontron/986lcd-m/dmi.h | 29 --- src/mainboard/lenovo/t60/acpi_tables.c | 10 - src/mainboard/lenovo/x60/acpi_tables.c | 10 - src/mainboard/roda/rk886ex/acpi_tables.c | 10 - src/mainboard/roda/rk886ex/dmi.h | 29 --- src/mainboard/via/vt8454c/acpi_tables.c | 5 - src/mainboard/via/vt8454c/dmi.h | 29 --- 26 files changed, 605 insertions(+), 302 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 6c51a84..d6f58ed 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -127,6 +127,7 @@ $(obj)/build.h: .xcompile printf "#define COREBOOT_VERSION \"$(KERNELVERSION)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_EXTRA_VERSION \"$(COREBOOT_EXTRA_VERSION)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_BUILD \"`LANG= date`\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht printf "\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht diff --git a/src/Kconfig b/src/Kconfig index 7b4f487..f96c903 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -87,7 +87,7 @@ config SCONFIG_GENPARSER help Enable this option if you are working on the sconfig device tree parser and made changes to sconfig.l and - sconfig.y. + sconfig.y. Otherwise, say N. config USE_OPTION_TABLE @@ -304,6 +304,10 @@ config GENERATE_PIRQ_TABLE bool default HAVE_PIRQ_TABLE +config GENERATE_SMBIOS_TABLES + bool + default y + menu "System tables" config WRITE_HIGH_TABLES @@ -342,6 +346,15 @@ config GENERATE_PIRQ_TABLE If unsure, say Y. +config GENERATE_SMBIOS_TABLES + depends on ARCH_X86 + bool "Generate SMBIOS tables" + default y + help + Generate SMBIOS tables for this board. + + If unsure, say Y. + endmenu menu "Payload" diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index d4a377f..3f11c01 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -6,8 +6,10 @@ ramstage-y += tables.c ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S $(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H) +$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c new file mode 100644 index 0000000..e5156d9 --- /dev/null +++ b/src/arch/x86/boot/smbios.c @@ -0,0 +1,293 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include <smbios.h> +#include <console/console.h> +#include <build.h> +#include <device/device.h> +#include <arch/cpu.h> +#include <cpu/x86/name.h> +#include <cbfs_core.h> +#include <arch/byteorder.h> + +static u8 smbios_checksum(u8 *p, u32 length) +{ + u8 ret = 0; + while (length--) + ret += *p++; + return -ret; +} + + +int smbios_add_string(char *start, const char *str) +{ + int i = 1; + char *p = start; + + for(;;) { + if (!*p) { + strcpy(p, str); + p += strlen(str); + *p++ = '\0'; + *p++ = '\0'; + return i; + } + + if (!strcmp(p, str)) + return i; + + p += strlen(p)+1; + i++; + } +} + +int smbios_string_table_len(char *start) +{ + char *p = start; + int i, len = 0; + + while(*p) { + i = strlen(p) + 1; + p += i; + len += i; + } + return len + 1; +} + +static int smbios_cpu_vendor(char *start) +{ + char tmp[13]; + u32 *_tmp = (u32 *)tmp; + struct cpuid_result res = cpuid(0); + + _tmp[0] = res.ebx; + _tmp[1] = res.edx; + _tmp[2] = res.ecx; + tmp[12] = '\0'; + return smbios_add_string(start, tmp); + +} + +static int smbios_processor_name(char *start) +{ + char tmp[49]; + u32 *_tmp = (u32 *)tmp; + struct cpuid_result res; + int i; + + for (i = 0; i < 3; i++) { + res = cpuid(0x80000002 + i); + _tmp[i * 4 + 0] = res.eax; + _tmp[i * 4 + 1] = res.ebx; + _tmp[i * 4 + 2] = res.ecx; + _tmp[i * 4 + 3] = res.edx; + } + + tmp[48] = 0; + return smbios_add_string(start, tmp); +} + +static int smbios_write_type0(unsigned long *current, int handle) +{ + struct cbfs_header *hdr; + struct smbios_type0 *t = (struct smbios_type0 *)*current; + int len = sizeof(struct smbios_type0); + + memset(t, 0, sizeof(struct smbios_type0)); + t->type = SMBIOS_BIOS_INFORMATION; + t->handle = handle; + t->length = len - 2; + + t->vendor = smbios_add_string(t->eos, "coreboot"); + t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE); + t->bios_version = smbios_add_string(t->eos, COREBOOT_VERSION); + + if ((hdr = get_cbfs_header()) != (struct cbfs_header *)0xffffffff) + t->bios_rom_size = (ntohl(hdr->romsize) / 65535) - 1; + t->system_bios_major_release = 4; + t->bios_characteristics = + BIOS_CHARACTERISTICS_PCI_SUPPORTED | +#if CONFIG_CARDBUS_PLUGIN_SUPPORT + BIOS_CHARACTERISTICS_PC_CARD | +#endif + BIOS_CHARACTERISTICS_SELECTABLE_BOOT | + BIOS_CHARACTERISTICS_UPGRADEABLE; + +#if CONFIG_GENERATE_ACPI_TABLES + t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI; +#endif + t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET; + len = t->length + smbios_string_table_len(t->eos); + *current += len; + return len; +} + +static int smbios_write_type1(unsigned long *current, int handle) +{ + struct smbios_type1 *t = (struct smbios_type1 *)*current; + int len = sizeof(struct smbios_type1); + + memset(t, 0, sizeof(struct smbios_type1)); + t->type = SMBIOS_SYSTEM_INFORMATION; + t->handle = handle; + t->length = len - 2; + t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); + t->product_name = smbios_add_string(t->eos, CONFIG_MAINBOARD_PART_NUMBER); + len = t->length + smbios_string_table_len(t->eos); + *current += len; + return len; +} + +static int smbios_write_type3(unsigned long *current, int handle) +{ + struct smbios_type3 *t = (struct smbios_type3 *)*current; + int len = sizeof(struct smbios_type3); + + memset(t, 0, sizeof(struct smbios_type3)); + t->type = SMBIOS_SYSTEM_ENCLOSURE; + t->handle = handle; + t->length = len - 2; + t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); + t->bootup_state = SMBIOS_STATE_SAFE; + t->power_supply_state = SMBIOS_STATE_SAFE; + t->thermal_state = SMBIOS_STATE_SAFE; + t->_type = 3; + t->security_status = SMBIOS_STATE_SAFE; + len = t->length + smbios_string_table_len(t->eos); + *current += len; + return len; +} + +static int smbios_write_type4(unsigned long *current, int handle) +{ + struct cpuid_result res; + struct smbios_type4 *t = (struct smbios_type4 *)*current; + int len = sizeof(struct smbios_type4); + + res = cpuid(1); + + memset(t, 0, sizeof(struct smbios_type4)); + t->type = SMBIOS_PROCESSOR_INFORMATION; + t->handle = handle; + t->length = len - 2; + t->processor_id[0] = res.eax; + t->processor_id[1] = res.edx; + t->processor_manufacturer = smbios_cpu_vendor(t->eos); + t->processor_version = smbios_processor_name(t->eos); + t->processor_family = 0x0c; + t->processor_type = 3; /* System Processor */ + t->processor_upgrade = 0x06; + t->core_count = (res.ebx >> 16) & 0xff; + t->l1_cache_handle = 0xffff; + t->l2_cache_handle = 0xffff; + t->l3_cache_handle = 0xffff; + t->processor_upgrade = 1; + len = t->length + smbios_string_table_len(t->eos); + *current += len; + return len; +} + +static int smbios_write_type32(unsigned long *current, int handle) +{ + struct smbios_type32 *t = (struct smbios_type32 *)*current; + int len = sizeof(struct smbios_type32); + + memset(t, 0, sizeof(struct smbios_type32)); + t->type = SMBIOS_SYSTEM_BOOT_INFORMATION; + t->handle = handle; + t->length = len - 2; + *current += len; + return len; +} + +static int smbios_write_type127(unsigned long *current, int handle) +{ + struct smbios_type127 *t = (struct smbios_type127 *)*current; + int len = sizeof(struct smbios_type127); + + memset(t, 0, sizeof(struct smbios_type127)); + t->type = SMBIOS_END_OF_TABLE; + t->handle = handle; + t->length = len - 2; + *current += len; + return len; +} + +static int smbios_walk_device_tree(device_t tree, int *handle, unsigned long *current) +{ + device_t dev; + int len = 0; + + for(dev = tree; dev; dev = dev->next) { + printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev->chip_ops ? dev->chip_ops->name : ""); + + if (dev->ops && dev->ops->get_smbios_data) + len += dev->ops->get_smbios_data(dev, handle, current); + + if (dev->chip_ops && dev->chip_ops->get_smbios_data) + len += dev->chip_ops->get_smbios_data(dev, handle, current); + } + return len; +} + +unsigned long smbios_write_tables(unsigned long current) +{ + struct smbios_entry *se; + unsigned long tables; + int len, handle = 0; + + current = ALIGN(current, 16); + printk(BIOS_DEBUG, "%s: %08lx\n", __func__, current); + + se = (struct smbios_entry *)current; + current += sizeof(struct smbios_entry); + current = ALIGN(current, 16); + + tables = current; + len = smbios_write_type0(&current, handle++); + len += smbios_write_type1(&current, handle++); + len += smbios_write_type3(&current, handle++); + len += smbios_write_type4(&current, handle++); + len += smbios_write_type32(&current, handle++); + + len += smbios_walk_device_tree(all_devices, &handle, &current); + + len += smbios_write_type127(&current, handle++); + + memset(se, 0, sizeof(struct smbios_entry)); + memcpy(se->anchor, "_SM_", 4); + se->length = sizeof(struct smbios_entry); + se->major_version = 2; + se->minor_version = 7; + se->max_struct_size = 24; + se->struct_count = handle; + memcpy(se->intermediate_anchor_string, "_DMI_", 5); + + se->struct_table_address = (u32)tables; + se->struct_table_length = len; + + se->intermediate_checksum = smbios_checksum((u8 *)se + 0x10, + sizeof(struct smbios_entry) - 0x10); + se->checksum = smbios_checksum((u8 *)se, sizeof(struct smbios_entry)); + return current; +} diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index d816e76..29d2ec0 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -31,6 +31,7 @@ #include <cpu/x86/multiboot.h> #include <cbmem.h> #include <lib.h> +#include <smbios.h> uint64_t high_tables_base = 0; uint64_t high_tables_size; @@ -120,7 +121,7 @@ struct lb_memory *write_tables(void) #endif /* CONFIG_GENERATE_MP_TABLE */ #if CONFIG_GENERATE_ACPI_TABLES == 1 -#define MAX_ACPI_SIZE (47 * 1024) +#define MAX_ACPI_SIZE (45 * 1024) post_code(0x9c); /* Write ACPI tables to F segment and high tables area */ @@ -178,7 +179,28 @@ struct lb_memory *write_tables(void) } #endif +#define MAX_SMBIOS_SIZE 2048 +#if CONFIG_GENERATE_SMBIOS_TABLES + high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE); + if (high_table_pointer) { + unsigned long new_high_table_pointer; + new_high_table_pointer = smbios_write_tables(high_table_pointer); + rom_table_end = ALIGN(rom_table_end, 16); + memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry)); + rom_table_end += sizeof(struct smbios_entry); + + if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) { + printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n"); + } + printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); + } else { + unsigned long new_rom_table_end = smbios_write_tables(rom_table_end); + printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - rom_table_end); + rom_table_end = ALIGN(new_rom_table_end, 16); + } +#endif #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) post_code(0x9d); diff --git a/src/include/cbmem.h b/src/include/cbmem.h index d9ec93c..7c5ec07 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -38,6 +38,7 @@ extern uint64_t high_tables_base, high_tables_size; #define CBMEM_ID_PIRQ 0x49525154 #define CBMEM_ID_MPTABLE 0x534d5054 #define CBMEM_ID_RESUME 0x5245534d +#define CBMEM_ID_SMBIOS 0x534d4254 #define CBMEM_ID_NONE 0x00000000 void cbmem_initialize(void); diff --git a/src/include/device/device.h b/src/include/device/device.h index 42b68f6..a7de0c9 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -16,6 +16,9 @@ struct smbus_bus_operations; struct chip_operations { void (*enable_dev)(struct device *dev); const char *name; +#if CONFIG_GENERATE_SMBIOS_TABLES + int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current); +#endif }; #define CHIP_NAME(X) .name = X, @@ -31,6 +34,9 @@ struct device_operations { void (*enable)(device_t dev); void (*set_link)(device_t dev, unsigned int link); void (*reset_bus)(struct bus *bus); +#if CONFIG_GENERATE_SMBIOS_TABLES + int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current); +#endif const struct pci_operations *ops_pci; const struct smbus_bus_operations *ops_smbus_bus; const struct pci_bus_operations *ops_pci_bus; diff --git a/src/include/smbios.h b/src/include/smbios.h new file mode 100644 index 0000000..f13d621 --- /dev/null +++ b/src/include/smbios.h @@ -0,0 +1,197 @@ +#ifndef SMBIOS_H +#define SMBIOS_H + +#include <types.h> + +unsigned long smbios_write_tables(unsigned long start); +int smbios_add_string(char *start, const char *str); +int smbios_string_table_len(char *start); + +#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7) +#define BIOS_CHARACTERISTICS_PC_CARD (1 << 8) +#define BIOS_CHARACTERISTICS_PNP (1 << 9) +#define BIOS_CHARACTERISTICS_APM (1 << 10) +#define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11) +#define BIOS_CHARACTERISTICS_SHADOW (1 << 12) +#define BIOS_CHARACTERISTICS_BOOT_FROM_CD (1 << 15) +#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16) +#define BIOS_CHARACTERISTICS_BIOS_SOCKETED (1 << 17) + +#define BIOS_EXT1_CHARACTERISTICS_ACPI (1 << 0) +#define BIOS_EXT2_CHARACTERISTICS_TARGET (1 << 2) + +#define SMBIOS_STATE_SAFE 3 +typedef enum { + SMBIOS_BIOS_INFORMATION=0, + SMBIOS_SYSTEM_INFORMATION=1, + SMBIOS_SYSTEM_ENCLOSURE=3, + SMBIOS_PROCESSOR_INFORMATION=4, + SMBIOS_CACHE_INFORMATION=7, + SMBIOS_SYSTEM_SLOTS=9, + SMBIOS_PHYS_MEMORY_ARRAY=16, + SMBIOS_MEMORY_DEVICE=17, + SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS=19, + SMBIOS_SYSTEM_BOOT_INFORMATION=32, + SMBIOS_END_OF_TABLE=127, +} smbios_struct_type_t; + +struct smbios_entry { + u8 anchor[4]; + u8 checksum; + u8 length; + u8 major_version; + u8 minor_version; + u16 max_struct_size; + u8 entry_point_rev; + u8 formwatted_area[5]; + u8 intermediate_anchor_string[5]; + u8 intermediate_checksum; + u16 struct_table_length; + u32 struct_table_address; + u16 struct_count; + u8 smbios_bcd_revision; +} __attribute__((packed)); + +struct smbios_type0 { + u8 type; + u8 length; + u16 handle; + u8 vendor; + u8 bios_version; + u16 bios_start_segment; + u8 bios_release_date; + u8 bios_rom_size; + u64 bios_characteristics; + u8 bios_characteristics_ext1; + u8 bios_characteristics_ext2; + u8 system_bios_major_release; + u8 system_bios_minor_release; + u8 ec_major_release; + u8 ec_minor_release; + char eos[2]; +} __attribute__((packed)); + +struct smbios_type1 { + u8 type; + u8 length; + u16 handle; + u8 manufacturer; + u8 product_name; + u8 version; + u8 serial_number; + u8 uuid[16]; + u8 wakeup_type; + u8 sku; + u8 family; + char eos[2]; +} __attribute__((packed)); + +struct smbios_type3 { + u8 type; + u8 length; + u16 handle; + u8 manufacturer; + u8 _type; + u8 version; + u8 serial_number; + u8 asset_tag_number; + u8 bootup_state; + u8 power_supply_state; + u8 thermal_state; + u8 security_status; + u32 oem_defined; + u8 height; + u8 number_of_power_cords; + u8 element_count; + u8 element_record_length; + char eos[2]; +} __attribute__((packed)); + +struct smbios_type4 { + u8 type; + u8 length; + u16 handle; + u8 socket_designation; + u8 processor_type; + u8 processor_family; + u8 processor_manufacturer; + u32 processor_id[2]; + u8 processor_version; + u8 voltage; + u16 external_clock; + u16 max_speed; + u16 current_speed; + u8 status; + u8 processor_upgrade; + u16 l1_cache_handle; + u16 l2_cache_handle; + u16 l3_cache_handle; + u8 serial_number; + u8 asset_tag; + u8 part_number; + u8 core_count; + u8 core_enabled; + u8 thread_count; + u16 processor_characteristics; + u16 processor_family2; + char eos[2]; +} __attribute__((packed)); + +struct smbios_type16 { + u8 type; + u8 length; + u16 handle; + u8 location; + u8 use; + u8 memory_error_correction; + u32 maximum_capacity; + u16 memory_error_information_handle; + u16 number_of_memory_devices; + u64 extended_maximum_capacity; + char eos[2]; +} __attribute__((packed)); + +struct smbios_type17 { + u8 type; + u8 length; + u16 handle; + u16 phys_memory_array_handle; + u16 memory_error_information_handle; + u16 total_width; + u16 data_width; + u16 size; + u8 form_factor; + u8 device_set; + u8 device_locator; + u8 bank_locator; + u8 memory_type; + u16 type_detail; + u16 speed; + u8 manufacturer; + u8 serial_number; + u8 asset_tag; + u8 part_number; + u8 attributes; + u16 extended_size; + u16 clock_speed; + + char eos[2]; +} __attribute__((packed)); + +struct smbios_type32 { + u8 type; + u8 length; + u16 handle; + u8 reserved[6]; + u8 boot_status; + u8 eos[2]; +} __attribute__((packed)); + +struct smbios_type127 { + u8 type; + u8 length; + u16 handle; + u8 eos[2]; +} __attribute__((packed)); + +#endif diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 5417ab8..eecefcd 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -229,6 +229,7 @@ void cbmem_list(void) case CBMEM_ID_PIRQ: printk(BIOS_DEBUG, "IRQ TABLE "); break; case CBMEM_ID_MPTABLE: printk(BIOS_DEBUG, "SMP TABLE "); break; case CBMEM_ID_RESUME: printk(BIOS_DEBUG, "ACPI RESUME"); break; + case CBMEM_ID_SMBIOS: printk(BIOS_DEBUG, "SMBIOS "); break; default: printk(BIOS_DEBUG, "%08x ", cbmem_toc[i].id); } printk(BIOS_DEBUG, "%08llx ", cbmem_toc[i].base); diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c index 1899648..3f22437 100644 --- a/src/mainboard/emulation/qemu-x86/northbridge.c +++ b/src/mainboard/emulation/qemu-x86/northbridge.c @@ -9,6 +9,7 @@ #include <bitops.h> #include "chip.h" #include <delay.h> +#include <smbios.h> #if CONFIG_WRITE_HIGH_TABLES==1 #include <cbmem.h> @@ -19,18 +20,24 @@ #define HIGH_RAM_ADDR 0x35 #define LOW_RAM_ADDR 0x34 -static void cpu_pci_domain_set_resources(device_t dev) +static unsigned long qemu_get_memory_size(void) { - u32 pci_tolm = find_pci_tolm(dev->link_list); - unsigned long tomk = 0, tolmk; - int idx; - + unsigned long tomk; outb (HIGH_RAM_ADDR, CMOS_ADDR_PORT); tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14; outb (LOW_RAM_ADDR, CMOS_ADDR_PORT); tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6; tomk += 16 * 1024; + return tomk; +} + +static void cpu_pci_domain_set_resources(device_t dev) +{ + u32 pci_tolm = find_pci_tolm(dev->link_list); + unsigned long tomk = 0, tolmk; + int idx; + tomk = qemu_get_memory_size(); printk(BIOS_DEBUG, "Detected %lu Kbytes (%lu MiB) RAM.\n", tomk, tomk / 1024); @@ -80,12 +87,67 @@ static void cpu_pci_domain_read_resources(struct device *dev) IORESOURCE_ASSIGNED; } +#if CONFIG_GENERATE_SMBIOS_TABLES +static int qemu_get_smbios_data16(int handle, unsigned long *current) +{ + struct smbios_type16 *t = (struct smbios_type16 *)*current; + int len = sizeof(struct smbios_type16); + + memset(t, 0, sizeof(struct smbios_type16)); + t->type = SMBIOS_PHYS_MEMORY_ARRAY; + t->handle = handle; + t->length = len - 2; + t->location = 3; /* Location: System Board */ + t->use = 3; /* System memory */ + t->memory_error_correction = 3; /* No error correction */ + t->maximum_capacity = qemu_get_memory_size(); + *current += len; + return len; +} + +static int qemu_get_smbios_data17(int handle, int parent_handle, unsigned long *current) +{ + struct smbios_type17 *t = (struct smbios_type17 *)*current; + int len; + + memset(t, 0, sizeof(struct smbios_type17)); + t->type = SMBIOS_MEMORY_DEVICE; + t->handle = handle; + t->phys_memory_array_handle = parent_handle; + t->length = sizeof(struct smbios_type17) - 2; + t->size = qemu_get_memory_size() / 1024; + t->data_width = 64; + t->total_width = 64; + t->form_factor = 9; /* DIMM */ + t->device_locator = smbios_add_string(t->eos, "Virtual"); + t->memory_type = 0x12; /* DDR */ + t->type_detail = 0x80; /* Synchronous */ + t->speed = 200; + t->clock_speed = 200; + t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); + len = t->length + smbios_string_table_len(t->eos); + *current += len; + return len; +} + +static int qemu_get_smbios_data(device_t dev, int *handle, unsigned long *current) +{ + int len; + len = qemu_get_smbios_data16(*handle, current); + len += qemu_get_smbios_data17(*handle+1, *handle, current); + *handle += 2; + return len; +} +#endif static struct device_operations pci_domain_ops = { .read_resources = cpu_pci_domain_read_resources, .set_resources = cpu_pci_domain_set_resources, .enable_resources = NULL, .init = NULL, .scan_bus = pci_domain_scan_bus, +#if CONFIG_GENERATE_SMBIOS_TABLES + .get_smbios_data = qemu_get_smbios_data, +#endif }; static void enable_dev(struct device *dev) diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index 649dff6..46e7b88 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -29,7 +29,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "dmi.h" extern unsigned char AmlCode[]; @@ -355,15 +354,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/getac/p470/dmi.h b/src/mainboard/getac/p470/dmi.h deleted file mode 100644 index fde4d8a..0000000 --- a/src/mainboard/getac/p470/dmi.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static const u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/ibase/mb899/acpi_tables.c b/src/mainboard/ibase/mb899/acpi_tables.c index 0089e21..dbe1e91 100644 --- a/src/mainboard/ibase/mb899/acpi_tables.c +++ b/src/mainboard/ibase/mb899/acpi_tables.c @@ -28,7 +28,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -258,15 +257,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/ibase/mb899/dmi.h b/src/mainboard/ibase/mb899/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/ibase/mb899/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c index bc0a790..f7e13e9 100644 --- a/src/mainboard/intel/d945gclf/acpi_tables.c +++ b/src/mainboard/intel/d945gclf/acpi_tables.c @@ -28,7 +28,6 @@ #include <device/pci_ids.h> #include <cpu/x86/msr.h> #include <arch/ioapic.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -245,15 +244,6 @@ unsigned long write_acpi_tables(unsigned long start) acpi_add_table(rsdp, ssdt); printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/intel/d945gclf/dmi.h b/src/mainboard/intel/d945gclf/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/intel/d945gclf/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c index 92874bc..8c8e788 100644 --- a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c +++ b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c @@ -28,7 +28,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -264,15 +263,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/iwave/iWRainbowG6/dmi.h b/src/mainboard/iwave/iWRainbowG6/dmi.h deleted file mode 100644 index d076dff..0000000 --- a/src/mainboard/iwave/iWRainbowG6/dmi.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x2d, 0x1f, 0x02, 0x03, 0x51, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0xeb, 0xa8, 0x03, 0xa0, 0xff, 0x0f, 0x00, - 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, - 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, - 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, - 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c index 0089e21..dbe1e91 100644 --- a/src/mainboard/kontron/986lcd-m/acpi_tables.c +++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c @@ -28,7 +28,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -258,15 +257,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/kontron/986lcd-m/dmi.h b/src/mainboard/kontron/986lcd-m/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/kontron/986lcd-m/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c index 3742c20..fa135a6 100644 --- a/src/mainboard/lenovo/t60/acpi_tables.c +++ b/src/mainboard/lenovo/t60/acpi_tables.c @@ -29,7 +29,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); /* Enable Dummy DCC ON# for DVI */ diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c index 3742c20..fa135a6 100644 --- a/src/mainboard/lenovo/x60/acpi_tables.c +++ b/src/mainboard/lenovo/x60/acpi_tables.c @@ -29,7 +29,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); /* Enable Dummy DCC ON# for DVI */ diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c index 3742c20..fa135a6 100644 --- a/src/mainboard/roda/rk886ex/acpi_tables.c +++ b/src/mainboard/roda/rk886ex/acpi_tables.c @@ -29,7 +29,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "dmi.h" extern const unsigned char AmlCode[]; #if CONFIG_HAVE_ACPI_SLIC @@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start) ALIGN_CURRENT; printk(BIOS_DEBUG, "current = %lx\n", current); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); -#if CONFIG_WRITE_HIGH_TABLES == 1 - memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); - current += DMI_TABLE_SIZE; - ALIGN_CURRENT; -#endif - printk(BIOS_INFO, "ACPI: done.\n"); /* Enable Dummy DCC ON# for DVI */ diff --git a/src/mainboard/roda/rk886ex/dmi.h b/src/mainboard/roda/rk886ex/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/roda/rk886ex/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -}; diff --git a/src/mainboard/via/vt8454c/acpi_tables.c b/src/mainboard/via/vt8454c/acpi_tables.c index 434bf87..03bacc3 100644 --- a/src/mainboard/via/vt8454c/acpi_tables.c +++ b/src/mainboard/via/vt8454c/acpi_tables.c @@ -26,7 +26,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include "dmi.h" extern const unsigned char AmlCode[]; @@ -194,10 +193,6 @@ unsigned long write_acpi_tables(unsigned long start) acpi_create_fadt(fadt, facs, dsdt); acpi_add_table(rsdp, fadt); - - printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n"); - memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); - printk(BIOS_INFO, "ACPI: done.\n"); return current; } diff --git a/src/mainboard/via/vt8454c/dmi.h b/src/mainboard/via/vt8454c/dmi.h deleted file mode 100644 index 96b5873..0000000 --- a/src/mainboard/via/vt8454c/dmi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define DMI_TABLE_SIZE 0x55 - -static u8 dmi_table[DMI_TABLE_SIZE] = { - 0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00, - 0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00, - 0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, - 0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32, - 0x30, 0x30, 0x38, 0x00, 0x00 -};

1 0

Re: [coreboot] Fwd: [PATCH v3 1/1] libpayload: add support for finding and parsing Coreboot BIOS tables
by Andrew Morton 26 Aug '11

26 Aug '11

On Sun, 21 Aug 2011 17:01:28 -0700 Philip Prindeville <philipp(a)redfish-solutions.com> wrote: > Attached. oookay. I'll await a formal patch with all the cc's, etc. As for the "upstream" version: if/when this patch is merged, it *is* the upstream version. The coreboot tree will need to drop the old version and migrate to the new. Please be sure to carefully describe the background to the code within the final changelog. Lots of people won't even know what coreboot *is*. Spell this out completely and be sure to tell the kernel developers about the value of this patch to our users.

4 4

Patch merged into master: 8273028 Minor ma785gmt clean-up
by gerrit＠coreboot.org 25 Aug '11

25 Aug '11

the following patch was just integrated into master: commit 82730285b1427ed6f95abbbaeecba8cffcde83f5 Author: Alec Ari <neotheuser(a)ymail.com> Date: Sun Aug 21 22:09:53 2011 -0500 Minor ma785gmt clean-up Change-Id: I9e889a6c475fb3283fa11f8b3de5baaf54235589 Signed-off-by: Alec Ari <neotheuser(a)ymail.com> See http://review.coreboot.org/167 for details. -gerrit

1 0

Patch merged into master: d402be7 Fix up various dsdt.asl files
by gerrit＠coreboot.org 25 Aug '11

25 Aug '11

the following patch was just integrated into master: commit d402be72762f60d4b60edf5662d31a14eccb03ec Author: Alec Ari <neotheuser(a)ymail.com> Date: Sun Aug 21 21:52:41 2011 -0500 Fix up various dsdt.asl files Change-Id: I46eb27847deb3a903ac9af347992a9954e50ff6e Signed-off-by: Alec Ari <neotheuser(a)ymail.com> See http://review.coreboot.org/166 for details. -gerrit

1 0

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coreboot August 2011