coreboot October 2011

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Patch set updated for coreboot: d39d04c Fix usb debug dongle support
by Sven Schnelle 30 Oct '11

30 Oct '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/355 -gerrit commit d39d04c45dd0a66b7d7349fd38012abe4a5b76bf Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Oct 30 09:57:35 2011 +0100 Fix usb debug dongle support - move enable_usbdebug() declaration to usbdebug.h - reinitialize debug driver in ramstage, as copying the data structure from romstage doesn't work right now. This way of copying data from romstage to ramstage is really board/cpu specific, and is likely to break often. So don't do it. Change-Id: I394678ded6679c1803e29eb691b926182bdcab68 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/console/console.c | 4 ++++ src/console/usbdebug_console.c | 10 +--------- src/include/ehci.h | 3 ++- src/include/usbdebug.h | 5 ++++- src/lib/Makefile.inc | 1 + src/lib/usbdebug.c | 6 +----- src/southbridge/amd/sb600/Makefile.inc | 4 +++- src/southbridge/amd/sb600/sb600.h | 1 - src/southbridge/amd/sb700/Makefile.inc | 4 +++- src/southbridge/amd/sb700/sb700.h | 2 -- src/southbridge/amd/sb800/Makefile.inc | 4 +++- src/southbridge/amd/sb800/sb800.h | 1 - src/southbridge/intel/i82801gx/Makefile.inc | 2 ++ src/southbridge/intel/i82801gx/i82801gx.h | 1 - src/southbridge/nvidia/ck804/Makefile.inc | 4 +++- src/southbridge/nvidia/ck804/ck804.h | 1 - src/southbridge/nvidia/mcp55/Makefile.inc | 4 +++- src/southbridge/nvidia/mcp55/mcp55.h | 1 - src/southbridge/sis/sis966/Makefile.inc | 5 ++++- src/southbridge/sis/sis966/sis966.h | 4 ---- 20 files changed, 34 insertions(+), 33 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index a73616e..325170d 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -30,6 +30,10 @@ #include <console/ne2k.h> #endif +#if CONFIG_USBDEBUG +#include <usbdebug.h> +#endif + #ifndef __PRE_RAM__ #include <string.h> #include <pc80/mc146818rtc.h> diff --git a/src/console/usbdebug_console.c b/src/console/usbdebug_console.c index 2270ceb..a624b9d 100644 --- a/src/console/usbdebug_console.c +++ b/src/console/usbdebug_console.c @@ -50,15 +50,7 @@ unsigned get_ehci_debug(void) static void dbgp_init(void) { - struct ehci_debug_info *dbg_infox; - - /* At this point, all we have to do is copy the fixed address - * debug_info data structure to our version defined above. */ - - dbg_infox = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); + usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, &dbg_info); } static void dbgp_tx_byte(unsigned char data) diff --git a/src/include/ehci.h b/src/include/ehci.h index 4b8c94c..29347f9 100644 --- a/src/include/ehci.h +++ b/src/include/ehci.h @@ -25,6 +25,7 @@ #define EHCI_BAR_INDEX 0x10 +#ifndef __ROMCC__ /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ /* Section 2.2 Host Controller Capability Registers */ @@ -199,5 +200,5 @@ struct ehci_dbg_port { u32 address; #define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) } __attribute__ ((packed)); - +#endif #endif diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 281ccde..a7ab21f 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -32,6 +32,8 @@ struct ehci_debug_info { u32 endpoint_in; }; +#ifndef __ROMCC__ +void enable_usbdebug(unsigned int port); int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); void set_ehci_base(unsigned ehci_base); @@ -40,5 +42,6 @@ unsigned get_ehci_debug(void); void set_debug_port(unsigned port); int early_usbdebug_init(void); void usbdebug_tx_byte(unsigned char data); - +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info); +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index b207ffe..432e24e 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -40,5 +40,6 @@ driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c smm-y += memcpy.c cbfs.c memset.c memcmp.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c +smm-$(CONFIG_USBDEBUG) += usbdebug.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index d022d2f..6b75acf 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -238,7 +238,6 @@ int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) dbg_info->endpoint_in, data, size); } -#ifdef __PRE_RAM__ static void dbgp_mdelay(int ms) { int i; @@ -356,7 +355,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) } -static int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; struct ehci_regs *ehci_regs; @@ -566,8 +565,6 @@ next_debug_port: return -10; } -// **** This part is probably x86 specific and used by romstage.c **** // - int early_usbdebug_init(void) { struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) @@ -588,4 +585,3 @@ void usbdebug_tx_byte(unsigned char data) dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } -#endif diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc index b590361..d7451d2 100644 --- a/src/southbridge/amd/sb600/Makefile.inc +++ b/src/southbridge/amd/sb600/Makefile.inc @@ -8,4 +8,6 @@ driver-y += hda.c driver-y += ac97.c driver-y += pci.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h index 97a7ad2..629f389 100644 --- a/src/southbridge/amd/sb600/sb600.h +++ b/src/southbridge/amd/sb600/sb600.h @@ -40,5 +40,4 @@ void sb600_enable(device_t dev); void sb600_lpc_port80(void); void sb600_pci_port80(void); -void enable_usbdebug(unsigned int port); #endif /* SB600_H */ diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc index e174e8b..49caedf 100755 --- a/src/southbridge/amd/sb700/Makefile.inc +++ b/src/southbridge/amd/sb700/Makefile.inc @@ -10,7 +10,9 @@ driver-y += pci.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c romstage-y += reset.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_setup.c romstage-y += smbus.c diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 794dd96..165c72d 100755 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -82,8 +82,6 @@ int acpi_is_wakeup_early(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); - u32 __attribute__ ((weak)) get_sbdn(u32 bus); void __attribute__((weak)) enable_fid_change_on_sb(u32 sbbusn, u32 sbdn); #endif /* SB700_H */ diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc index 7a42fdd..38b7d50 100644 --- a/src/southbridge/amd/sb800/Makefile.inc +++ b/src/southbridge/amd/sb800/Makefile.inc @@ -9,4 +9,6 @@ driver-y += pci.c driver-y += pcie.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index d7a4a38..ffe7aeb 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -58,7 +58,6 @@ void sb800_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); #else void sb800_enable(device_t dev); void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index d3a731b..c23a314 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -38,4 +38,6 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c romstage-y += early_smbus.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c +ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +smm-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 2ceb215..8fb5b92 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,7 +46,6 @@ extern void i82801gx_enable(device_t dev); void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); #endif -void enable_usbdebug(unsigned int port); #endif #define MAINBOARD_POWER_OFF 0 diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index b1577f5..debe227 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -15,7 +15,9 @@ ramstage-y += reset.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_smbus.c chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h index e7bf021..3e8b1f2 100644 --- a/src/southbridge/nvidia/ck804/ck804.h +++ b/src/southbridge/nvidia/ck804/ck804.h @@ -24,7 +24,6 @@ #include "chip.h" void ck804_enable(device_t dev); -void enable_usbdebug(unsigned int port); extern struct pci_operations ck804_pci_ops; diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index a59e148..26844da 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -15,7 +15,9 @@ driver-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h index 3173c50..aa52886 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.h +++ b/src/southbridge/nvidia/mcp55/mcp55.h @@ -35,7 +35,6 @@ extern struct pci_operations mcp55_pci_ops; #else #if !defined(__ROMCC__) void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -void enable_usbdebug(unsigned int port); #endif #endif diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index f796047..76dd31a 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -9,7 +9,10 @@ driver-y += sata.c driver-y += pcie.c driver-y += aza.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c + +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h index d6624b3..2c7c7b8 100644 --- a/src/southbridge/sis/sis966/sis966.h +++ b/src/southbridge/sis/sis966/sis966.h @@ -39,8 +39,4 @@ void sis966_enable(device_t dev); #endif -#if defined(__PRE_RAM__) && !defined(__ROMCC__) -void enable_usbdebug(unsigned int port); -#endif - #endif /* SIS966_H */

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Patch set updated for coreboot: f6e9e81 remove usbdebug.h include from mainboard/romstage code
by Sven Schnelle 30 Oct '11

30 Oct '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/354 -gerrit commit f6e9e81303cac8567ed2fa9e391020dc501fc4d3 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Oct 30 08:49:43 2011 +0100 remove usbdebug.h include from mainboard/romstage code No romstage is supposed to use usbdebug functions/defines directly, so remove all those includes. The usb code is now called and setup from console code. Change-Id: I9b1120d96f5993303d6b302accc86e14a91f7a9f Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/mainboard/amd/bimini_fam10/romstage.c | 1 - src/mainboard/amd/dbm690t/romstage.c | 1 - src/mainboard/amd/mahogany/romstage.c | 1 - src/mainboard/amd/mahogany_fam10/romstage.c | 1 - src/mainboard/amd/pistachio/romstage.c | 1 - src/mainboard/amd/tilapia_fam10/romstage.c | 1 - src/mainboard/asrock/939a785gmh/romstage.c | 1 - src/mainboard/asus/m2n-e/romstage.c | 1 - src/mainboard/asus/m4a78-em/romstage.c | 1 - src/mainboard/asus/m4a785-m/romstage.c | 1 - src/mainboard/getac/p470/romstage.c | 1 - src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 1 - src/mainboard/gigabyte/m57sli/romstage.c | 1 - src/mainboard/gigabyte/ma785gmt/romstage.c | 1 - src/mainboard/gigabyte/ma78gm/romstage.c | 1 - src/mainboard/ibase/mb899/romstage.c | 1 - src/mainboard/iei/kino-780am2-fam10/romstage.c | 1 - src/mainboard/intel/d945gclf/romstage.c | 1 - src/mainboard/jetway/pa78vm5/romstage.c | 1 - src/mainboard/kontron/986lcd-m/romstage.c | 1 - src/mainboard/kontron/kt690/romstage.c | 1 - src/mainboard/lenovo/t60/romstage.c | 1 - src/mainboard/lenovo/x60/romstage.c | 1 - src/mainboard/msi/ms7260/romstage.c | 1 - src/mainboard/msi/ms9652_fam10/romstage.c | 1 - src/mainboard/nvidia/l1_2pvv/romstage.c | 1 - src/mainboard/roda/rk886ex/romstage.c | 1 - src/mainboard/supermicro/h8scm_fam10/romstage.c | 1 - src/mainboard/technexion/tim5690/romstage.c | 1 - src/mainboard/technexion/tim8690/romstage.c | 1 - src/mainboard/tyan/s2912/romstage.c | 1 - src/mainboard/tyan/s2912_fam10/romstage.c | 1 - 32 files changed, 0 insertions(+), 32 deletions(-) diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 175325e..732e033 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index f119ec9..66637a8 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -39,7 +39,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/early_serial.c" #include <spd.h> -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 5c9d538..104652a 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -39,7 +39,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 4d26ca3..04a9e45 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index ee00c13..5d6e7a8 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -33,7 +33,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include <spd.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 48b13be..52cab42 100755 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index bd45c16..3183c1c 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -40,7 +40,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627dhg/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c index db3c614..e820a79 100644 --- a/src/mainboard/asus/m2n-e/romstage.c +++ b/src/mainboard/asus/m2n-e/romstage.c @@ -34,7 +34,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index b14a7c6..76449cb 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index b14a7c6..76449cb 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index 0e05af1..6fa2620 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -27,7 +27,6 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> -#include <usbdebug.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 5bc1fbf..0ba4c59 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -35,7 +35,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/sis/sis966/sis966.h" diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 2a9c6ee..16d2453 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index fcf023b..4572169 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -39,7 +39,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 80b8d90..bd81e67 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index 11f48a1..148587d 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -30,7 +30,6 @@ #include "superio/winbond/w83627ehg/w83627ehg.h" #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "superio/winbond/w83627ehg/early_serial.c" #include "northbridge/intel/i945/i945.h" diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 58b1845..54b364a 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/fintek/f71859/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index d1ead82..a4cb3b2 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -30,7 +30,6 @@ #include "superio/smsc/lpc47m15x/lpc47m15x.h" #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "superio/smsc/lpc47m15x/early_serial.c" #include "northbridge/intel/i945/i945.h" diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 11bda6a..b2d4ecb 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -44,7 +44,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/fintek/f71863fg/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 6d9f81e..df25fd4 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -27,7 +27,6 @@ #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> -#include <usbdebug.h> #include "superio/winbond/w83627thg/w83627thg.h" #include <pc80/mc146818rtc.h> #include "option_table.h" diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 0cd523a..f2525e3 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -41,7 +41,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627dhg/early_serial.c" -#include <usbdebug.h> #include <cpu/amd/mtrr.h> #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 13faee2..046e354 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -32,7 +32,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 2aa506f..44cde72 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -32,7 +32,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index b587303..b384119 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -34,7 +34,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 2add54b..fc8120b 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -31,7 +31,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index ef329d3..94aa14a 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 2af7c2b..d75d33f 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -31,7 +31,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 6e6e394..70b3a04 100755 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 515a1b8..5934938 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -40,7 +40,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index eb6eca7..97bc4e1 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -40,7 +40,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 52a100c..67ce286 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -35,7 +35,6 @@ #include <console/console.h> #include <lib.h> #include <spd.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 3a220ed..97c03b5 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -31,7 +31,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h>

1 0

Patch set updated for coreboot: 1621d3c Fix usb debug dongle support
by Sven Schnelle 30 Oct '11

30 Oct '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/355 -gerrit commit 1621d3cd8d1e01a39dbed72d3627aaca4eb5e999 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Oct 30 09:57:35 2011 +0100 Fix usb debug dongle support - move enable_usbdebug() declaration to usbdebug.h - reinitialize debug driver in ramstage, as copying the data structure from romstage doesn't work right now. This way of copying data from romstage to ramstage is really board/cpu specific, and is likely to break often. So don't do it. Change-Id: I394678ded6679c1803e29eb691b926182bdcab68 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/console/console.c | 4 ++++ src/console/usbdebug_console.c | 10 +--------- src/include/ehci.h | 3 ++- src/include/usbdebug.h | 5 ++++- src/lib/Makefile.inc | 1 + src/lib/usbdebug.c | 6 +----- src/southbridge/amd/sb600/Makefile.inc | 4 +++- src/southbridge/amd/sb600/sb600.h | 1 - src/southbridge/amd/sb700/Makefile.inc | 4 +++- src/southbridge/amd/sb700/sb700.h | 2 -- src/southbridge/amd/sb800/Makefile.inc | 4 +++- src/southbridge/amd/sb800/sb800.h | 1 - src/southbridge/intel/i82801gx/Makefile.inc | 2 ++ src/southbridge/intel/i82801gx/i82801gx.h | 1 - src/southbridge/nvidia/ck804/Makefile.inc | 4 +++- src/southbridge/nvidia/ck804/ck804.h | 1 - src/southbridge/nvidia/mcp55/Makefile.inc | 4 +++- src/southbridge/nvidia/mcp55/mcp55.h | 1 - src/southbridge/sis/sis966/Makefile.inc | 5 ++++- src/southbridge/sis/sis966/sis966.h | 4 ---- 20 files changed, 34 insertions(+), 33 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index a73616e..325170d 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -30,6 +30,10 @@ #include <console/ne2k.h> #endif +#if CONFIG_USBDEBUG +#include <usbdebug.h> +#endif + #ifndef __PRE_RAM__ #include <string.h> #include <pc80/mc146818rtc.h> diff --git a/src/console/usbdebug_console.c b/src/console/usbdebug_console.c index 2270ceb..a624b9d 100644 --- a/src/console/usbdebug_console.c +++ b/src/console/usbdebug_console.c @@ -50,15 +50,7 @@ unsigned get_ehci_debug(void) static void dbgp_init(void) { - struct ehci_debug_info *dbg_infox; - - /* At this point, all we have to do is copy the fixed address - * debug_info data structure to our version defined above. */ - - dbg_infox = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); + usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, &dbg_info); } static void dbgp_tx_byte(unsigned char data) diff --git a/src/include/ehci.h b/src/include/ehci.h index 4b8c94c..29347f9 100644 --- a/src/include/ehci.h +++ b/src/include/ehci.h @@ -25,6 +25,7 @@ #define EHCI_BAR_INDEX 0x10 +#ifndef __ROMCC__ /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ /* Section 2.2 Host Controller Capability Registers */ @@ -199,5 +200,5 @@ struct ehci_dbg_port { u32 address; #define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) } __attribute__ ((packed)); - +#endif #endif diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 281ccde..a7ab21f 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -32,6 +32,8 @@ struct ehci_debug_info { u32 endpoint_in; }; +#ifndef __ROMCC__ +void enable_usbdebug(unsigned int port); int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); void set_ehci_base(unsigned ehci_base); @@ -40,5 +42,6 @@ unsigned get_ehci_debug(void); void set_debug_port(unsigned port); int early_usbdebug_init(void); void usbdebug_tx_byte(unsigned char data); - +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info); +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index b207ffe..432e24e 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -40,5 +40,6 @@ driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c smm-y += memcpy.c cbfs.c memset.c memcmp.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c +smm-$(CONFIG_USBDEBUG) += usbdebug.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index d022d2f..6b75acf 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -238,7 +238,6 @@ int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) dbg_info->endpoint_in, data, size); } -#ifdef __PRE_RAM__ static void dbgp_mdelay(int ms) { int i; @@ -356,7 +355,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) } -static int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; struct ehci_regs *ehci_regs; @@ -566,8 +565,6 @@ next_debug_port: return -10; } -// **** This part is probably x86 specific and used by romstage.c **** // - int early_usbdebug_init(void) { struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) @@ -588,4 +585,3 @@ void usbdebug_tx_byte(unsigned char data) dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } -#endif diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc index b590361..d7451d2 100644 --- a/src/southbridge/amd/sb600/Makefile.inc +++ b/src/southbridge/amd/sb600/Makefile.inc @@ -8,4 +8,6 @@ driver-y += hda.c driver-y += ac97.c driver-y += pci.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h index 97a7ad2..629f389 100644 --- a/src/southbridge/amd/sb600/sb600.h +++ b/src/southbridge/amd/sb600/sb600.h @@ -40,5 +40,4 @@ void sb600_enable(device_t dev); void sb600_lpc_port80(void); void sb600_pci_port80(void); -void enable_usbdebug(unsigned int port); #endif /* SB600_H */ diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc index e174e8b..49caedf 100755 --- a/src/southbridge/amd/sb700/Makefile.inc +++ b/src/southbridge/amd/sb700/Makefile.inc @@ -10,7 +10,9 @@ driver-y += pci.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c romstage-y += reset.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_setup.c romstage-y += smbus.c diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 794dd96..165c72d 100755 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -82,8 +82,6 @@ int acpi_is_wakeup_early(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); - u32 __attribute__ ((weak)) get_sbdn(u32 bus); void __attribute__((weak)) enable_fid_change_on_sb(u32 sbbusn, u32 sbdn); #endif /* SB700_H */ diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc index 7a42fdd..38b7d50 100644 --- a/src/southbridge/amd/sb800/Makefile.inc +++ b/src/southbridge/amd/sb800/Makefile.inc @@ -9,4 +9,6 @@ driver-y += pci.c driver-y += pcie.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index d7a4a38..ffe7aeb 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -58,7 +58,6 @@ void sb800_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); #else void sb800_enable(device_t dev); void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index d3a731b..c23a314 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -38,4 +38,6 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c romstage-y += early_smbus.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c +ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +smm-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 2ceb215..8fb5b92 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,7 +46,6 @@ extern void i82801gx_enable(device_t dev); void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); #endif -void enable_usbdebug(unsigned int port); #endif #define MAINBOARD_POWER_OFF 0 diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index b1577f5..debe227 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -15,7 +15,9 @@ ramstage-y += reset.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_smbus.c chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h index e7bf021..3e8b1f2 100644 --- a/src/southbridge/nvidia/ck804/ck804.h +++ b/src/southbridge/nvidia/ck804/ck804.h @@ -24,7 +24,6 @@ #include "chip.h" void ck804_enable(device_t dev); -void enable_usbdebug(unsigned int port); extern struct pci_operations ck804_pci_ops; diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index a59e148..26844da 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -15,7 +15,9 @@ driver-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h index 3173c50..aa52886 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.h +++ b/src/southbridge/nvidia/mcp55/mcp55.h @@ -35,7 +35,6 @@ extern struct pci_operations mcp55_pci_ops; #else #if !defined(__ROMCC__) void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -void enable_usbdebug(unsigned int port); #endif #endif diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index f796047..76dd31a 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -9,7 +9,10 @@ driver-y += sata.c driver-y += pcie.c driver-y += aza.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c + +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h index d6624b3..2c7c7b8 100644 --- a/src/southbridge/sis/sis966/sis966.h +++ b/src/southbridge/sis/sis966/sis966.h @@ -39,8 +39,4 @@ void sis966_enable(device_t dev); #endif -#if defined(__PRE_RAM__) && !defined(__ROMCC__) -void enable_usbdebug(unsigned int port); -#endif - #endif /* SIS966_H */

1 0

Patch merged into coreboot/master: 4f98011 asus/m5a88-v: Fix build
by gerrit＠coreboot.org 30 Oct '11

30 Oct '11

the following patch was just integrated into master: commit 4f98011ac37b1fa5ea48093b67a30ca1c8018104 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 29 22:42:22 2011 +0200 asus/m5a88-v: Fix build We added some new flag for certain AMD boards after support for this board was submitted. Also integrate the mptable refactorings that happened in the meantime. Change-Id: I50cf50f343a740832fd1a14a2a1ef5b903315675 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Build-Tested: build bot (Jenkins) at Sat Oct 29 23:35:43 2011, giving +1 Reviewed-By: Sven Schnelle <svens(a)stackframe.org> at Sun Oct 30 11:42:51 2011, giving +2 See http://review.coreboot.org/353 for details. -gerrit

1 0

New patch to review for coreboot: b148312 Fix usb debug dongle support
by Sven Schnelle 30 Oct '11

30 Oct '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/355 -gerrit commit b1483129aa5aa6b2f22a6565f75bcdb56772d092 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Oct 30 09:57:35 2011 +0100 Fix usb debug dongle support - move enable_usbdebug() declaration to usbdebug.h - reinitialize debug driver in ramstage, as the copying of the data structure from romstage doesn't work right now. This way of copying data from romstage to ramstage is really board/cpu specific, and is likely to break often. So don't do it. Change-Id: I394678ded6679c1803e29eb691b926182bdcab68 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/console/console.c | 4 ++++ src/console/usbdebug_console.c | 10 +--------- src/include/ehci.h | 3 ++- src/include/usbdebug.h | 5 ++++- src/lib/Makefile.inc | 1 + src/lib/usbdebug.c | 6 +----- src/southbridge/amd/sb600/Makefile.inc | 4 +++- src/southbridge/amd/sb600/sb600.h | 1 - src/southbridge/amd/sb700/Makefile.inc | 4 +++- src/southbridge/amd/sb700/sb700.h | 2 -- src/southbridge/amd/sb800/Makefile.inc | 4 +++- src/southbridge/amd/sb800/sb800.h | 1 - src/southbridge/intel/i82801gx/Makefile.inc | 2 ++ src/southbridge/intel/i82801gx/i82801gx.h | 1 - src/southbridge/nvidia/ck804/Makefile.inc | 4 +++- src/southbridge/nvidia/ck804/ck804.h | 1 - src/southbridge/nvidia/mcp55/Makefile.inc | 4 +++- src/southbridge/nvidia/mcp55/mcp55.h | 1 - src/southbridge/sis/sis966/Makefile.inc | 5 ++++- src/southbridge/sis/sis966/sis966.h | 4 ---- 20 files changed, 34 insertions(+), 33 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index a73616e..325170d 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -30,6 +30,10 @@ #include <console/ne2k.h> #endif +#if CONFIG_USBDEBUG +#include <usbdebug.h> +#endif + #ifndef __PRE_RAM__ #include <string.h> #include <pc80/mc146818rtc.h> diff --git a/src/console/usbdebug_console.c b/src/console/usbdebug_console.c index 2270ceb..a624b9d 100644 --- a/src/console/usbdebug_console.c +++ b/src/console/usbdebug_console.c @@ -50,15 +50,7 @@ unsigned get_ehci_debug(void) static void dbgp_init(void) { - struct ehci_debug_info *dbg_infox; - - /* At this point, all we have to do is copy the fixed address - * debug_info data structure to our version defined above. */ - - dbg_infox = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); + usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, &dbg_info); } static void dbgp_tx_byte(unsigned char data) diff --git a/src/include/ehci.h b/src/include/ehci.h index 4b8c94c..29347f9 100644 --- a/src/include/ehci.h +++ b/src/include/ehci.h @@ -25,6 +25,7 @@ #define EHCI_BAR_INDEX 0x10 +#ifndef __ROMCC__ /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ /* Section 2.2 Host Controller Capability Registers */ @@ -199,5 +200,5 @@ struct ehci_dbg_port { u32 address; #define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) } __attribute__ ((packed)); - +#endif #endif diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 281ccde..a7ab21f 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -32,6 +32,8 @@ struct ehci_debug_info { u32 endpoint_in; }; +#ifndef __ROMCC__ +void enable_usbdebug(unsigned int port); int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); void set_ehci_base(unsigned ehci_base); @@ -40,5 +42,6 @@ unsigned get_ehci_debug(void); void set_debug_port(unsigned port); int early_usbdebug_init(void); void usbdebug_tx_byte(unsigned char data); - +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info); +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index b207ffe..432e24e 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -40,5 +40,6 @@ driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c smm-y += memcpy.c cbfs.c memset.c memcmp.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c +smm-$(CONFIG_USBDEBUG) += usbdebug.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index d022d2f..6b75acf 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -238,7 +238,6 @@ int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) dbg_info->endpoint_in, data, size); } -#ifdef __PRE_RAM__ static void dbgp_mdelay(int ms) { int i; @@ -356,7 +355,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) } -static int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; struct ehci_regs *ehci_regs; @@ -566,8 +565,6 @@ next_debug_port: return -10; } -// **** This part is probably x86 specific and used by romstage.c **** // - int early_usbdebug_init(void) { struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) @@ -588,4 +585,3 @@ void usbdebug_tx_byte(unsigned char data) dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } -#endif diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc index b590361..d7451d2 100644 --- a/src/southbridge/amd/sb600/Makefile.inc +++ b/src/southbridge/amd/sb600/Makefile.inc @@ -8,4 +8,6 @@ driver-y += hda.c driver-y += ac97.c driver-y += pci.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h index 97a7ad2..629f389 100644 --- a/src/southbridge/amd/sb600/sb600.h +++ b/src/southbridge/amd/sb600/sb600.h @@ -40,5 +40,4 @@ void sb600_enable(device_t dev); void sb600_lpc_port80(void); void sb600_pci_port80(void); -void enable_usbdebug(unsigned int port); #endif /* SB600_H */ diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc index e174e8b..49caedf 100755 --- a/src/southbridge/amd/sb700/Makefile.inc +++ b/src/southbridge/amd/sb700/Makefile.inc @@ -10,7 +10,9 @@ driver-y += pci.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c romstage-y += reset.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_setup.c romstage-y += smbus.c diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 794dd96..165c72d 100755 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -82,8 +82,6 @@ int acpi_is_wakeup_early(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); - u32 __attribute__ ((weak)) get_sbdn(u32 bus); void __attribute__((weak)) enable_fid_change_on_sb(u32 sbbusn, u32 sbdn); #endif /* SB700_H */ diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc index 7a42fdd..38b7d50 100644 --- a/src/southbridge/amd/sb800/Makefile.inc +++ b/src/southbridge/amd/sb800/Makefile.inc @@ -9,4 +9,6 @@ driver-y += pci.c driver-y += pcie.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index d7a4a38..ffe7aeb 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -58,7 +58,6 @@ void sb800_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -void enable_usbdebug(unsigned int port); #else void sb800_enable(device_t dev); void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index d3a731b..c23a314 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -38,4 +38,6 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c romstage-y += early_smbus.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c +ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +smm-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 2ceb215..8fb5b92 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,7 +46,6 @@ extern void i82801gx_enable(device_t dev); void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); #endif -void enable_usbdebug(unsigned int port); #endif #define MAINBOARD_POWER_OFF 0 diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index b1577f5..debe227 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -15,7 +15,9 @@ ramstage-y += reset.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_smbus.c chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h index e7bf021..3e8b1f2 100644 --- a/src/southbridge/nvidia/ck804/ck804.h +++ b/src/southbridge/nvidia/ck804/ck804.h @@ -24,7 +24,6 @@ #include "chip.h" void ck804_enable(device_t dev); -void enable_usbdebug(unsigned int port); extern struct pci_operations ck804_pci_ops; diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index a59e148..26844da 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -15,7 +15,9 @@ driver-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h index 3173c50..aa52886 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.h +++ b/src/southbridge/nvidia/mcp55/mcp55.h @@ -35,7 +35,6 @@ extern struct pci_operations mcp55_pci_ops; #else #if !defined(__ROMCC__) void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -void enable_usbdebug(unsigned int port); #endif #endif diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index f796047..76dd31a 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -9,7 +9,10 @@ driver-y += sata.c driver-y += pcie.c driver-y += aza.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c + +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h index d6624b3..2c7c7b8 100644 --- a/src/southbridge/sis/sis966/sis966.h +++ b/src/southbridge/sis/sis966/sis966.h @@ -39,8 +39,4 @@ void sis966_enable(device_t dev); #endif -#if defined(__PRE_RAM__) && !defined(__ROMCC__) -void enable_usbdebug(unsigned int port); -#endif - #endif /* SIS966_H */

1 0

New patch to review for coreboot: ce854aa remove usbdebug.h include from mainboard/romstage code
by Sven Schnelle 30 Oct '11

30 Oct '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/354 -gerrit commit ce854aa3d858bda151f11ee289fd71f810760d85 Author: Sven Schnelle <svens(a)stackframe.org> Date: Sun Oct 30 08:49:43 2011 +0100 remove usbdebug.h include from mainboard/romstage code No romstage is supposed to use usbdebug functions/defines directly, so remove all those includes. The usb code is now called and setup from console code. Change-Id: I9b1120d96f5993303d6b302accc86e14a91f7a9f Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/mainboard/amd/bimini_fam10/romstage.c | 1 - src/mainboard/amd/dbm690t/romstage.c | 1 - src/mainboard/amd/mahogany/romstage.c | 1 - src/mainboard/amd/mahogany_fam10/romstage.c | 1 - src/mainboard/amd/pistachio/romstage.c | 1 - src/mainboard/amd/tilapia_fam10/romstage.c | 1 - src/mainboard/asrock/939a785gmh/romstage.c | 1 - src/mainboard/asus/m2n-e/romstage.c | 1 - src/mainboard/asus/m4a78-em/romstage.c | 1 - src/mainboard/asus/m4a785-m/romstage.c | 1 - src/mainboard/getac/p470/romstage.c | 1 - src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 1 - src/mainboard/gigabyte/m57sli/romstage.c | 1 - src/mainboard/gigabyte/ma785gmt/romstage.c | 1 - src/mainboard/gigabyte/ma78gm/romstage.c | 1 - src/mainboard/ibase/mb899/romstage.c | 1 - src/mainboard/iei/kino-780am2-fam10/romstage.c | 1 - src/mainboard/intel/d945gclf/romstage.c | 1 - src/mainboard/jetway/pa78vm5/romstage.c | 1 - src/mainboard/kontron/986lcd-m/romstage.c | 1 - src/mainboard/kontron/kt690/romstage.c | 1 - src/mainboard/lenovo/t60/romstage.c | 1 - src/mainboard/lenovo/x60/romstage.c | 1 - src/mainboard/msi/ms7260/romstage.c | 1 - src/mainboard/msi/ms9652_fam10/romstage.c | 1 - src/mainboard/nvidia/l1_2pvv/romstage.c | 1 - src/mainboard/roda/rk886ex/romstage.c | 1 - src/mainboard/supermicro/h8scm_fam10/romstage.c | 1 - src/mainboard/technexion/tim5690/romstage.c | 1 - src/mainboard/technexion/tim8690/romstage.c | 1 - src/mainboard/tyan/s2912/romstage.c | 1 - src/mainboard/tyan/s2912_fam10/romstage.c | 1 - 32 files changed, 0 insertions(+), 32 deletions(-) diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 175325e..732e033 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index f119ec9..66637a8 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -39,7 +39,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/early_serial.c" #include <spd.h> -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 5c9d538..104652a 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -39,7 +39,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 4d26ca3..04a9e45 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index ee00c13..5d6e7a8 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -33,7 +33,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include <spd.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 48b13be..52cab42 100755 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index bd45c16..3183c1c 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -40,7 +40,6 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627dhg/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c index db3c614..e820a79 100644 --- a/src/mainboard/asus/m2n-e/romstage.c +++ b/src/mainboard/asus/m2n-e/romstage.c @@ -34,7 +34,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index b14a7c6..76449cb 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index b14a7c6..76449cb 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index 0e05af1..6fa2620 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -27,7 +27,6 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <lib.h> -#include <usbdebug.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 5bc1fbf..0ba4c59 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -35,7 +35,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/sis/sis966/sis966.h" diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 2a9c6ee..16d2453 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index fcf023b..4572169 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -39,7 +39,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 80b8d90..bd81e67 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/ite/it8718f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index 11f48a1..148587d 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -30,7 +30,6 @@ #include "superio/winbond/w83627ehg/w83627ehg.h" #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "superio/winbond/w83627ehg/early_serial.c" #include "northbridge/intel/i945/i945.h" diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 58b1845..54b364a 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -43,7 +43,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/fintek/f71859/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index d1ead82..a4cb3b2 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -30,7 +30,6 @@ #include "superio/smsc/lpc47m15x/lpc47m15x.h" #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "superio/smsc/lpc47m15x/early_serial.c" #include "northbridge/intel/i945/i945.h" diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 11bda6a..b2d4ecb 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -44,7 +44,6 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "superio/fintek/f71863fg/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 6d9f81e..df25fd4 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -27,7 +27,6 @@ #include <device/pci_def.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> -#include <usbdebug.h> #include "superio/winbond/w83627thg/w83627thg.h" #include <pc80/mc146818rtc.h> #include "option_table.h" diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 0cd523a..f2525e3 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -41,7 +41,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627dhg/early_serial.c" -#include <usbdebug.h> #include <cpu/amd/mtrr.h> #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 13faee2..046e354 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -32,7 +32,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 2aa506f..44cde72 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -32,7 +32,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index b587303..b384119 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -34,7 +34,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 2add54b..fc8120b 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -31,7 +31,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index ef329d3..94aa14a 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_fxx_rev.h> diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 2af7c2b..d75d33f 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -31,7 +31,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include <usbdebug.h> #include <cpu/x86/bist.h> #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 6e6e394..70b3a04 100755 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 515a1b8..5934938 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -40,7 +40,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index eb6eca7..97bc4e1 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -40,7 +40,6 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/early_serial.c" -#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 52a100c..67ce286 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -35,7 +35,6 @@ #include <console/console.h> #include <lib.h> #include <spd.h> -#include <usbdebug.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 3a220ed..97c03b5 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -31,7 +31,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <console/console.h> -#include <usbdebug.h> #include <lib.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h>

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Patch set updated for coreboot: 4f98011 asus/m5a88-v: Fix build
by Patrick Georgi 29 Oct '11

29 Oct '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/353 -gerrit commit 4f98011ac37b1fa5ea48093b67a30ca1c8018104 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 29 22:42:22 2011 +0200 asus/m5a88-v: Fix build We added some new flag for certain AMD boards after support for this board was submitted. Also integrate the mptable refactorings that happened in the meantime. Change-Id: I50cf50f343a740832fd1a14a2a1ef5b903315675 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/mainboard/asus/m5a88-v/mptable.c | 10 ++-------- src/mainboard/asus/m5a88-v/platform_cfg.h | 6 ++++++ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/mainboard/asus/m5a88-v/mptable.c b/src/mainboard/asus/m5a88-v/mptable.c index 72733c6..516b915 100644 --- a/src/mainboard/asus/m5a88-v/mptable.c +++ b/src/mainboard/asus/m5a88-v/mptable.c @@ -139,18 +139,12 @@ static void *smp_write_config_table(void *v) IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); /* There is no extension information... */ - /* Compute the checksums */ - mc->mpe_checksum = - smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); - mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); - printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", - mc, smp_next_mpe_entry(mc)); - return smp_next_mpe_entry(mc); + return mptable_finalize(mc); } unsigned long write_smp_table(unsigned long addr) { void *v; - v = smp_write_floating_table(addr); + v = smp_write_floating_table(addr, 0); return (unsigned long)smp_write_config_table(v); } diff --git a/src/mainboard/asus/m5a88-v/platform_cfg.h b/src/mainboard/asus/m5a88-v/platform_cfg.h index 1b74073..43573f1 100644 --- a/src/mainboard/asus/m5a88-v/platform_cfg.h +++ b/src/mainboard/asus/m5a88-v/platform_cfg.h @@ -211,6 +211,12 @@ */ #define SB_GPP_GEN2 TRUE +/** + * @def SB_GPP_UNHIDE_PORTS + * TRUE - ports visable always, even port empty + * FALSE - ports invisable if port empty + */ +#define SB_GPP_UNHIDE_PORTS FALSE /** * @def GEC_CONFIG

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New patch to review for coreboot: eb1795c asus/m5a88-v: Fix build
by Patrick Georgi 29 Oct '11

29 Oct '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/353 -gerrit commit eb1795c306aaa41695634f02f961a16f1e6fa791 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 29 22:42:22 2011 +0200 asus/m5a88-v: Fix build We added some new flag for certain AMD boards after support for this board was submitted. Change-Id: I50cf50f343a740832fd1a14a2a1ef5b903315675 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/mainboard/asus/m5a88-v/platform_cfg.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/src/mainboard/asus/m5a88-v/platform_cfg.h b/src/mainboard/asus/m5a88-v/platform_cfg.h index 1b74073..43573f1 100644 --- a/src/mainboard/asus/m5a88-v/platform_cfg.h +++ b/src/mainboard/asus/m5a88-v/platform_cfg.h @@ -211,6 +211,12 @@ */ #define SB_GPP_GEN2 TRUE +/** + * @def SB_GPP_UNHIDE_PORTS + * TRUE - ports visable always, even port empty + * FALSE - ports invisable if port empty + */ +#define SB_GPP_UNHIDE_PORTS FALSE /** * @def GEC_CONFIG

1 0

Patch merged into coreboot/master: 9e6d60e Fix coreboot updates
by gerrit＠coreboot.org 28 Oct '11

28 Oct '11

the following patch was just integrated into master: commit 9e6d60e575d6acc3dcafab2f80f8480c838ec00c Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 28 22:52:11 2011 +0200 Fix coreboot updates The rule to prepare a new coreboot.pre1 was ignored in the "update image" scenario because a perfectly fine file exists. Mark it phony to fix it. Change-Id: Ie7f8b36b71015a593958cd6e19602bad6b854320 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Build-Tested: build bot (Jenkins) at Fri Oct 28 23:10:32 2011, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Oct 29 06:02:03 2011, giving +2 See http://review.coreboot.org/351 for details. -gerrit

1 0

Patch set updated for coreboot: 7849219 Update coreboot cross toolchain to gcc 4.6.1
by Patrick Georgi 28 Oct '11

28 Oct '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/250 -gerrit commit 784921939448aae10ee10f02e81af1c1ab866f34 Author: Stefan Reinauer <reinauer(a)google.com> Date: Tue Oct 11 22:37:59 2011 -0700 Update coreboot cross toolchain to gcc 4.6.1 - Tested on Mac OS X 10.7.1 - Tested on Ubuntu 10.04 LTS (Lucid Lynx) - Tested on Ubuntu 11.10 (Oneiric Ocelot) Please test on Windows and other Linux distributions Change-Id: I132c01293fc0cff0cfb84556a93c0b8de8e57230 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/crossgcc/buildgcc | 76 ++++-- .../acpica-unix-20110922_no_unused_variables.patch | 48 ++++ .../acpica-unix-20110922_unknown_warnings.patch | 19 ++ .../binutils-2.20_no-i386-svr4-asm-comments.patch | 10 - .../patches/binutils-2.21.1_no-bfd-doc.patch | 11 + .../patches/gcc-4.4.2_less-junk-in-crtbegin.patch | 50 ---- util/crossgcc/patches/gcc-4.5.1_pragma.patch | 10 - .../patches/mpfr-2.4.2_allpatches_20100308.patch | 266 -------------------- 8 files changed, 128 insertions(+), 362 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 6061f26..40444a5 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -20,8 +20,8 @@ # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA # -CROSSGCC_DATE="August 8th, 2011" -CROSSGCC_VERSION="1.04" +CROSSGCC_DATE="October 10th, 2011" +CROSSGCC_VERSION="1.05" # default settings TARGETDIR=`pwd`/xgcc @@ -29,17 +29,18 @@ TARGETARCH=i386-elf DESTDIR= # version numbers -GMP_VERSION=5.0.1 -MPFR_VERSION=3.0.0 -MPC_VERSION=0.8.2 +GMP_VERSION=5.0.2 +MPFR_VERSION=3.1.0 +MPC_VERSION=0.9 LIBELF_VERSION=0.8.13 -GCC_VERSION=4.5.2 -BINUTILS_VERSION=2.20.1 +GCC_VERSION=4.6.1 +GCC_AUTOCONF_VERSION=2.64 +BINUTILS_VERSION=2.21.1 GDB_VERSION=7.3.1 W32API_VERSION=3.17-2 W32API_VERSION_SHORT=3.17 MINGWRT_VERSION=3.18 -IASL_VERSION=20110623 +IASL_VERSION=20110922 # archive locations GMP_ARCHIVE="ftp://ftp.gmplib.org/pub/gmp-${GMP_VERSION}/gmp-${GMP_VERSION}.tar.bz2" @@ -146,7 +147,7 @@ GNU General Public License for more details. EOF } -printf "${blue}Welcome to the ${red}coresystems${blue} cross toolchain builder v$CROSSGCC_VERSION ($CROSSGCC_DATE)${NC}\n\n" +printf "${blue}Welcome to the ${red}coreboot${blue} cross toolchain builder v$CROSSGCC_VERSION ($CROSSGCC_DATE)${NC}\n\n" # Look if we have getopt. If not, build it. export PATH=$PATH:. @@ -198,14 +199,12 @@ if [ "$TARGETARCH" = "i386-mingw32" ]; then MINGW_ARCHIVES="$W32API_ARCHIVE $MINGWRT_ARCHIVE" fi -if [ ${GCC_VERSION} = "4.5.0" -o ${GCC_VERSION} = "4.6.0" ]; then - # coreboot does not like the GOLD linker - # USE_GOLD="--enable-gold" - USE_GOLD="" - GCC_OPTIONS="--enable-lto" -fi +# coreboot does not like the GOLD linker +# USE_GOLD="--enable-gold" +USE_GOLD="" +GCC_OPTIONS="--enable-lto" -if [ ${GCC_VERSION} = "4.6.0" ]; then +if [ ${GCC_VERSION} = "4.6.2" ]; then if [ ! -r tarballs/gcc-core-${GCC_VERSION}.tar.bz2 ]; then printf "Pre-Release GCC ${GCC_VERSION}, checking out subversion trunk\n" mkdir -p tarballs/.tmp @@ -273,6 +272,7 @@ if [ "$TARGETARCH" = "i386-mingw32" ]; then mv $MINGWRT_DIR/include/* $W32API_DIR/include/* $TARGETDIR/i386-mingw32/sys-include fi +CC=cc if [ `uname` = "Darwin" ]; then #GCC_OPTIONS="$GCC_OPTIONS --enable-threads=posix" @@ -286,13 +286,14 @@ if [ `uname` = "Darwin" ]; then else OPTIONS="ABI=32" fi - # old check: - #OPTIONS="ABI=32" - #touch .architecture_check.c - #gcc .architecture_check.c -c -o .architecture_check.o - #ARCH=`file .architecture_check.o |cut -f5 -d\ ` - #test "$ARCH" = "x86_64" && OPTIONS="ABI=64" - #rm .architecture_check.c .architecture_check.o + + # In Xcode 4 the default compiler was switched to gcc-llvm. + # However, this compiler fails to compile gcc 4.6.x. As a + # workaround it's possible to compile gcc with gcc-4.2 or + # clang. + if $CC -v 2>&1 | grep -q LLVM; then + CC=clang + fi fi mkdir -p build-gmp build-mpfr build-mpc build-libelf build-binutils build-gcc @@ -321,8 +322,10 @@ fi # ln -s $DESTDIR$TARGETDIR $TARGETDIR #fi -# Now set CFLAGS to match GMP CFLAGS. -HOSTCFLAGS=`grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2` +# Now set CFLAGS to match GMP CFLAGS but strip out -pedantic +# as GCC 4.6.x fails if it's there. +HOSTCFLAGS=`grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\ + sed s,-pedantic,,` if [ -f build-mpfr/.success ]; then printf "Skipping MPFR as it is already built\n" @@ -393,6 +396,12 @@ if [ -f build-binutils/.success ]; then else printf "Building binutils ${BINUTILS_VERSION} ... " ( + # What a pain: binutils don't come with configure + # script anymore. Create it: + cd binutils-${BINUTILS_VERSION}/ + autoconf + cd .. + # Now build binutils cd build-binutils rm -f .failed ../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR --target=${TARGETARCH} \ @@ -411,6 +420,19 @@ if [ -f build-gcc/.success ]; then else printf "Building GCC ${GCC_VERSION} ... " ( + # Even worse than binutils: GCC does not come with configure + # script anymore, but also enforces an obsolete autoconf version + # to create it. This is a poster child of how autotools help make + # software portable. + cd gcc-${GCC_VERSION} + sed '/dnl Ensure exactly this Autoconf version is used/d' \ + config/override.m4 > config/override.m4.new + autoconf_version=`autoconf -V | grep "autoconf" | tr ' ' '\n' | tail -1` + sed "s/${GCC_AUTOCONF_VERSION}/${autoconf_version}/g" \ + config/override.m4.new > config/override.m4 + autoconf + cd .. + # Now, finally, we can build gcc: cd build-gcc export PATH=$PATH:$DESTDIR$TARGETDIR/bin rm -f .failed @@ -419,10 +441,12 @@ printf "Building GCC ${GCC_VERSION} ... " # There's a work-around called CFLAGS_FOR_BUILD and CFLAGS_FOR_TARGET # but it does not seem to work properly. At least the host library # libiberty is not compiled with CFLAGS_FOR_BUILD. - CFLAGS_FOR_TARGET="-O2" CFLAGS="$HOSTCFLAGS" CFLAGS_FOR_BUILD="$HOSTCFLAGS" `readlink -f ../gcc-${GCC_VERSION}/configure` \ + CC="$CC" CFLAGS_FOR_TARGET="-O2" CFLAGS="$HOSTCFLAGS" \ + CFLAGS_FOR_BUILD="$HOSTCFLAGS" ../gcc-${GCC_VERSION}/configure \ --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \ --target=${TARGETARCH} --disable-werror --disable-shared \ --disable-libssp --disable-bootstrap --disable-nls \ + --disable-libquadmath \ $GCC_OPTIONS --enable-languages="c" $USE_GOLD \ --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \ --with-mpc=$DESTDIR$TARGETDIR --with-libelf=$DESTDIR$TARGETDIR \ diff --git a/util/crossgcc/patches/acpica-unix-20110922_no_unused_variables.patch b/util/crossgcc/patches/acpica-unix-20110922_no_unused_variables.patch new file mode 100644 index 0000000..1edcb7f --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20110922_no_unused_variables.patch @@ -0,0 +1,48 @@ +diff -x '*.o' -ur acpica-unix-20110922.orig//compiler/aslcompiler.l acpica-unix-20110922/compiler/aslcompiler.l +--- acpica-unix-20110922.orig//compiler/aslcompiler.l 2011-10-28 23:24:17.333274002 +0200 ++++ acpica-unix-20110922/compiler/aslcompiler.l 2011-10-28 23:24:56.669274001 +0200 +@@ -550,7 +550,6 @@ + void) + { + ASL_FILE_NODE *Fnode; +- FILE *InputFile = NULL; + + + Fnode = InputStack; +@@ -569,7 +568,6 @@ + /* Update the top-of-stack */ + + InputStack = Fnode->Next; +- InputFile = Fnode->File; + + /* Reset global line counter and filename */ + +diff -x '*.o' -ur acpica-unix-20110922.orig//os_specific/service_layers/osunixxf.c acpica-unix-20110922/os_specific/service_layers/osunixxf.c +--- acpica-unix-20110922.orig//os_specific/service_layers/osunixxf.c 2011-10-28 23:24:17.345274002 +0200 ++++ acpica-unix-20110922/os_specific/service_layers/osunixxf.c 2011-10-28 23:56:13.629274002 +0200 +@@ -349,7 +349,6 @@ + const char *Fmt, + va_list Args) + { +- INT32 Count = 0; + UINT8 Flags; + + +@@ -362,7 +361,7 @@ + { + /* Output file is open, send the output there */ + +- Count = vfprintf (AcpiGbl_DebugFile, Fmt, Args); ++ vfprintf (AcpiGbl_DebugFile, Fmt, Args); + } + else + { +@@ -374,7 +373,7 @@ + + if (Flags & ACPI_DB_CONSOLE_OUTPUT) + { +- Count = vfprintf (AcpiGbl_OutputFile, Fmt, Args); ++ vfprintf (AcpiGbl_OutputFile, Fmt, Args); + } + } + diff --git a/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch b/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch new file mode 100644 index 0000000..f53be92 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch @@ -0,0 +1,19 @@ +--- acpica-unix-20110922/compiler/Makefile 2011-09-22 08:59:34.000000000 -0700 ++++ acpica-unix-20110922/compiler/Makefile 2011-10-11 23:47:29.000000000 -0700 +@@ -245,15 +245,11 @@ + -Waggregate-return \ + -Wchar-subscripts \ + -Wempty-body \ +- -Wlogical-op \ + -Wmissing-declarations \ + -Wmissing-field-initializers \ +- -Wmissing-parameter-type \ + -Wnested-externs \ +- -Wold-style-declaration \ + -Wold-style-definition \ +- -Wredundant-decls \ +- -Wtype-limits ++ -Wredundant-decls + + # + # Bison/Flex configuration diff --git a/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch b/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch deleted file mode 100644 index 3c0cef9..0000000 --- a/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- binutils-2.20/gas/config/tc-i386.c~ 2009-01-20 14:19:04.000000000 +0100 -+++ binutils-2.20/gas/config/tc-i386.c 2009-01-20 14:20:47.000000000 +0100 -@@ -318,6 +318,7 @@ - && !defined (TE_GNU) \ - && !defined (TE_LINUX) \ - && !defined (TE_NETWARE) \ -+ && 0 \ - && !defined (TE_FreeBSD) \ - && !defined (TE_NetBSD))) - /* This array holds the chars that always start a comment. If the diff --git a/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch b/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch new file mode 100644 index 0000000..4fb9e21 --- /dev/null +++ b/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch @@ -0,0 +1,11 @@ +--- binutils-2.21.1/bfd/Makefile.in 2011-06-27 01:57:12.000000000 -0700 ++++ binutils-2.21.1/bfd/Makefile.in 2011-10-11 21:59:15.000000000 -0700 +@@ -323,7 +323,7 @@ + RELEASE = y + INCDIR = $(srcdir)/../include + CSEARCH = -I. -I$(srcdir) -I$(INCDIR) +-SUBDIRS = doc po ++SUBDIRS = po + bfddocdir = doc + libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \ + @SHARED_LDFLAGS@ $(am__empty) diff --git a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch b/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch deleted file mode 100644 index a1c2480..0000000 --- a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- t/gcc-4.4.2/gcc/crtstuff.c Fr. Apr 10 01:23:07 2009 -+++ gcc-4.4.2/gcc/crtstuff.c Di. Jul 28 16:43:28 2009 -@@ -204,6 +204,7 @@ - = { (func_ptr) (-1) }; - #endif /* __DTOR_LIST__ alternatives */ - -+#if 0 - #ifdef USE_EH_FRAME_REGISTRY - /* Stick a label at the beginning of the frame unwind info so we can register - and deregister it with the exception handling library code. */ -@@ -219,6 +220,7 @@ - __attribute__ ((unused, section(JCR_SECTION_NAME), aligned(sizeof(void*)))) - = { }; - #endif /* JCR_SECTION_NAME */ -+#endif - - #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP) - -@@ -309,6 +311,7 @@ - } - #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */ - -+#if 0 - #ifdef USE_EH_FRAME_REGISTRY - #ifdef CRT_GET_RFIB_DATA - /* If we used the new __register_frame_info_bases interface, -@@ -320,6 +323,7 @@ - __deregister_frame_info (__EH_FRAME_BEGIN__); - #endif - #endif -+#endif - - completed = 1; - } -@@ -333,6 +337,7 @@ - = { __do_global_dtors_aux }; - #endif /* !defined(FINI_SECTION_ASM_OP) */ - -+#if 0 - #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME) - /* Stick a call to __register_frame_info into the .init section. For some - reason calls with no arguments work more reliably in .init, so stick the -@@ -364,6 +369,7 @@ - } - #endif /* JCR_SECTION_NAME */ - } -+#endif - - #ifdef INIT_SECTION_ASM_OP - CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy) diff --git a/util/crossgcc/patches/gcc-4.5.1_pragma.patch b/util/crossgcc/patches/gcc-4.5.1_pragma.patch deleted file mode 100644 index 36ac8f4..0000000 --- a/util/crossgcc/patches/gcc-4.5.1_pragma.patch +++ /dev/null @@ -1,10 +0,0 @@ -diff -ur gcc-4.5.1.orig/gcc/config/i386/i386elf.h gcc-4.5.1/gcc/config/i386/i386elf.h ---- gcc-4.5.1.orig/gcc/config/i386/i386elf.h 2010-11-17 19:48:16.184401200 -0700 -+++ gcc-4.5.1/gcc/config/i386/i386elf.h 2010-11-17 20:52:54.443969900 -0700 -@@ -123,3 +123,6 @@ - #undef ASM_OUTPUT_ALIGNED_BSS - #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ - asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) -+ -+/* Enable parsing of #pragma pack(push,<n>) and #pragma pack(pop). */ -+#define HANDLE_PRAGMA_PACK_PUSH_POP 1 diff --git a/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch b/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch deleted file mode 100644 index 6603337..0000000 --- a/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch +++ /dev/null @@ -1,266 +0,0 @@ -diff -ur mpfr-2.4.2.orig/PATCHES mpfr-2.4.2/PATCHES ---- mpfr-2.4.2.orig/PATCHES 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/PATCHES 2010-03-08 22:28:53.000000000 +0100 -@@ -0,0 +1,3 @@ -+gmp5 -+longlong.h -+sin_cos_underflow -diff -ur mpfr-2.4.2.orig/VERSION mpfr-2.4.2/VERSION ---- mpfr-2.4.2.orig/VERSION 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/VERSION 2010-03-08 22:28:53.000000000 +0100 -@@ -1 +1 @@ --2.4.2 -+2.4.2-p3 -diff -ur mpfr-2.4.2.orig/configure mpfr-2.4.2/configure ---- mpfr-2.4.2.orig/configure 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/configure 2010-03-08 22:28:53.000000000 +0100 -@@ -20449,6 +20449,9 @@ - main () - { - -+#ifndef BITS_PER_MP_LIMB -+#define BITS_PER_MP_LIMB GMP_LIMB_BITS -+#endif - return BITS_PER_MP_LIMB == BYTES_PER_MP_LIMB * CHAR_BIT - && sizeof(mp_limb_t) == BYTES_PER_MP_LIMB ? 0 : 1; - -diff -ur mpfr-2.4.2.orig/configure.in mpfr-2.4.2/configure.in ---- mpfr-2.4.2.orig/configure.in 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/configure.in 2010-03-08 22:28:53.000000000 +0100 -@@ -424,6 +424,9 @@ - #include "gmp.h" - #include "gmp-impl.h" - ]], [[ -+#ifndef BITS_PER_MP_LIMB -+#define BITS_PER_MP_LIMB GMP_LIMB_BITS -+#endif - return BITS_PER_MP_LIMB == BYTES_PER_MP_LIMB * CHAR_BIT - && sizeof(mp_limb_t) == BYTES_PER_MP_LIMB ? 0 : 1; - ]])], [AC_MSG_RESULT(yes)], [ -diff -ur mpfr-2.4.2.orig/mpfr-impl.h mpfr-2.4.2/mpfr-impl.h ---- mpfr-2.4.2.orig/mpfr-impl.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr-impl.h 2010-03-08 22:28:53.000000000 +0100 -@@ -65,6 +65,12 @@ - # ifndef __GMP_IMPL_H__ - # include "gmp-impl.h" - # endif -+# ifndef BITS_PER_MP_LIMB -+# define BITS_PER_MP_LIMB GMP_LIMB_BITS -+# endif -+#ifndef mpn_sqr_n -+# define mpn_sqr_n mpn_sqr -+#endif - # ifdef MPFR_NEED_LONGLONG_H - # include "longlong.h" - # endif -diff -ur mpfr-2.4.2.orig/mpfr-longlong.h mpfr-2.4.2/mpfr-longlong.h ---- mpfr-2.4.2.orig/mpfr-longlong.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr-longlong.h 2010-03-08 22:28:53.000000000 +0100 -@@ -1011,7 +1011,15 @@ - #endif /* __m88000__ */ - - #if defined (__mips) && W_TYPE_SIZE == 32 --#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 -+#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ UDItype _r; \ -+ _r = (UDItype) u * v; \ -+ (w1) = _r >> 32; \ -+ (w0) = (USItype) _r; \ -+ } while (0) -+#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 - #define umul_ppmm(w1, w0, u, v) \ - __asm__ ("multu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) - #else -@@ -1024,7 +1032,16 @@ - #endif /* __mips */ - - #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64 --#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 -+#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) -+typedef unsigned int UTItype __attribute__ ((mode (TI))); -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ UTItype _r; \ -+ _r = (UTItype) u * v; \ -+ (w1) = _r >> 64; \ -+ (w0) = (UDItype) _r; \ -+ } while (0) -+#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 - #define umul_ppmm(w1, w0, u, v) \ - __asm__ ("dmultu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) - #else -diff -ur mpfr-2.4.2.orig/mpfr.h mpfr-2.4.2/mpfr.h ---- mpfr-2.4.2.orig/mpfr.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr.h 2010-03-08 22:28:53.000000000 +0100 -@@ -27,7 +27,7 @@ - #define MPFR_VERSION_MAJOR 2 - #define MPFR_VERSION_MINOR 4 - #define MPFR_VERSION_PATCHLEVEL 2 --#define MPFR_VERSION_STRING "2.4.2" -+#define MPFR_VERSION_STRING "2.4.2-p3" - - /* Macros dealing with MPFR VERSION */ - #define MPFR_VERSION_NUM(a,b,c) (((a) << 16L) | ((b) << 8) | (c)) -diff -ur mpfr-2.4.2.orig/sin_cos.c mpfr-2.4.2/sin_cos.c ---- mpfr-2.4.2.orig/sin_cos.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/sin_cos.c 2010-03-08 22:28:53.000000000 +0100 -@@ -82,17 +82,19 @@ - if (y != x) - /* y and x differ, thus we can safely try to compute y first */ - { -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (y, x, -2 * expx, 2, 0, rnd_mode, -- { inexy = _inexact; -- goto small_input; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ y, x, -2 * expx, 2, 0, rnd_mode, -+ { inexy = _inexact; -+ goto small_input; }); - if (0) - { - small_input: - /* we can go here only if we can round sin(x) */ -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (z, __gmpfr_one, -2 * expx, -- 1, 0, rnd_mode, -- { inexz = _inexact; -- goto end; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ z, __gmpfr_one, -2 * expx, 1, 0, rnd_mode, -+ { inexz = _inexact; -+ MPFR_SAVE_EXPO_UPDATE_FLAGS (expo, __gmpfr_flags); -+ goto end; }); - } - - /* if we go here, one of the two MPFR_FAST_COMPUTE_IF_SMALL_INPUT -@@ -101,18 +103,19 @@ - else /* y and x are the same variable: try to compute z first, which - necessarily differs */ - { -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (z, __gmpfr_one, -2 * expx, -- 1, 0, rnd_mode, -- { inexz = _inexact; -- goto small_input2; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ z, __gmpfr_one, -2 * expx, 1, 0, rnd_mode, -+ { inexz = _inexact; -+ goto small_input2; }); - if (0) - { - small_input2: - /* we can go here only if we can round cos(x) */ -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (y, x, -2 * expx, 2, 0, -- rnd_mode, -- { inexy = _inexact; -- goto end; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ y, x, -2 * expx, 2, 0, rnd_mode, -+ { inexy = _inexact; -+ MPFR_SAVE_EXPO_UPDATE_FLAGS (expo, __gmpfr_flags); -+ goto end; }); - } - } - m += 2 * (-expx); -@@ -207,7 +210,6 @@ - mpfr_clear (xr); - - end: -- /* FIXME: update the underflow flag if need be. */ - MPFR_SAVE_EXPO_FREE (expo); - mpfr_check_range (y, inexy, rnd_mode); - mpfr_check_range (z, inexz, rnd_mode); -diff -ur mpfr-2.4.2.orig/tests/tsin_cos.c mpfr-2.4.2/tests/tsin_cos.c ---- mpfr-2.4.2.orig/tests/tsin_cos.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/tests/tsin_cos.c 2010-03-08 22:28:53.000000000 +0100 -@@ -382,23 +382,56 @@ - consistency (void) - { - mpfr_t x, s1, s2, c1, c2; -+ mp_exp_t emin, emax; - mp_rnd_t rnd; -+ unsigned int flags_sin, flags_cos, flags, flags_before, flags_ref; -+ int inex_sin, inex_cos, inex, inex_ref; - int i; - -+ emin = mpfr_get_emin (); -+ emax = mpfr_get_emax (); -+ - for (i = 0; i <= 10000; i++) - { - mpfr_init2 (x, MPFR_PREC_MIN + (randlimb () % 8)); - mpfr_inits2 (MPFR_PREC_MIN + (randlimb () % 8), s1, s2, c1, c2, - (mpfr_ptr) 0); -- tests_default_random (x, 256, -5, 50); -- rnd = RND_RAND (); -- mpfr_sin (s1, x, rnd); -- mpfr_cos (c1, x, rnd); -- mpfr_sin_cos (s2, c2, x, rnd); -- if (!(mpfr_equal_p (s1, s2) && mpfr_equal_p (c1, c2))) -+ if (i < 8 * GMP_RND_MAX) -+ { -+ int j = i / GMP_RND_MAX; -+ if (j & 1) -+ mpfr_set_emin (MPFR_EMIN_MIN); -+ mpfr_set_si (x, (j & 2) ? 1 : -1, GMP_RNDN); -+ mpfr_set_exp (x, mpfr_get_emin ()); -+ rnd = (mpfr_rnd_t) (i % GMP_RND_MAX); -+ flags_before = 0; -+ if (j & 4) -+ mpfr_set_emax (-17); -+ } -+ else -+ { -+ tests_default_random (x, 256, -5, 50); -+ rnd = RND_RAND (); -+ flags_before = (randlimb () & 1) ? -+ (unsigned int) (MPFR_FLAGS_ALL ^ MPFR_FLAGS_ERANGE) : -+ (unsigned int) 0; -+ } -+ __gmpfr_flags = flags_before; -+ inex_sin = mpfr_sin (s1, x, rnd); -+ flags_sin = __gmpfr_flags; -+ __gmpfr_flags = flags_before; -+ inex_cos = mpfr_cos (c1, x, rnd); -+ flags_cos = __gmpfr_flags; -+ __gmpfr_flags = flags_before; -+ inex = !!mpfr_sin_cos (s2, c2, x, rnd); -+ flags = __gmpfr_flags; -+ inex_ref = inex_sin || inex_cos; -+ flags_ref = flags_sin | flags_cos; -+ if (!(mpfr_equal_p (s1, s2) && mpfr_equal_p (c1, c2)) || -+ inex != inex_ref || flags != flags_ref) - { -- printf ("mpfr_sin_cos and mpfr_sin/mpfr_cos disagree on %s,\nx = ", -- mpfr_print_rnd_mode (rnd)); -+ printf ("mpfr_sin_cos and mpfr_sin/mpfr_cos disagree on %s," -+ " i = %d\nx = ", mpfr_print_rnd_mode (rnd), i); - mpfr_dump (x); - printf ("s1 = "); - mpfr_dump (s1); -@@ -408,9 +441,16 @@ - mpfr_dump (c1); - printf ("c2 = "); - mpfr_dump (c2); -+ printf ("inex_sin = %d, inex_cos = %d, inex = %d (expected %d)\n", -+ inex_sin, inex_cos, inex, inex_ref); -+ printf ("flags_sin = 0x%x, flags_cos = 0x%x, " -+ "flags = 0x%x (expected 0x%x)\n", -+ flags_sin, flags_cos, flags, flags_ref); - exit (1); - } - mpfr_clears (x, s1, s2, c1, c2, (mpfr_ptr) 0); -+ mpfr_set_emin (emin); -+ mpfr_set_emax (emax); - } - } - -diff -ur mpfr-2.4.2.orig/version.c mpfr-2.4.2/version.c ---- mpfr-2.4.2.orig/version.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/version.c 2010-03-08 22:28:53.000000000 +0100 -@@ -25,5 +25,5 @@ - const char * - mpfr_get_version (void) - { -- return "2.4.2"; -+ return "2.4.2-p3"; - }

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coreboot October 2011