coreboot August 2010

coreboot@coreboot.org

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[commit] r5683 - in trunk/src: console include include/console lib pc80 southbridge/intel/i82801gx southbridge/nvidia/mcp55 southbridge/sis/sis966
by repository service 04 Aug '10

04 Aug '10

Author: myles Date: Wed Aug 4 21:29:11 2010 New Revision: 5683 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5683 Log: Remove warnings from USB debug console code. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/console/usbdebug_console.c trunk/src/include/console/console.h trunk/src/include/usbdebug.h trunk/src/lib/usbdebug.c trunk/src/pc80/usbdebug_serial.c trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Modified: trunk/src/console/usbdebug_console.c ============================================================================== --- trunk/src/console/usbdebug_console.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/console/usbdebug_console.c Wed Aug 4 21:29:11 2010 (r5683) @@ -29,20 +29,20 @@ if (!dbg_info.ehci_debug) return; - diff = dbg_info.ehci_caps - ehci_base; + diff = (unsigned)dbg_info.ehci_caps - ehci_base; dbg_info.ehci_regs -= diff; dbg_info.ehci_debug -= diff; - dbg_info.ehci_caps = ehci_base; + dbg_info.ehci_caps = (void*)ehci_base; } void set_ehci_debug(unsigned ehci_debug) { - dbg_info.ehci_debug = ehci_debug; + dbg_info.ehci_debug = (void*)ehci_debug; } unsigned get_ehci_debug(void) { - return dbg_info.ehci_debug; + return (unsigned)dbg_info.ehci_debug; } static void dbgp_init(void) @@ -61,7 +61,7 @@ static void dbgp_tx_byte(unsigned char data) { if (dbg_info.ehci_debug) - dbgp_bulk_write_x(&dbg_info, &data, 1); + dbgp_bulk_write_x(&dbg_info, (char*)&data, 1); } static unsigned char dbgp_rx_byte(void) @@ -76,7 +76,7 @@ static int dbgp_tst_byte(void) { - return dbg_info.ehci_debug; + return (int)dbg_info.ehci_debug; } static const struct console_driver usbdebug_direct_console __console = { Modified: trunk/src/include/console/console.h ============================================================================== --- trunk/src/include/console/console.h Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/include/console/console.h Wed Aug 4 21:29:11 2010 (r5683) @@ -12,6 +12,9 @@ #if CONFIG_CONSOLE_VGA == 1 void vga_console_init(void); #endif +#if CONFIG_USBDEBUG +#include <usbdebug.h> +#endif struct console_driver { void (*init)(void); Modified: trunk/src/include/usbdebug.h ============================================================================== --- trunk/src/include/usbdebug.h Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/include/usbdebug.h Wed Aug 4 21:29:11 2010 (r5683) @@ -18,6 +18,8 @@ #ifndef USBDEBUG_H #define USBDEBUG_H +#include <ehci.h> + struct ehci_debug_info { void *ehci_caps; void *ehci_regs; @@ -29,9 +31,14 @@ int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); +int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, + int value, int index, void *data, int size); +int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port); void set_ehci_base(unsigned ehci_base); void set_ehci_debug(unsigned ehci_deug); unsigned get_ehci_debug(void); void set_debug_port(unsigned port); +void usbdebug_ram_tx_byte(unsigned char data); +void usbdebug_tx_byte(unsigned char data); #endif Modified: trunk/src/lib/usbdebug.c ============================================================================== --- trunk/src/lib/usbdebug.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/lib/usbdebug.c Wed Aug 4 21:29:11 2010 (r5683) @@ -234,7 +234,7 @@ return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size); } -static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, +int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, int value, int index, void *data, int size) { unsigned pids, addr, ctrl; @@ -323,7 +323,7 @@ return -16;//-EBUSY; } -static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) +int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) { unsigned status; int ret, reps; @@ -346,6 +346,8 @@ #else #define dbgp_printk(fmt_arg...) do {} while(0) #endif + +#ifdef __PRE_RAM__ static void usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; @@ -547,5 +549,6 @@ } } +#endif Modified: trunk/src/pc80/usbdebug_serial.c ============================================================================== --- trunk/src/pc80/usbdebug_serial.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/pc80/usbdebug_serial.c Wed Aug 4 21:29:11 2010 (r5683) @@ -34,7 +34,7 @@ (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); if (dbg_info->ehci_debug) { - dbgp_bulk_write_x(dbg_info, &data, 1); + dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } @@ -47,6 +47,6 @@ ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); if (dbg_info->ehci_debug) { - dbgp_bulk_write_x(dbg_info, &data, 1); + dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c Wed Aug 4 21:29:11 2010 (r5683) @@ -26,6 +26,8 @@ #define EHCI_PORTSC 0x44 #define EHCI_DEBUG_OFFSET 0xA0 +#include <usbdebug.h> + void set_debug_port(unsigned port) { u32 dbgctl; Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c Wed Aug 4 21:29:11 2010 (r5683) @@ -31,7 +31,9 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0x98 -static void set_debug_port(unsigned port) +#include <usbdebug.h> + +void set_debug_port(unsigned port) { uint32_t dword; dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74); Modified: trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c ============================================================================== --- trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Tue Aug 3 17:42:29 2010 (r5682) +++ trunk/src/southbridge/sis/sis966/sis966_enable_usbdebug.c Wed Aug 4 21:29:11 2010 (r5683) @@ -31,7 +31,9 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0x98 -static void set_debug_port(unsigned port) +#include <usbdebug.h> + +void set_debug_port(unsigned port) { uint32_t dword; dword = pci_read_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74);

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Jetway J7F4K1G5S-LF acting weird, any suggestions?
by austinro＠msu.edu 04 Aug '10

04 Aug '10

Hi all, and thanks for your help so far. The problem now is that when I try to load seabios or filo, a fraction of a second after coreboot jumps to the payload the vga output starts goes crazy --colorful, geometric output, flashing in regular patterns.-- and coreboot restarts. The display keeps going, so I think in it's own special way it's trying to output what I'm seeing on the serial console, but it's garbage. With filo, it didn't actually display anything meaningful on the screen, it just went straight to the flashing colors. With seabios, depending on the optionsiit's built with it might display "press f12 for boot menu", then the two choices, for my hd and cd. Pressing either choice results in coreboot restarting. I'm attaching the serial log from the most recent attempt. Here's an excerpt: Attempting to map option rom on dev 00:12.0 Option rom sizing returned 0 0 Searching CBFS for prefix genroms/ Found CBFS file fallback/coreboot_ram Found CBFS file fallback/payload Found CBFS file pci1106,3344.rom Found CBFS file Press F12 for boot menu. handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 handle_hwpic1 irq=1 Mapping hd drive 0x000fdb40 to 0 pmm_malloc zone=0x000f5304 handle=ffffffff size=36 align=10 ret=0x000fdb70 (det) ebda moved from 9f800 to 9f000 pmm_malloc zone=0x000f52fc handle=ffffffff size=2048 align=10 ret=0x0009f5d0 (d) finalize PMM malloc finalize Add to e820 map: 0009f000 00001000 2 Add to e820 map: 3dfe0000 0000d000 1 Returned 53248 bytes of ZoneHigh coreboot-4.0-r5680 Mon Aug 2 17:03:35 EDT 2010 starting... In romstage.c:main() After reset status: 0040 Waiting for SMBus to warm upDIMM 0050 OFFSET 0002 After reset status: 0040 Waiting until SMBus ready Waiting until SMBus ready Read: 0008 After reset status: 0040 .Done Enabling mainboard devices DIMM 0050 OFFSET 0005 After reset status: 0040 Waiting until SMBus ready Waiting until SMBus ready Read: 0000 After reset status: 0040 DIMM 0050 OFFSET 001f After reset status: 0040 Waiting until SMBus ready Waiting until SMBus ready Read: 0001 After reset status: 0040 Found 1024MB of ram DIMM 0050 OFFSET 0011 After reset status: 0040 Waiting until SMBus ready Waiting until SMBus ready Read: 0008 After reset status: 0040 DIMM 0050 OFFSET 0004 I'm not sure what other info might be useful, but I'll provide it or try whatever is asked. A few other possible clues: the factory bios only recognized half of my installed ram, but coreboot recognized all of it. With coreinfo or memtest as payloads, it did not restart, and it displayed the proper vga output. Memtest did report RAM errors, but I didn't understand what they meant, and at the time (before I tried seabios) I thought memtest might be wrong (which is why I wanted to load a full OS to double check). Since I can't think of what else to do, I'm going investigate the Memtest errors next. Any ideas? Thanks, Rob Austin

4 10

error in FILO configuration
by ali hagigat 04 Aug '10

04 Aug '10

I have FILO source code in: /root/build/coreboot/filo and COREBOOT source code is in: /root/build/coreboot/coreboot-v4 When i execute the instruction below, it is followed by an error: /root/build/coreboot/filo> make menuconfig Libpayload config for FILO. can't find file /root/build/coreboot/filo/../libpayload/Config.in make: *** [menuconfig] Error 1 How can i correct it?

5 7

[patch] The correct way to calculate the cores in AMD fam10
by Bao, Zheng 04 Aug '10

04 Aug '10

The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8]. The bit 15 seems to be a new feature when CPU started to have more that 4 cores. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: src/northbridge/amd/amdht/h3ncmn.c =================================================================== --- src/northbridge/amd/amdht/h3ncmn.c (revision 5679) +++ src/northbridge/amd/amdht/h3ncmn.c (working copy) @@ -555,16 +555,17 @@ u8 i; ASSERT((node < nb->maxNodes)); - /* Read CmpCap */ + /* Read CmpCap [2][1:0] */ AmdPCIReadBits(MAKE_SBDFO(makePCISegmentFromNode(node), makePCIBusFromNode(node), makePCIDeviceFromNode(node), CPU_NB_FUNC_03, REG_NB_CAPABILITY_3XE8), - 13, 12, &temp); + 15, 12, &temp); + /* bit[15,13,12] composes the cores */ /* Support Downcoring */ - cores = temp + 1; + cores = ((temp & 8) >> 1) + (temp & 3) + 1; AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node), makePCIBusFromNode(node), makePCIDeviceFromNode(node),

2 1

Re: [coreboot] Enable USB Debug Device!
by Peter Stuge 04 Aug '10

04 Aug '10

Hi, silversurfer.2010(a)gmx.de wrote: > I bought the "PLX NET20DC USB Debug Device". > > Now I want to use this device for debug purpose. But I get with > different mainboards the same build error messages. > > Can anybody help? This code hasn't been exercised in fairly long I believe. It would be great if you could look into the problems. The code has also seen a few changes since the time when it worked. //Peter

2 1

need mainboard recommendations
by ron minnich 04 Aug '10

04 Aug '10

Looking for something like this: - Intel i7 single LGA 1366 socket 8MB L3 cache - 12 GB RAM DDR3-1066 - 1 Gigabit Ethernet Port - VGA Output no coreboot, sadly, this time. Any recommendations? Also, what's a good DRAM vendor? Power supply? ron

3 3

updated:Highlight trailing spaces in our editors (vim, emacs, ..)
by Bao, Zheng 04 Aug '10

04 Aug '10

When the trailing spaces are highlighted, it is easy for us to delete it and don't create new trailing spaces. Zheng Vim: Add following lines in the .vimrc "The highlight way can be in your own way. Highlight ExtraWhitespace ctermfg=DarkGray ctermbg=yellow "Show trailing whitespace match ExtraWhitespace /\s\+$/ Emacs: Add the following lines into the .emacs (setq-default show-trailing-whitespace 1)

1 0

Highlight trailing spaces in our editors (vim, emacs, ..
by Bao, Zheng 04 Aug '10

04 Aug '10

When the trailing spaces are highlighted, it is easy for us to delete it and don't create new trailing spaces. Zheng Vim: Add following lines in the .vimrc """"""""" Highlight ExtraWhitespace ctermfg=DarkGray ctermbg=yellow " Show trailing whitespace: :match ExtraWhitespace /\s\+$/ Emacs: Add the following lines into the .emacs (setq-default show-trailing-whitespace 1)

1 0

Enable USB Debug Device!
by silversurfer.2010＠gmx.de 04 Aug '10

04 Aug '10

Hello, I bought the "PLX NET20DC USB Debug Device". Now I want to use this device for debug purpose. But I get with different mainboards the same build error messages. Can anybody help? cc1: warnings being treated as errors src/console/usbdebug_console.c: In function 'set_ehci_base': src/console/usbdebug_console.c:32: error: assignment makes integer from pointer without a cast src/console/usbdebug_console.c:35: error: assignment makes pointer from integer without a cast src/console/usbdebug_console.c: In function 'set_ehci_debug': src/console/usbdebug_console.c:40: error: assignment makes pointer from integer without a cast src/console/usbdebug_console.c: In function 'get_ehci_debug': src/console/usbdebug_console.c:45: error: return makes integer from pointer without a cast src/console/usbdebug_console.c: In function 'dbgp_tx_byte': src/console/usbdebug_console.c:64: error: pointer targets in passing argument 2 of 'dbgp_bulk_write_x' differ in signedness src/include/usbdebug.h:30: note: expected 'const char *' but argument is of type 'unsigned char *' src/console/usbdebug_console.c: In function 'dbgp_tst_byte': src/console/usbdebug_console.c:79: error: return makes integer from pointer without a cast make: *** [build/console/usbdebug_console.driver.o] Error 1 Best regards

1 0

[PATCH] cleanup CAR code
by Stefan Reinauer 03 Aug '10

03 Aug '10

See patch

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coreboot August 2010