coreboot August 2010

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267 discussions

[commit] r5707 - trunk/src/devices
by repository service 17 Aug '10

17 Aug '10

Author: oxygene Date: Tue Aug 17 09:46:50 2010 New Revision: 5707 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5707 Log: Clarify comment a bit Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/src/devices/device.c Modified: trunk/src/devices/device.c ============================================================================== --- trunk/src/devices/device.c Tue Aug 17 09:14:44 2010 (r5706) +++ trunk/src/devices/device.c Tue Aug 17 09:46:50 2010 (r5707) @@ -583,7 +583,9 @@ else continue; - /* Is it already outside the limits? */ + /* Is it a fixed resource outside the current known region? + If so, we don't have to consider it - it will be handled + correctly and doesn't affect current region's limits */ if (((res->base + res->size -1) < lim->base) || (res->base > lim->limit)) continue;

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[commit] r5706 - trunk/util/superiotool
by repository service 17 Aug '10

17 Aug '10

Author: oxygene Date: Tue Aug 17 09:14:44 2010 New Revision: 5706 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5706 Log: Add support for the Nuvoton NCT5571D. This chip acts nothing like the other supported Nuvoton chip, but identical to a Winbond, and Nuvoton is a subsidary of Winbond, so for simplicity's sake I've added it to the Winbond file. Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/superiotool/winbond.c Modified: trunk/util/superiotool/winbond.c ============================================================================== --- trunk/util/superiotool/winbond.c Tue Aug 17 08:18:47 2010 (r5705) +++ trunk/util/superiotool/winbond.c Tue Aug 17 09:14:44 2010 (r5706) @@ -238,6 +238,52 @@ {0xa51, "W83667HG", { /* See also: http://lists.lm-sensors.org/pipermail/lm-sensors/2008-July/023683.html */ {EOT}}}, + {0xb35, "Nuvoton NCT5571D", { + {NOLDN, NULL, + {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, + 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, + {RSVD,0xb3,NANA,0xff,0x00,0x40,0x00,MISC,0xff,0x20,0x00, + 0x00,0x7f,0x0a,0x08,0x00,MISC,EOT}}, + {0x2, "COM1", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x01,0x03,0xf8,0x04,0x00,EOT}}, + {0x5, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}}, + {0x7, "GPIO 6, GPIO 8, GPIO 9", + {0x30,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,0xea,0xeb,0xec,0xed, + 0xee,0xf4,0xf5,0xf6,0xf7,0xf8,EOT}, + {0x18,0xef,MISC,0x00,0x00,0xff,MISC,0x00,0x00,RSVD,0x00, + 0x00,0xff,MISC,0x00,0x00,0x00,EOT}}, + {0x9, "GPIO 2, GPIO 3, GPIO 5", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xea, + 0xeb,0xf4,0xf5,0xf6,0xf7,0xfe,EOT}, + {0x05,0xff,MISC,0x00,0x00,0xff,MISC,0x00,0x00,0x00,0x00, + 0x00,0xff,MISC,0x00,0x00,0x00,EOT}}, + {0xa, "ACPI", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,0xf2, + 0xf3,0xf4,0xf6,0xf7,0xfe,0xff,EOT}, + {0x01,0x00,0xff,0x00,0x00,0x02,0x1c,0x00,RSVD,0x00,0x7c, + 0x00,0x00,0x00,0x00,0x00,0x30,EOT}}, + {0xb, "Hardware monitor", + {0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xf0,0xf5,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xc1,0x10,EOT}}, + {0xc, "PECI", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe8,0xe9,0xea,0xec, + 0xee,0xef,0xf1,0xf2,0xf3,0xfe,0xff,EOT}, + {0x00,0x48,0x48,0x48,0x48,0x00,0x00,0x00,RSVD,0x00,0x00, + 0x01,0x5a,0x48,0x50,0x10,0x80,0x01,EOT}}, + {0xd, "SUSLED", + {0xec,EOT}, + {0x01,EOT}}, + {0xf, "GPIO Push-Pull/OD Select", + {0xe0,0xe1,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,0xf0,0xf1, + 0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc, + 0xfd,0xfe,0xff,EOT}, + {RSVD,0xfd,RSVD,0xf7,0xcb,RSVD,0xff,0xff,0x00,MISC,MISC, + MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC, + MISC,MISC,MISC,EOT}}, + {EOT}}}, /* ID and rev */ {0x9771, "W83977F-A/G-A/AF-A/AG-A", {

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[PATCH] update processor names for AMD
by xdrudis 17 Aug '10

17 Aug '10

Hello. This is a patch for setting the processor names updated to the same doc as the original but revision June 2010. It applies to svn 5703 and I tested it with my previous patch.warnerrors and patch.serial1 and it makes no difference. I can't tell whether it works yet, but maybe someone else can try it if their boards boot. Signed off by: Xavi Drudis Ferran <xdrudis(a)tinet.cat>

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[commit] r5705 - trunk/src/southbridge/amd/rs780
by repository service 17 Aug '10

17 Aug '10

Author: oxygene Date: Tue Aug 17 08:18:47 2010 New Revision: 5705 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5705 Log: Look for actual framebuffer size instead of hardcoding UMA Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Marc Jones <marcj303(a)gmail.com> Modified: trunk/src/southbridge/amd/rs780/rs780_gfx.c Modified: trunk/src/southbridge/amd/rs780/rs780_gfx.c ============================================================================== --- trunk/src/southbridge/amd/rs780/rs780_gfx.c Tue Aug 17 08:12:59 2010 (r5704) +++ trunk/src/southbridge/amd/rs780/rs780_gfx.c Tue Aug 17 08:18:47 2010 (r5705) @@ -660,8 +660,10 @@ /* Set UMA in the 780 side. */ /* UMA start address, size. */ - /* The same value in spite of system memory size. */ - nbmc_write_index(nb_dev, 0x10, 0xcfffc000); + /* The UMA starts at 0xC0000000 of internal RS780 address space + [31:16] addr of last byte | [31:16] addr of first byte + */ + nbmc_write_index(nb_dev, 0x10, ((uma_memory_size - 1 + 0xC0000000) & (~0xffff)) | 0xc000); nbmc_write_index(nb_dev, 0x11, uma_memory_base); nbmc_write_index(nb_dev, 0x12, 0); nbmc_write_index(nb_dev, 0xf0, 256);

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[PATCH] Eliminate some warnings treated as errors
by xdrudis 17 Aug '10

17 Aug '10

After I copied mainboard/amd/tilapia-fam10 dir for mainboard/asus/m4a77td-pro, adapted it a litlle and changed mainboard/asus/Kconfig and makemenuconfig, I had to change a few small things because I got warnings treated as erroes for unused symbols. patch.warnerror With only this patch applied to svn rev 5701 I can compile but I can't see anything in the serial port. (I can send the current diff between m4a77td-pro and tilapia-fam10, but maybe I wait until it boots?) Signed off by: Xavi Drudis Ferran <xdrudis(a)tinet.cat>

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[commit] r5704 - trunk/src/northbridge/amd/amdht
by repository service 17 Aug '10

17 Aug '10

Author: oxygene Date: Tue Aug 17 08:12:59 2010 New Revision: 5704 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5704 Log: Fix warnings (that become errors) in AMDHT for certain configurations (unused functions) Signed-off-by: Xavi Drudis Ferran <xdrudis(a)tinet.cat> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/src/northbridge/amd/amdht/h3finit.c trunk/src/northbridge/amd/amdht/h3ncmn.c Modified: trunk/src/northbridge/amd/amdht/h3finit.c ============================================================================== --- trunk/src/northbridge/amd/amdht/h3finit.c Tue Aug 17 04:14:53 2010 (r5703) +++ trunk/src/northbridge/amd/amdht/h3finit.c Tue Aug 17 08:12:59 2010 (r5704) @@ -845,8 +845,6 @@ */ static void coherentInit(sMainData *pDat) { - u8 i, j; - #ifdef HT_BUILD_NC_ONLY /* Replace discovery process with: * No other nodes, no coherent links @@ -856,6 +854,8 @@ pDat->TotalLinks = 0; pDat->nb->enableRoutingTables(0, pDat->nb); #else + u8 i, j; + pDat->NodesDiscovered = 0; pDat->TotalLinks = 0; for (i = 0; i < MAX_NODES; i++) Modified: trunk/src/northbridge/amd/amdht/h3ncmn.c ============================================================================== --- trunk/src/northbridge/amd/amdht/h3ncmn.c Tue Aug 17 04:14:53 2010 (r5703) +++ trunk/src/northbridge/amd/amdht/h3ncmn.c Tue Aug 17 08:12:59 2010 (r5704) @@ -1553,6 +1553,8 @@ * * --------------------------------------------------------------------------------------- */ +#ifndef HT_BUILD_NC_ONLY + static void fam0fWriteHTLinkCmdBufferAlloc(u8 node, u8 link, u8 req, u8 preq, u8 rsp, u8 prb) { u32 temp; @@ -1574,6 +1576,7 @@ temp = prb; AmdPCIWriteBits(currentPtr, 15, 12, &temp); } +#endif /* HT_BUILD_NC_ONLY */ /**---------------------------------------------------------------------------------------- * @@ -1594,6 +1597,8 @@ * * --------------------------------------------------------------------------------------- */ +#ifndef HT_BUILD_NC_ONLY + static void fam0fWriteHTLinkDatBufferAlloc(u8 node, u8 link, u8 reqD, u8 preqD, u8 rspD) { u32 temp; @@ -1612,6 +1617,7 @@ temp = rspD; AmdPCIWriteBits(currentPtr, 26, 24, &temp); } +#endif /* HT_BUILD_NC_ONLY */ /**---------------------------------------------------------------------------------------- *

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[PATCH] sconfig parser bug fixes
by Stefan Reinauer 17 Aug '10

17 Aug '10

See patch -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[commit] r5702 - trunk/src/mainboard/tyan/s2881
by repository service 17 Aug '10

17 Aug '10

Author: myles Date: Mon Aug 16 22:00:49 2010 New Revision: 5702 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5702 Log: White space changes for s2881 device tree. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/src/mainboard/tyan/s2881/devicetree.cb Modified: trunk/src/mainboard/tyan/s2881/devicetree.cb ============================================================================== --- trunk/src/mainboard/tyan/s2881/devicetree.cb Mon Aug 16 20:21:56 2010 (r5701) +++ trunk/src/mainboard/tyan/s2881/devicetree.cb Mon Aug 16 22:00:49 2010 (r5702) @@ -1,131 +1,129 @@ chip northbridge/amd/amdk8/root_complex - device lapic_cluster 0 on - chip cpu/amd/socket_940 - device lapic 0 on end - end + device lapic_cluster 0 on + chip cpu/amd/socket_940 + device lapic 0 on end + end + end + device pci_domain 0 on + chip northbridge/amd/amdk8 + device pci 18.0 on end # link 0 + device pci 18.0 on end # link 1 + device pci 18.0 on # link 2 + chip southbridge/amd/amd8131 + # the on/off keyword is mandatory + device pci 0.0 on + device pci 9.0 on end # Broadcom 5704 + device pci 9.1 on end + device pci a.0 on end # Adaptic + device pci a.1 on end + end + device pci 0.1 on end + device pci 1.0 on end + device pci 1.1 on end end - device pci_domain 0 on - chip northbridge/amd/amdk8 - device pci 18.0 on end # LDT0 - device pci 18.0 on end # LDT1 - device pci 18.0 on # northbridge - # devices on link 2, link 2 == LDT 2 - chip southbridge/amd/amd8131 - # the on/off keyword is mandatory - device pci 0.0 on - device pci 9.0 on end # Broadcom 5704 - device pci 9.1 on end - device pci a.0 on end # Adaptic - device pci a.1 on end - end - device pci 0.1 on end - device pci 1.0 on end - device pci 1.1 on end - end - chip southbridge/amd/amd8111 - # this "device pci 0.0" is the parent the next one - # PCI bridge - device pci 0.0 on - device pci 0.0 on end - device pci 0.1 on end - device pci 0.2 off end - device pci 1.0 off end - device pci 5.0 on end # SiI - device pci 6.0 on end - end - device pci 1.0 on - chip superio/winbond/w83627hf - device pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 off # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.2 on # Com1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 off # Com2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.5 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 12 - end - device pnp 2e.6 off # CIR - io 0x60 = 0x100 - end - device pnp 2e.7 off # GAME_MIDI_GIPO1 - io 0x60 = 0x220 - io 0x62 = 0x300 - irq 0x70 = 9 - end - device pnp 2e.8 off end # GPIO2 - device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI - device pnp 2e.b on # HW Monitor - io 0x60 = 0x290 - irq 0x70 = 5 - end - end - end - device pci 1.1 on end - device pci 1.2 on end - device pci 1.3 on - chip drivers/generic/generic #dimm 0-0-0 - device i2c 50 on end - end - chip drivers/generic/generic #dimm 0-0-1 - device i2c 51 on end - end - chip drivers/generic/generic #dimm 0-1-0 - device i2c 52 on end - end - chip drivers/generic/generic #dimm 0-1-1 - device i2c 53 on end - end - chip drivers/generic/generic #dimm 1-0-0 - device i2c 54 on end - end - chip drivers/generic/generic #dimm 1-0-1 - device i2c 55 on end - end - chip drivers/generic/generic #dimm 1-1-0 - device i2c 56 on end - end - chip drivers/generic/generic #dimm 1-1-1 - device i2c 57 on end - end - chip drivers/i2c/adt7463 # CPU0/1 temp, CPU1 vid, SYS FAN 1/2/3 - device i2c 2d on end - end - chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 4,CPU0 vid, CPU0/1 FAN - device i2c 2a on end - end - chip drivers/generic/generic # Winbond HWM 0x92 - device i2c 49 on end - end - chip drivers/generic/generic # Winbond HWM 0x94 - device i2c 4a on end - end - end # acpi - device pci 1.5 off end - device pci 1.6 off end - register "ide0_enable" = "1" - register "ide1_enable" = "1" - end - end # device pci 18.0 - - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - end - end + chip southbridge/amd/amd8111 + # this "device pci 0.0" is the parent the next one + # PCI bridge + device pci 0.0 on + device pci 0.0 on end + device pci 0.1 on end + device pci 0.2 off end + device pci 1.0 off end + device pci 5.0 on end # SiI + device pci 6.0 on end + end + device pci 1.0 on + chip superio/winbond/w83627hf + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x220 + io 0x62 = 0x300 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end + end + end + device pci 1.1 on end + device pci 1.2 on end + device pci 1.3 on + chip drivers/generic/generic #dimm 0-0-0 + device i2c 50 on end + end + chip drivers/generic/generic #dimm 0-0-1 + device i2c 51 on end + end + chip drivers/generic/generic #dimm 0-1-0 + device i2c 52 on end + end + chip drivers/generic/generic #dimm 0-1-1 + device i2c 53 on end + end + chip drivers/generic/generic #dimm 1-0-0 + device i2c 54 on end + end + chip drivers/generic/generic #dimm 1-0-1 + device i2c 55 on end + end + chip drivers/generic/generic #dimm 1-1-0 + device i2c 56 on end + end + chip drivers/generic/generic #dimm 1-1-1 + device i2c 57 on end + end + chip drivers/i2c/adt7463 # CPU0/1 temp, CPU1 vid, SYS FAN 1/2/3 + device i2c 2d on end + end + chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 4,CPU0 vid, CPU0/1 FAN + device i2c 2a on end + end + chip drivers/generic/generic # Winbond HWM 0x92 + device i2c 49 on end + end + chip drivers/generic/generic # Winbond HWM 0x94 + device i2c 4a on end + end + end # acpi + device pci 1.5 off end + device pci 1.6 off end + register "ide0_enable" = "1" + register "ide1_enable" = "1" + end + end # device pci 18.0 + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end + end end

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K8 SMP broken?
by Torsten Duwe 17 Aug '10

17 Aug '10

Hi all, has anybody tested K8 SMP recently? I've built r5689 for a Tyan Thunder K8W (s2885, dual socket 940), but it hangs. Commenting out allow_all_aps_stop(bsp_apicid) brings it up, but with a single CPU. Anyone feeling guilty? ;-) Torsten

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[PATCH] coreboot kconfig
by baiyin cai 17 Aug '10

17 Aug '10

hi all, Since the deadline of GSOC has passed, I would like to post my patch about coreboot kconfig. Thanks to Marc who help me lots of things. He told me lots of linux programming and coreboot building things. Also thanks to QingPei, who helps me a lot about the detailed things. Like the kconfig language learning, linux makefile rules etc. The patch which i send is trying to make coreboot kconfig building can load the payload configs and building payload like filo or coreinfo by one interface. The patch support two payload: Filo and coreinfo. If devs want to use coreboot as before, it's fine, the patch support the old method by use "make config/menuconfig/xconfig etc" and "make". Anyone who want to try the new feature can use "make config/menuconfig/xconfig PAYLOAD=filo/coreinfo" to config the coreboot+payload at one time. then use "make" to build the whole things. I know there may have any improper methods. But the method used is the way i can find. Any new method will be welcome. I will keep following these things, even GSOC is end. More consideration will be posted to the coreboot blogs later. Signed-off-by: Cai Bai Yin < caibaiyin.pku(a)gmail.com>

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coreboot August 2010