coreboot February 2010

coreboot@coreboot.org

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310 discussions

[PATCH]Hide ldscripts, too
by Patrick Georgi 25 Feb '10

25 Feb '10

Hi, the same thing I did with crt0s, just with ldscripts this time. Most mainboard-Makefile.inc's look _very_ alike now. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

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[PATCH]Hide crt0s from user
by Patrick Georgi 25 Feb '10

25 Feb '10

Hi, attached patch moves all crt0s from the mainboards' Makefiles to src/arch/i386/Makefile.inc, adding conditionals where necessary. Thus, for adding a board, you don't have to care about these anymore. The unification leads to some changes, some (presumably) harmless, others for the good: enable_fpu.inc, enable_sse.inc etc. appear on lots more boards. These I think are harmless Some romstraps were missing (or in one case too much), and this is much more regular now, depending only on the presence of the chipset component that requires them. In particular, these boards were missing romstraps, which were lost on the newconfig/kconfig transition: - asus/a8n_e - msi/ms7260 - msi/ms9282 - sunw/ultra40 It might be that these didn't work with Kconfig and will work again after this patch. via/epia-m had the northbridge/via/vx800 romstrap without using that northbridge. There's also a new target "printcrt0s" in the toplevel Makefile which I used for debugging. It might be helpful for people who want to debug crt0s for the transition, it certainly was for me. The instructions to migration locally developed boards are simple: - Apply the Makefile patch only - Note the output of "make printcrt0s" so you have a list of crt0s for your board. - Apply the patch - Remove all crt0s (and crt0-y if you didn't update in a while) in your mainboard's Makefile.inc - Compare the new output of "make printcrt0s" with the old one. It doesn't hurt if a romstrap is at a different place in the list. Alternatively, just remove crt0s and try if your board still boots ;-) There are three options how to move on from here (if this change is accepted): 1. Keep the decisions in Makefile.inc 2. Move chip specific includes into the chip's Makefile.inc 3. Create a static file, instead of building it from crt0s Option 2 would move chipset decisions to the chipsets, option 3 would simplify the buildsystem. Both are simple, now that things are centralized. The other future development would be to do the same to ldscripts, but I didn't want to increase the patch size too much. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

4 7

New Target - HowTo
by Radim 25 Feb '10

25 Feb '10

Hello, I'm interested in coreboot for year or two, but now I found older board which has all supported chips on. Some time ago, I found in documentation how to make add new target (mainboard), but now I can't find it anymore. Can you please point me to some documentations dealing with this process (creating Kconfig, devicetree.cb, ...)? My board is: QDI P6I440BX/B1 Brilliant - I lspci output: 00:00.0 Host bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 02) 00:01.0 PCI bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 02) 00:07.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA (rev 02) 00:07.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01) 00:07.2 USB Controller: Intel Corporation 82371AB/EB/MB PIIX4 USB (rev 01) 00:07.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02) Very similar board is ASUS P2B, same chips but different vendor (bud PCB layout is very similar). Flashrom is working, PLCC32 socket soldered on board, additional EEPROM prepared, so where can I start? Thanks for any suggestions Radim

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[commit] r5163 - in trunk/src: mainboard/digitallogic/adl855pc northbridge/intel northbridge/intel/i855 northbridge/intel/i855gme northbridge/intel/i855pm
by repository service 25 Feb '10

25 Feb '10

Author: stepan Date: Thu Feb 25 19:23:23 2010 New Revision: 5163 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5163 Log: Drop i855pm port and rename i855gme to i855 instead. This patch also changes the digitallogic/adl855pc to use that port. It probably won't work, but at least we will get an error if something breaks compilation of the i855 code that is there. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Added: trunk/src/northbridge/intel/i855/ - copied from r5162, trunk/src/northbridge/intel/i855gme/ Deleted: trunk/src/northbridge/intel/i855gme/ trunk/src/northbridge/intel/i855pm/ Modified: trunk/src/mainboard/digitallogic/adl855pc/Kconfig trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb trunk/src/mainboard/digitallogic/adl855pc/romstage.c trunk/src/northbridge/intel/Kconfig trunk/src/northbridge/intel/Makefile.inc trunk/src/northbridge/intel/i855/Kconfig trunk/src/northbridge/intel/i855/chip.h trunk/src/northbridge/intel/i855/northbridge.c Modified: trunk/src/mainboard/digitallogic/adl855pc/Kconfig ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/Kconfig Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/mainboard/digitallogic/adl855pc/Kconfig Thu Feb 25 19:23:23 2010 (r5163) @@ -2,7 +2,7 @@ bool "smartModule855" select ARCH_X86 select CPU_INTEL_SOCKET_MPGA479M - select NORTHBRIDGE_INTEL_I855PM + select NORTHBRIDGE_INTEL_I855 select SOUTHBRIDGE_INTEL_I82801DBM select SUPERIO_WINBOND_W83627HF select ROMCC Modified: trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb Thu Feb 25 19:23:23 2010 (r5163) @@ -1,4 +1,4 @@ -chip northbridge/intel/i855pm +chip northbridge/intel/i855 device pci_domain 0 on device pci 0.0 on end device pci 1.0 on end Modified: trunk/src/mainboard/digitallogic/adl855pc/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/romstage.c Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/mainboard/digitallogic/adl855pc/romstage.c Thu Feb 25 19:23:23 2010 (r5163) @@ -17,7 +17,7 @@ #include "arch/i386/lib/console.c" #include "lib/ramtest.c" #include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c" -#include "northbridge/intel/i855pm/raminit.h" +#include "northbridge/intel/i855/raminit.h" #if 0 #include "cpu/p6/apic_timer.c" @@ -25,7 +25,7 @@ #endif #include "cpu/x86/lapic/boot_cpu.c" -#include "northbridge/intel/i855pm/debug.c" +#include "northbridge/intel/i855/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" @@ -57,8 +57,8 @@ return smbus_read_byte(device, address); } -#include "northbridge/intel/i855pm/raminit.c" -#include "northbridge/intel/i855pm/reset_test.c" +#include "northbridge/intel/i855/raminit.c" +#include "northbridge/intel/i855/reset_test.c" #include "lib/generic_sdram.c" static void main(unsigned long bist) Modified: trunk/src/northbridge/intel/Kconfig ============================================================================== --- trunk/src/northbridge/intel/Kconfig Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/northbridge/intel/Kconfig Thu Feb 25 19:23:23 2010 (r5163) @@ -6,6 +6,5 @@ source src/northbridge/intel/i440lx/Kconfig source src/northbridge/intel/i82810/Kconfig source src/northbridge/intel/i82830/Kconfig -source src/northbridge/intel/i855gme/Kconfig -source src/northbridge/intel/i855pm/Kconfig +source src/northbridge/intel/i855/Kconfig source src/northbridge/intel/i945/Kconfig Modified: trunk/src/northbridge/intel/Makefile.inc ============================================================================== --- trunk/src/northbridge/intel/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/northbridge/intel/Makefile.inc Thu Feb 25 19:23:23 2010 (r5163) @@ -6,6 +6,5 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830 -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855GME) += i855gme -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855PM) += i855pm +subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945 Modified: trunk/src/northbridge/intel/i855/Kconfig ============================================================================== --- trunk/src/northbridge/intel/i855gme/Kconfig Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/northbridge/intel/i855/Kconfig Thu Feb 25 19:23:23 2010 (r5163) @@ -1,4 +1,4 @@ -config NORTHBRIDGE_INTEL_I855GME +config NORTHBRIDGE_INTEL_I855 bool select HAVE_HIGH_TABLES Modified: trunk/src/northbridge/intel/i855/chip.h ============================================================================== --- trunk/src/northbridge/intel/i855gme/chip.h Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/northbridge/intel/i855/chip.h Thu Feb 25 19:23:23 2010 (r5163) @@ -18,8 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -struct northbridge_intel_i855gme_config +struct northbridge_intel_i855_config { }; -extern struct chip_operations northbridge_intel_i855gme_ops; +extern struct chip_operations northbridge_intel_i855_ops; Modified: trunk/src/northbridge/intel/i855/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i855gme/northbridge.c Thu Feb 25 18:03:17 2010 (r5162) +++ trunk/src/northbridge/intel/i855/northbridge.c Thu Feb 25 19:23:23 2010 (r5163) @@ -177,7 +177,7 @@ } } -struct chip_operations northbridge_intel_i855gme_ops = { - CHIP_NAME("Intel 855GME Northbridge") +struct chip_operations northbridge_intel_i855_ops = { + CHIP_NAME("Intel 855 Northbridge") .enable_dev = enable_dev, };

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[commit] r5162 - in trunk: . src/arch/i386 src/cpu/via/model_c3 src/cpu/via/model_c7 src/mainboard src/mainboard/amd/db800 src/mainboard/amd/dbm690t src/mainboard/amd/norwich src/mainboard/amd/pist...
by repository service 25 Feb '10

25 Feb '10

Author: oxygene Date: Thu Feb 25 18:03:17 2010 New Revision: 5162 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5162 Log: Unify crt0s setup to src/arch/i386/Makefile.inc. This variable is not something users have to concern themselves with anymore. Also fixes some wrong romstrap configs for boards, fixing a couple of them. Also add "make printcrt0s" target for debugging crt0s when updating modified checkouts. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile trunk/src/arch/i386/Makefile.inc trunk/src/cpu/via/model_c3/Kconfig trunk/src/cpu/via/model_c7/Kconfig trunk/src/mainboard/Makefile.k8_CAR.inc trunk/src/mainboard/Makefile.k8_ck804.inc trunk/src/mainboard/Makefile.romccboard.inc trunk/src/mainboard/amd/db800/Makefile.inc trunk/src/mainboard/amd/dbm690t/Makefile.inc trunk/src/mainboard/amd/norwich/Makefile.inc trunk/src/mainboard/amd/pistachio/Makefile.inc trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc trunk/src/mainboard/artecgroup/dbe61/Makefile.inc trunk/src/mainboard/asus/a8n_e/Makefile.inc trunk/src/mainboard/asus/a8v-e_se/Makefile.inc trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc trunk/src/mainboard/bcom/winnetp680/Makefile.inc trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc trunk/src/mainboard/gigabyte/m57sli/Makefile.inc trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc trunk/src/mainboard/intel/d945gclf/Makefile.inc trunk/src/mainboard/intel/eagleheights/Makefile.inc trunk/src/mainboard/iwill/dk8_htx/Makefile.inc trunk/src/mainboard/jetway/j7f24/Makefile.inc trunk/src/mainboard/kontron/986lcd-m/Makefile.inc trunk/src/mainboard/kontron/kt690/Makefile.inc trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc trunk/src/mainboard/msi/ms7260/Makefile.inc trunk/src/mainboard/msi/ms9282/Makefile.inc trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc trunk/src/mainboard/pcengines/alix1c/Makefile.inc trunk/src/mainboard/roda/rk886ex/Makefile.inc trunk/src/mainboard/supermicro/h8dme/Makefile.inc trunk/src/mainboard/supermicro/h8dmr/Makefile.inc trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc trunk/src/mainboard/technexion/tim5690/Makefile.inc trunk/src/mainboard/technexion/tim8690/Makefile.inc trunk/src/mainboard/tyan/s2735/Makefile.inc trunk/src/mainboard/tyan/s2912/Makefile.inc trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc trunk/src/mainboard/via/epia-m/Makefile.inc trunk/src/mainboard/via/epia-m700/Makefile.inc trunk/src/mainboard/via/epia-n/Makefile.inc trunk/src/mainboard/via/epia/Makefile.inc trunk/src/mainboard/via/vt8454c/Makefile.inc trunk/src/mainboard/winent/pl6064/Makefile.inc Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/Makefile Thu Feb 25 18:03:17 2010 (r5162) @@ -219,6 +219,9 @@ @echo alldirs:=$(alldirs) @echo allsrc=$(allsrc) +printcrt0s: + @echo $(patsubst $(top)/%,%,$(crt0s)) + OBJS := $(patsubst %,$(obj)/%,$(TARGETS-y)) INCLUDES := -I$(top)/src -I$(top)/src/include -I$(obj) -I$(top)/src/arch/$(ARCHDIR-y)/include INCLUDES += -I$(shell $(CC) -print-search-dirs | head -n 1 | cut -d' ' -f2)include Modified: trunk/src/arch/i386/Makefile.inc ============================================================================== --- trunk/src/arch/i386/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/arch/i386/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -62,9 +62,98 @@ ####################################################################### # done -# crt0s should be set by now -ifeq ($(crt0s),) -$(error crt0s are empty. If your board still uses crt0-y and ldscript-y: It shouldn't, we moved away from that in r5065) +crt0s := +ifeq ($(CONFIG_BIG_BOOTBLOCK),y) +crt0s += $(src)/cpu/x86/16bit/entry16.inc +endif +crt0s += $(src)/cpu/x86/32bit/entry32.inc +ifeq ($(CONFIG_BIG_BOOTBLOCK),y) +crt0s += $(src)/cpu/x86/16bit/reset16.inc +ifeq ($(CONFIG_ROMCC),y) +crt0s += $(src)/arch/i386/lib/cpu_reset.inc +endif +crt0s += $(src)/arch/i386/lib/id.inc +endif + +crt0s += $(src)/cpu/x86/fpu_enable.inc +ifeq ($(CONFIG_CPU_AMD_GX1),y) +crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc +crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc +endif +ifeq ($(CONFIG_SSE),y) +crt0s += $(src)/cpu/x86/sse_enable.inc +endif + +ifeq ($(CONFIG_CPU_AMD_LX),y) +crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y) +crt0s += $(src)/cpu/amd/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_CPU_INTEL_CORE),y) +crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc +endif +# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. +ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y) +crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc +endif +# should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet +ifeq ($(CONFIG_BOARD_VIA_VT8454C),y) +crt0s += $(src)/cpu/via/car/cache_as_ram.inc +endif +ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y) +crt0s += $(src)/cpu/via/car/cache_as_ram.inc +endif +# who else could use this? +ifeq ($(CONFIG_BOARD_TYAN_S2735),y) +crt0s += $(src)/cpu/x86/car/cache_as_ram.inc +endif + +ifeq ($(CONFIG_BIG_BOOTBLOCK),y) +ifeq ($(CONFIG_ROMCC),y) +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc +endif +endif +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc + +ifeq ($(CONFIG_SSE),y) +crt0s += $(src)/cpu/x86/sse_disable.inc +endif +ifeq ($(CONFIG_MMX),y) +crt0s += $(src)/cpu/x86/mmx_disable.inc +endif + +ifeq ($(CONFIG_BIG_BOOTBLOCK),y) +ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y) +crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc +endif +ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y) +crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc +endif +ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y) +crt0s += $(src)/southbridge/via/k8t890/romstrap.inc +endif +ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y) +crt0s += $(src)/northbridge/via/vx800/romstrap.inc +endif endif OPTION_TABLE_H:= Modified: trunk/src/cpu/via/model_c3/Kconfig ============================================================================== --- trunk/src/cpu/via/model_c3/Kconfig Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/cpu/via/model_c3/Kconfig Thu Feb 25 18:03:17 2010 (r5162) @@ -1,3 +1,4 @@ config CPU_VIA_C3 bool select UDELAY_TSC + select MMX Modified: trunk/src/cpu/via/model_c7/Kconfig ============================================================================== --- trunk/src/cpu/via/model_c7/Kconfig Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/cpu/via/model_c7/Kconfig Thu Feb 25 18:03:17 2010 (r5162) @@ -1,4 +1,5 @@ config CPU_VIA_C7 bool select UDELAY_TSC + select MMX select SSE2 Modified: trunk/src/mainboard/Makefile.k8_CAR.inc ============================================================================== --- trunk/src/mainboard/Makefile.k8_CAR.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/Makefile.k8_CAR.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -33,12 +33,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/Makefile.k8_ck804.inc ============================================================================== --- trunk/src/mainboard/Makefile.k8_ck804.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/Makefile.k8_ck804.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -36,13 +36,6 @@ initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/Makefile.romccboard.inc ============================================================================== --- trunk/src/mainboard/Makefile.romccboard.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/Makefile.romccboard.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -21,35 +21,6 @@ initobj-y += crt0.o -crt0s := -ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -crt0s += $(src)/cpu/x86/16bit/entry16.inc -endif -crt0s += $(src)/cpu/x86/32bit/entry32.inc -ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/cpu_reset.inc -crt0s += $(src)/arch/i386/lib/id.inc -endif -crt0s += $(src)/cpu/x86/fpu_enable.inc -ifeq ($(CONFIG_CPU_AMD_GX1),y) -crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc -crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc -endif -ifeq ($(CONFIG_SSE),y) -crt0s += $(src)/cpu/x86/sse_enable.inc -endif -ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc -endif -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -ifeq ($(CONFIG_SSE),y) -crt0s += $(src)/cpu/x86/sse_disable.inc -endif -ifeq ($(CONFIG_MMX),y) -crt0s += $(src)/cpu/x86/mmx_disable.inc -endif - ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ifeq ($(CONFIG_BIG_BOOTBLOCK),y) ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/db800/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/db800/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/db800/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,12 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/dbm690t/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/dbm690t/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/dbm690t/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -31,12 +31,6 @@ initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/norwich/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/norwich/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/norwich/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/pistachio/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/pistachio/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/pistachio/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,13 +30,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -35,13 +35,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -38,10 +38,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/artecgroup/dbe61/Makefile.inc ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/artecgroup/dbe61/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/asus/a8n_e/Makefile.inc ============================================================================== --- trunk/src/mainboard/asus/a8n_e/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/asus/a8n_e/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -27,13 +27,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/asus/a8v-e_se/Makefile.inc ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/asus/a8v-e_se/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -9,14 +9,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/southbridge/via/k8t890/romstrap.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -27,10 +27,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/bcom/winnetp680/Makefile.inc ============================================================================== --- trunk/src/mainboard/bcom/winnetp680/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/bcom/winnetp680/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -34,11 +34,4 @@ ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/fpu_enable.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -crt0s += $(src)/cpu/x86/mmx_disable.inc Modified: trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,12 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/gigabyte/m57sli/Makefile.inc ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/gigabyte/m57sli/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -31,13 +31,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc ============================================================================== --- trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/intel/d945gclf/Makefile.inc ============================================================================== --- trunk/src/mainboard/intel/d945gclf/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/intel/d945gclf/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -35,13 +35,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/intel/eagleheights/Makefile.inc ============================================================================== --- trunk/src/mainboard/intel/eagleheights/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/intel/eagleheights/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -9,14 +9,7 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc # Use Intel Core (not Core 2) code for CAR init, any CPU might be used. -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/iwill/dk8_htx/Makefile.inc ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/iwill/dk8_htx/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -34,13 +34,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/jetway/j7f24/Makefile.inc ============================================================================== --- trunk/src/mainboard/jetway/j7f24/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/jetway/j7f24/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,11 +30,4 @@ ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/fpu_enable.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -crt0s += $(src)/cpu/x86/mmx_disable.inc Modified: trunk/src/mainboard/kontron/986lcd-m/Makefile.inc ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/kontron/986lcd-m/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -36,9 +36,6 @@ initobj-y += crt0.o -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/kontron/kt690/Makefile.inc ============================================================================== --- trunk/src/mainboard/kontron/kt690/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/kontron/kt690/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,13 +30,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/msi/ms7260/Makefile.inc ============================================================================== --- trunk/src/mainboard/msi/ms7260/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/msi/ms7260/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,12 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/msi/ms9282/Makefile.inc ============================================================================== --- trunk/src/mainboard/msi/ms9282/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/msi/ms9282/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,12 +30,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,13 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/pcengines/alix1c/Makefile.inc ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/pcengines/alix1c/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,13 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/roda/rk886ex/Makefile.inc ============================================================================== --- trunk/src/mainboard/roda/rk886ex/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/roda/rk886ex/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -37,13 +37,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/supermicro/h8dme/Makefile.inc ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/supermicro/h8dme/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,14 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/supermicro/h8dmr/Makefile.inc ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/supermicro/h8dmr/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -27,14 +27,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -27,10 +27,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -27,10 +27,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/technexion/tim5690/Makefile.inc ============================================================================== --- trunk/src/mainboard/technexion/tim5690/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/technexion/tim5690/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -36,13 +36,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/technexion/tim8690/Makefile.inc ============================================================================== --- trunk/src/mainboard/technexion/tim8690/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/technexion/tim8690/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,13 +30,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/tyan/s2735/Makefile.inc ============================================================================== --- trunk/src/mainboard/tyan/s2735/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/tyan/s2735/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -32,13 +32,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/tyan/s2912/Makefile.inc ============================================================================== --- trunk/src/mainboard/tyan/s2912/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/tyan/s2912/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,13 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -28,9 +28,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/32bit/entry32.lds Modified: trunk/src/mainboard/via/epia-m/Makefile.inc ============================================================================== --- trunk/src/mainboard/via/epia-m/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/via/epia-m/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -30,17 +30,8 @@ ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds -ldscripts += $(src)/northbridge/via/vx800/romstrap.lds ldscripts += $(src)/cpu/x86/16bit/reset16.lds ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/northbridge/via/vx800/romstrap.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/fpu_enable.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -crt0s += $(src)/cpu/x86/mmx_disable.inc Modified: trunk/src/mainboard/via/epia-m700/Makefile.inc ============================================================================== --- trunk/src/mainboard/via/epia-m700/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/via/epia-m700/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -36,11 +36,4 @@ ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/northbridge/via/vx800/romstrap.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/via/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc Modified: trunk/src/mainboard/via/epia-n/Makefile.inc ============================================================================== --- trunk/src/mainboard/via/epia-n/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/via/epia-n/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -33,11 +33,4 @@ ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/fpu_enable.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -crt0s += $(src)/cpu/x86/mmx_disable.inc Modified: trunk/src/mainboard/via/epia/Makefile.inc ============================================================================== --- trunk/src/mainboard/via/epia/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/via/epia/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -29,11 +29,4 @@ ldscripts += $(src)/arch/i386/lib/id.lds ldscripts += $(src)/arch/i386/lib/failover.lds -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/x86/fpu_enable.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc -crt0s += $(src)/cpu/x86/mmx_disable.inc Modified: trunk/src/mainboard/via/vt8454c/Makefile.inc ============================================================================== --- trunk/src/mainboard/via/vt8454c/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/via/vt8454c/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -26,13 +26,6 @@ obj-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.o initobj-y += crt0.o -# FIXME in $(top)/Makefile -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/via/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds Modified: trunk/src/mainboard/winent/pl6064/Makefile.inc ============================================================================== --- trunk/src/mainboard/winent/pl6064/Makefile.inc Thu Feb 25 17:09:53 2010 (r5161) +++ trunk/src/mainboard/winent/pl6064/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162) @@ -6,12 +6,6 @@ # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o -crt0s := $(src)/cpu/x86/16bit/entry16.inc -crt0s += $(src)/cpu/x86/32bit/entry32.inc -crt0s += $(src)/cpu/x86/16bit/reset16.inc -crt0s += $(src)/arch/i386/lib/id.inc -crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds

1 0

[commit] r5161 - in trunk: . src/mainboard/winent/pl6064
by repository service 25 Feb '10

25 Feb '10

Author: uwe Date: Thu Feb 25 17:09:53 2010 New Revision: 5161 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5161 Log: Various minor fixes (trivial). - More license header cosmetics. - New official "Building coreboot" document is now at: http://www.coreboot.org/Build_HOWTO - Drop "(mostly those derived from the Linux kernel)" part of the GPL-v2-only parts from the README. Many other files are also GPL-v2-only, too. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/README trunk/src/mainboard/winent/pl6064/irq_tables.c trunk/src/mainboard/winent/pl6064/mainboard.c trunk/src/mainboard/winent/pl6064/romstage.c Modified: trunk/README ============================================================================== --- trunk/README Thu Feb 25 14:45:08 2010 (r5160) +++ trunk/README Thu Feb 25 17:09:53 2010 (r5161) @@ -47,7 +47,7 @@ Building coreboot ----------------- -Please consult http://www.coreboot.org/Documentation for details. +Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware @@ -81,10 +81,9 @@ coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", -and some files (mostly those derived from the Linux kernel) are licensed under -the "GPL, version 2". For some parts, which were derived from other projects, -other (GPL-compatible) licenses may apply. Please check the individual -source files for details. +and some files are licensed under the "GPL, version 2". For some parts, which +were derived from other projects, other (GPL-compatible) licenses may apply. +Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2. Modified: trunk/src/mainboard/winent/pl6064/irq_tables.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/irq_tables.c Thu Feb 25 14:45:08 2010 (r5160) +++ trunk/src/mainboard/winent/pl6064/irq_tables.c Thu Feb 25 17:09:53 2010 (r5161) @@ -3,14 +3,14 @@ * * Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2010 Win Enterprises, Inc (anishp(a)win-ent.com) - + * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License Modified: trunk/src/mainboard/winent/pl6064/mainboard.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/mainboard.c Thu Feb 25 14:45:08 2010 (r5160) +++ trunk/src/mainboard/winent/pl6064/mainboard.c Thu Feb 25 17:09:53 2010 (r5161) @@ -4,8 +4,8 @@ * Copyright (C) 2010 Win Enterprises, Inc. (anishp(a)win-ent.com) * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the license. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of Modified: trunk/src/mainboard/winent/pl6064/romstage.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/romstage.c Thu Feb 25 14:45:08 2010 (r5160) +++ trunk/src/mainboard/winent/pl6064/romstage.c Thu Feb 25 17:09:53 2010 (r5161) @@ -4,7 +4,6 @@ * Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2010 Win Enterprises, Inc (anishp(a)win-ent.com) * - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or

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[commit] r5160 - trunk/src
by repository service 25 Feb '10

25 Feb '10

Author: stepan Date: Thu Feb 25 14:45:08 2010 New Revision: 5160 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5160 Log: Make Kconfig more similar to newconfig: enable "HAVE_HIGH_TABLES" per default. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/src/Kconfig Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Thu Feb 25 14:40:49 2010 (r5159) +++ trunk/src/Kconfig Thu Feb 25 14:45:08 2010 (r5160) @@ -247,7 +247,7 @@ config HAVE_HIGH_TABLES bool - default n + default y help This variable specifies whether a given northbridge has high table support.

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[commit] r5159 - in trunk/src: . cpu cpu/amd/model_10xxx cpu/amd/model_fxx cpu/intel/model_1067x cpu/intel/model_106cx cpu/intel/model_6ex cpu/intel/model_6fx cpu/intel/model_f0x cpu/intel/model_f1...
by repository service 25 Feb '10

25 Feb '10

Author: stepan Date: Thu Feb 25 14:40:49 2010 New Revision: 5159 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5159 Log: HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/src/Kconfig trunk/src/cpu/Kconfig trunk/src/cpu/amd/model_10xxx/Kconfig trunk/src/cpu/amd/model_fxx/Kconfig trunk/src/cpu/intel/model_1067x/Kconfig trunk/src/cpu/intel/model_106cx/Kconfig trunk/src/cpu/intel/model_6ex/Kconfig trunk/src/cpu/intel/model_6fx/Kconfig trunk/src/cpu/intel/model_f0x/Kconfig trunk/src/cpu/intel/model_f1x/Kconfig trunk/src/cpu/intel/model_f2x/Kconfig trunk/src/cpu/intel/model_f3x/Kconfig trunk/src/cpu/intel/model_f4x/Kconfig trunk/src/cpu/via/model_c7/Kconfig trunk/src/lib/ramtest.c Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -184,10 +184,6 @@ bool default n -config HAVE_MOVNTI - bool - default n - config HAVE_OPTION_TABLE bool default y Modified: trunk/src/cpu/Kconfig ============================================================================== --- trunk/src/cpu/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -32,14 +32,26 @@ This option is used to enable certain functions to make coreboot work correctly on symmetric multi processor (SMP) systems. -# Set MMX and SSE in socket or model if the CPU has them. -# If all CPUs for the socket have MMX or SSE, set them there. -# These options are only needed for boards compiled with romcc. config MMX bool + help + Select MMX in your socket or model Kconfig if your CPU has MMX + streaming SIMD instructions. ROMCC can build more efficient + code if it can spill to MMX registers. config SSE bool + help + Select SSE in your socket or model Kconfig if your CPU has SSE + streaming SIMD instructions. ROMCC can build more efficient + code if it can spill to SSE (aka XMM) registers. + +config SSE2 + bool + help + Select SSE2 in your socket or model Kconfig if your CPU has SSE2 + streaming SIMD instructions. Some parts of coreboot can be built + with more efficient code if SSE2 instructions are available. config VAR_MTRR_HOLE bool Modified: trunk/src/cpu/amd/model_10xxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_10xxx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/amd/model_10xxx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,9 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select HAVE_MOVNTI select USE_PRINTK_IN_CAR select USE_DCACHE_RAM select SSE + select SSE2 select HAVE_INIT_TIMER config CPU_ADDR_BITS Modified: trunk/src/cpu/amd/model_fxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_fxx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/amd/model_fxx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,9 +1,10 @@ config CPU_AMD_MODEL_FXX bool - select HAVE_MOVNTI select USE_PRINTK_IN_CAR select USE_DCACHE_RAM + select MMX select SSE + select SSE2 select HAVE_INIT_TIMER config CPU_ADDR_BITS Modified: trunk/src/cpu/intel/model_1067x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_1067x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_1067x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_CORE2 bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_106cx/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_106cx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_106cx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_ATOM_230 bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_6ex/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_6ex/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_6ex/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_CORE bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_6fx/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_6fx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_6fx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1 +1,4 @@ -# select HAVE_MOVNTI +config CPU_INTEL_CORE2 + bool + select SMP + select SSE2 Modified: trunk/src/cpu/intel/model_f0x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f0x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f0x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F0X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f1x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f1x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f1x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F1X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f2x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f2x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f2x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F2X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f3x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f3x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f3x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F3X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f4x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f4x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f4x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F4X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/via/model_c7/Kconfig ============================================================================== --- trunk/src/cpu/via/model_c7/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/via/model_c7/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,3 +1,4 @@ config CPU_VIA_C7 bool select UDELAY_TSC + select SSE2 Modified: trunk/src/lib/ramtest.c ============================================================================== --- trunk/src/lib/ramtest.c Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/lib/ramtest.c Thu Feb 25 14:40:49 2010 (r5159) @@ -1,6 +1,8 @@ static void write_phys(unsigned long addr, unsigned long value) { -#if CONFIG_HAVE_MOVNTI + // Assembler in lib/ is very ugly. But we properly guarded + // it so let's obey this one for now +#if CONFIG_SSE2 asm volatile( "movnti %1, (%0)" : /* outputs */ @@ -50,6 +52,10 @@ } write_phys(addr, addr); }; +#if CONFIG_SSE2 + // Needed for movnti + asm volatile ("sfence" ::: "memory"); +#endif /* Display final address */ #if CONFIG_USE_PRINTK_IN_CAR printk_debug("%08lx\r\nDRAM filled\r\n", addr);

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Error building cache_as_ram.inc
by Joseph Smith 25 Feb '10

25 Feb '10

Anyone seen this error before? /home/joe/coreboot/src/cpu/intel/model_6ex/cache_as_ram.inc: Assembler messages: /home/joe/coreboot/src/cpu/intel/model_6ex/cache_as_ram.inc:43: Error: unbalanced parenthesis in operand 1. /home/joe/coreboot/src/cpu/intel/model_6ex/cache_as_ram.inc:93: Error: unbalanced parenthesis in operand 1. make: *** [/home/joe/coreboot/build/mainboard/kontron/986lcd-m/crt0.initobj.o] Error 1 [joe@smitty2m coreboot]$ gcc (GCC) 4.4.3 20100127 (Red Hat 4.4.3-4) binutils-2.19.51.0.14-37.fc12.x86_64 -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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More lists
by Patrick Georgi 24 Feb '10

24 Feb '10

Hi, The debate about e7501 (dropping or risking broken code in the tree) reminded me of an idea I had a while ago: Do we want to establish a list of boards and their latest successfully tested revision, and all maintainers/testers for each board that agree to test changes regularily or on demand (and have the hardware around, of course)? That way, we'd know who to ask if we make sweeping changes that affect the entire tree. The other list I'd like to start is a document (on the wiki) that explains tree wide changes with the revision in which they happened, what happened, and how to replay those changes on a locally modified tree - esp. those with new boards. This would help people keeping their local development up to date, and it helps with finding the cause of problems. Basically, everything that affects the whole tree should be documented with: - Rev in which this change appeared - Short explanation what happened (maybe just the URL to the mailing list archive) - Explanation what to change to keep up (incl. scripts, if used) - Developer responsible for it Both of these are only useful if they're generally maintained. Maybe that's too much effort for the gain, so what do you think? Regards, Patrick

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coreboot February 2010