coreboot March 2009

coreboot@coreboot.org

64 participants
316 discussions

Problems about booting windows xp
by Wang, Qingpei 10 Mar '09

10 Mar '09

Hi, I am trying to boot windows xp with my dbm690t which has S1G1 CPU, sb600 and rs690 chipset. Now, It still soft reset after loading several files. The serial debug message says: "fail handle_1ab1:154 Fail handle_1aXX:274 Fail get_device:608(00000001) Fail handle_15XX:308(00000086)" Do you have any advice for that or give me and ideas to debug? Thanks Jason Wang BeiJing Technology Development Center Advanced Micro Devices (AMD)

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[PATCH] M2V-MX SE random fixups
by Rudolf Marek 10 Mar '09

10 Mar '09

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, To make use of HAVE_HIGH_TABLES following patch is needed. Also, it moves coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region. This is last missing bit to make SeaBIOS & Windows happy ;) This patch depends on the small patch adding the HAVE_HIGH_TABLES to K8 NB by Myles. Windows 7 still boots ;) once this is in, we have no need for other patches. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkm1pRgACgkQ3J9wPJqZRNXOfQCePVAeWWHJBNIf96NseAH+E2HY 9JsAoKuanbUTqaY/1KyhVaTci3PHUvbd =nzql -----END PGP SIGNATURE-----

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seaBIOS config options "for emulators"
by Joe Julian 10 Mar '09

10 Mar '09

Hello Kevin, You suggested, on the coreboot IRC channel, that I enable smbios in seabios to solve the missing mptable and RSDP problem. The reason those are turned off is because the comments for CONFIG_PIRTABLE, CONFIG_MPTABLE, COMFIG_SMBIOS, and CONFIG_ACPI all state, "for emulators". Since this is a bare metal install, wouldn't it be correct to have those options disabled since we need the real data rather than simulated data? Thanks, Joe

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Re: [coreboot] the seabios reboot in the post process
by Kevin O'Connor 10 Mar '09

10 Mar '09

On Mon, Mar 09, 2009 at 01:54:56AM +0000, wei yang wrote: > > Hi, Kevin: > Your patch does work for my issue. > I think it is a bug in the seabios, since some chipset will use > the bit 7 on the 0x70. But the current Seabios doesn't handle > this scenario. Thanks your response. :). Thanks. The latest SeaBIOS git will keep the high bit set on 0x70 writes. > by they way, here I got another question when seabios tring to boot > through the CDROM. I have connected a SATA DVD device within Fedora > 10 install CD to the board, which can be found when the payload is > FILO. When I use the Seabios, it does invoke the Handle 18 and > return the error code :00000002. The code means "cd rom not found" > after I checked the code in the cdrom.c. I am wandering why it will > happen? do you have some comments? I'll need to see the log. It looks like SeaBIOS didn't find your cdrom. -Kevin

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amdk8_util.asl fixes, documentation, and ACPI question
by Myles Watson 09 Mar '09

09 Mar '09

This patch mostly documents the functionality of amdk8_util.asl. It also fixes a couple of logical errors that were corrupting the resources returned from _CRS. Fixes: 1. When adding a MMIO region to the southbridge, the previous region was corrupted. - Save previous region before checking if you're handling the southbridge. - Make sure you're on node 0 before adding the TOM region. - Add in a MMAX value of 0xFFDFFFFF (See the ACPI question at the end.) - Store resulting region with the saved region. - Move increment of Local 4 so it's more obvious what it refers to. Before: [TOM - 0xBFFFF] added to every node with Link 0 enabled After: [0xA0000-0xBFFFF] and [TOM-0xFFDFFFFF] only once 2. Missing RTAG call corrupted return value when there was no resource for the link - Add RTAG (BUF0) Signed-off-by: Myles Watson <mylesgw(a)gmail.com> But the question is: Why is this logic here? Why do you want a region from TOM-(4G-2M)* when you explicitly have all the regions that are reachable from the HT links in other resources? * I got 4G-2M from the ACPI FAQ. Thanks, Myles

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[PATCH 2/2] AMD boards to use new Power Now infrastructure
by Rudolf Marek 09 Mar '09

09 Mar '09

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, This patch is for AMD boards which can do the P state generation. This just removes the ugly binary DSDT patching and all other related stuff. Stick to infrastructure in previous patch. This was just compile tested. I think it should work. Please test. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkmWxJ0ACgkQ3J9wPJqZRNWqygCeKf09gJbRIBWn4we3XKd/3k3T mMMAoOBs7K8q4Xuc4YqnUu3QZF7yHwwr =jbxj -----END PGP SIGNATURE-----

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v2 + qemu + yabel
by Pattrick Hueper 09 Mar '09

09 Mar '09

Hi, i am trying to get Stefans merged yabel working with v2 under qemu... but it doesnt work. i set CONFIG_PCI_ROM_RUN and CONFIG_PCI_OPTION_ROM_RUN_YABEL As far as i see, the VGA device is not assigned a ROM address and thus run_bios is never called... i dont quite understand why this happens. I also tried to use pci_dev_init instead of vga_init as the init function, but it still wont work :-( Anybody any idea, what i am doing wrong? Regards, Patty

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Expo report from embedded world 2009
by Peter Stuge 08 Mar '09

08 Mar '09

Hi all! Myself, Stefan Reinauer and Rudolf Marek made a visit at embedded world 2009 in Nürnberg this week and I would like to tell you a little about what we did there. http://www.embedded-world.de/ As always it was nice to meet in person, especially Rudolf whom neither me nor Stefan had met before, although he has been quite active in the project for several years. Overall I consider the visit quite successful. Perhaps even more successful than if coreboot would have been an exhibitor, because we would not have been able to move around so much if we had a booth to attend to. A great number of interesting companies both for hardware and software were represented at the expo and some of the ones we spoke with were IEI, AXIOMTEK, MSC, Advantech, congatec, LIPPERT, Toradex, MSI, DIGITAL-LOGIC, VIA, JET-WAY, MEN, Radisys, Denx, QNX and Microsoft. I would estimate that 85% of the displayed boards used Atom. There were also Geode LX, C7/Nano and some Core2 boards, but for every one non-Atom I still saw two or three Atoms. I quickly learned one thing which was maybe not so surprising, the asian hardware companies do all BIOS development at headquarters. Axiomtek, MSI, JET-WAY and VIA did have representatives from HQ at the expo, but no engineers and no firmware experts. We still tried to establish as many contacts as possible, and everyone we met was quite helpful and promised to forward information and contacts to the appropriate people within their organizations. Some highlights: * Discussing firmware with Mr. Lippert himself * Ad-hoc coreboot demo, twice!, at the SYSGO (Rudolf's job) booth party * VIA 855 chipset - H.264 playback and die still at 45 C with no cooling! * Free beer at the Microsoft booth talking to the owner of XP Embedded * Learning that the QNX bootloader is a clean 32-bit ELF built with gcc Earlier this year Konsult Stuge and coresystems GmbH joined an industry consortium which has already established the next generation CPU module standard. The other members are mostly companies in the hardware sector so we gave a short coreboot presentation at the consortium meeting during the expo in order to shine a light on the benefits and possibilities which coreboot brings to the embedded segment. For me as an open source enthousiast and evangelist it was really a great pleasure to attend the consortium meeting. Attitude and proceedings were much like in any open source project - with the small difference that just about everyone in the room wore suit and tie and was a heavyweight industry representative! I have never seen anything like it but I believe the modus operandi is completely unbeatable. We are very happy and proud to parttake in this venture! The response was quite positive, as always the demo is highly appreciated, and we are happy to bridge the two communities. I believe there will be very valuable discussion on both sides, and that everyone will see good things come out of this! Back at the expo QNX presented a nice fast boot demo on Atom. From reset to GL graphics in under two seconds. They have developed their own fastboot code (maybe using some reference code from Intel) but right now it is available only for Atom. Of course they were excited to learn that coreboot allows them to achieve the same performance on a large number of other platforms. We can use the bootloader (startup module in QNX terms) directly as a payload. Startup module + QNX kernel + QNX libc slimmed down is 400-600KB and a full version is 1.2MB. Doable on any board today. Pretty exciting! And QNX is freely available. >From Microsoft we learned that XP Embedded always uses kernel and HAL from the normal XP build. XP Embedded is basically a totally modularizable Windows XP distribution, but the lowest layer is never changed. So because SeaBIOS starts normal XP, it will also start XP Embedded. Freeldr was not familiar to anyone in the MS booth, but they did like the prospect of booting kernel really quickly from reset - as always! :) I have never been so convinced that coreboot is potent and worthwhile as I am today. //Peter

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Re: [coreboot] r3985 - trunk/util/msrtool
by Peter Stuge 08 Mar '09

08 Mar '09

Cool! svn(a)coreboot.org wrote: > + { 0xC0000080, MSRTYPE_RDWR, MSR2(0, 0), "EFER Register", "Extended Feature Enable Register", { Would you mind if I changed that first string to read just "EFER" ? > + { 14, 1, "FFXSR:", "Fast FXSAVE/FRSTOR Enable", PRESENT_DEC, { And if I removed the trailing : in these value names? Sorry - should have mentioned these sooner. //Peter

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[patch][msrtool] Add K8 MSRs
by Marc Jones 08 Mar '09

08 Mar '09

Add K8 support for some of the more important MSRs. Signed-off-by: Marc Jones <marcj303(a)gmail.com>

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coreboot March 2009