coreboot March 2009

coreboot@coreboot.org

64 participants
316 discussions

[PATCH] YABEL: update documentation of debug flags
by Pattrick Hueper 17 Mar '09

17 Mar '09

Hi, updated the debug flag documentation in util/x86emu/yabel/debug.h to make it easier to understand what can be set using CONFIG_YABEL_DEBUG_FLAGS option. Cheers, Patty Signed-off-by: Pattrick Hueper <phueper(a)hueper.net> --- util/x86emu/yabel/debug.h | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/util/x86emu/yabel/debug.h b/util/x86emu/yabel/debug.h index 987029a..ee14dfd 100644 --- a/util/x86emu/yabel/debug.h +++ b/util/x86emu/yabel/debug.h @@ -35,6 +35,28 @@ extern void x86emu_dump_xregs(void); static inline void clr_ci(void) {}; static inline void set_ci(void) {}; +/* Set CONFIG_YABEL_DEBUG_FLAGS is a binary switch that allows you + * to select the following items to debug. 1=on 0=off. After you + * decide what you want to debug create the binary value, convert to hex + * and set the Option (Ex. CONFIG_YABEL_DEBUG_FLAGS = 0x31FF //Debug All). + * + * |-DEBUG_JMP - print info about JMP and RETF opcodes from x86emu + * ||-DEBUG_TRACE_X86EMU - print _all_ opcodes that are executed by x86emu (WARNING: this will produce a LOT of output) + * |||-Currently unused + * ||||-Currently unused + * |||||-Currently unused + * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom + * |||||||-DEBUG_DISK - Print Disk I/O related messages, currently unused + * ||||||||-DEBUG_PMM - Print messages related to POST Memory Manager (PMM) + * |||||||||-DEBUG_VBE - Print messages related to VESA BIOS Extension (VBE) functions + * ||||||||||-DEBUG_PRINT_INT10 - let INT10 (i.e. character output) calls print messages to Debug output + * |||||||||||-DEBUG_INTR - Print messages related to interrupt handling + * ||||||||||||-DEBUG_CHECK_VMEM_ACCESS - Print messages related to accesse to certain areas of the virtual Memory (e.g. BDA (BIOS Data Area) or Interrupt Vectors) + * |||||||||||||-DEBUG_MEM - Print memory access made by option rom (NOTE: this also includes accesses to fetch instructions) + * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom + * 11000111111111 - Max Binary Value, Debug All (WARNING: - This could run for hours) + */ + #define DEBUG_IO 0x1 #define DEBUG_MEM 0x2 // set this to print messages for certain virtual memory accesses (Interrupt Vectors, ...) -- 1.6.2

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r1152 - coreboot-v3/util/x86emu/yabel
by svn＠coreboot.org 17 Mar '09

17 Mar '09

Author: phueper Date: 2009-03-17 15:08:03 +0100 (Tue, 17 Mar 2009) New Revision: 1152 Modified: coreboot-v3/util/x86emu/yabel/debug.h Log: update documentation of yabel debug flags Signed-off-by: Pattrick Hueper <phueper(a)hueper.net> Acked-by: Joseph Smith <joe(a)settoplinux.org> Modified: coreboot-v3/util/x86emu/yabel/debug.h =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.h 2009-03-16 16:33:41 UTC (rev 1151) +++ coreboot-v3/util/x86emu/yabel/debug.h 2009-03-17 14:08:03 UTC (rev 1152) @@ -35,6 +35,28 @@ static inline void clr_ci(void) {}; static inline void set_ci(void) {}; +/* Set CONFIG_YABEL_DEBUG_FLAGS is a binary switch that allows you + * to select the following items to debug. 1=on 0=off. After you + * decide what you want to debug create the binary value, convert to hex + * and set the Option (Ex. CONFIG_YABEL_DEBUG_FLAGS = 0x31FF //Debug All). + * + * |-DEBUG_JMP - print info about JMP and RETF opcodes from x86emu + * ||-DEBUG_TRACE_X86EMU - print _all_ opcodes that are executed by x86emu (WARNING: this will produce a LOT of output) + * |||-Currently unused + * ||||-Currently unused + * |||||-Currently unused + * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom + * |||||||-DEBUG_DISK - Print Disk I/O related messages, currently unused + * ||||||||-DEBUG_PMM - Print messages related to POST Memory Manager (PMM) + * |||||||||-DEBUG_VBE - Print messages related to VESA BIOS Extension (VBE) functions + * ||||||||||-DEBUG_PRINT_INT10 - let INT10 (i.e. character output) calls print messages to Debug output + * |||||||||||-DEBUG_INTR - Print messages related to interrupt handling + * ||||||||||||-DEBUG_CHECK_VMEM_ACCESS - Print messages related to accesse to certain areas of the virtual Memory (e.g. BDA (BIOS Data Area) or Interrupt Vectors) + * |||||||||||||-DEBUG_MEM - Print memory access made by option rom (NOTE: this also includes accesses to fetch instructions) + * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom + * 11000111111111 - Max Binary Value, Debug All (WARNING: - This could run for hours) + */ + #define DEBUG_IO 0x1 #define DEBUG_MEM 0x2 // set this to print messages for certain virtual memory accesses (Interrupt Vectors, ...)

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Re: [coreboot] #23: Use Doxygen-style comments
by coreboot 17 Mar '09

17 Mar '09

#23: Use Doxygen-style comments ----------------------------+----------------------------------------------- Reporter: uwe | Owner: somebody Type: enhancement | Status: closed Priority: minor | Milestone: Cosmetic fixes Component: coreboot | Version: Resolution: fixed | Keywords: Dependencies: | Patchstatus: there is no patch ----------------------------+----------------------------------------------- Changes (by stepan): * status: new => closed * resolution: => fixed Comment: This is part of the documentation chapter of the coding guidelines. No changes to the ticket in a year, and it seems to be a place holder. Closing it for now. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/23#comment:4> coreboot <http://www.coreboot.org/>

3 3

build service results for r4010
by coreboot information 17 Mar '09

17 Mar '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "hailfinger" checked in revision 4010 to the coreboot repository. This caused the following changes: Change Log: - TOM2 is filled in by the dynamic ACPI code. Don't hardcode it in the DSDT and use the dynamic TOM2 variable instead. - The DSDT needs to be revision 2 or above to handle 64 bit variables. This will require a recent (not older than 2007) iasl (ACPI compiler). - Fix an incorrect comment. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4010&device=ep405pc&vendor… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4010&device=sandpointx3_al… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4010&device=briq&vendor=to… If something broke during this checkin please be a pain in hailfinger's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[PATCH] AMD 690/SB600 boards: DSDT fixups
by Carl-Daniel Hailfinger 17 Mar '09

17 Mar '09

- TOM2 is filled in by the dynamic ACPI code. Don't hardcode it in the DSDT and use the dynamic TOM2 variable instead. - The DSDT needs to be revision 2 or above to handle 64 bit variables. This will require a recent (not older than 2007) iasl (ACPI compiler). - Fix an incorrect comment. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Revision 4009) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Arbeitskopie) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "DBM690T ", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1130,6 +1129,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1476,7 +1476,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl (Revision 4009) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl (Arbeitskopie) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "PISTACHI", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1129,6 +1128,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1399,7 +1399,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, -- http://www.hailfinger.org/ Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Revision 4009) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Arbeitskopie) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "DBM690T ", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1130,6 +1129,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1476,7 +1476,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl (Revision 4009) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl (Arbeitskopie) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "PISTACHI", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1129,6 +1128,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1399,7 +1399,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

2 2

r4010 - in trunk/coreboot-v2/src/mainboard/amd: dbm690t/acpi pistachio/acpi
by svn＠coreboot.org 17 Mar '09

17 Mar '09

Author: hailfinger Date: 2009-03-17 02:47:25 +0100 (Tue, 17 Mar 2009) New Revision: 4010 Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/dsdt.asl trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi/dsdt.asl Log: - TOM2 is filled in by the dynamic ACPI code. Don't hardcode it in the DSDT and use the dynamic TOM2 variable instead. - The DSDT needs to be revision 2 or above to handle 64 bit variables. This will require a recent (not older than 2007) iasl (ACPI compiler). - Fix an incorrect comment. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/dsdt.asl =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/dsdt.asl 2009-03-16 17:28:07 UTC (rev 4009) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi/dsdt.asl 2009-03-17 01:47:25 UTC (rev 4010) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "DBM690T ", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1130,6 +1129,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1476,7 +1476,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi/dsdt.asl =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi/dsdt.asl 2009-03-16 17:28:07 UTC (rev 4009) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi/dsdt.asl 2009-03-17 01:47:25 UTC (rev 4010) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "PISTACHI", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1129,6 +1128,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1399,7 +1399,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

1 0

HAVE_MP_TABLE fixup
by Myles Watson 17 Mar '09

17 Mar '09

I wanted to compile without an mptable for debugging, but it wasn't as easy as I'd hoped. This makes it easier. Since the asus/m2v_mx_se doesn't need mptables, remove mptable.c now that it compiles without it. Build tested. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

4 8

Flashrom support for SiS 963LUA
by Tiago Marques 17 Mar '09

17 Mar '09

Hi all, I have a couple of boards here that have this southbridge. I tried to use the routines for SiS 630 and 5595 with this, it detects but can't find any of the flash chips I try it with. Is there any documentation available for these chipsets? What's a good starting point to implement this? Best regards, Tiago Marques

2 1

IRQ 9 on s2895 and s2892
by Myles Watson 16 Mar '09

16 Mar '09

I'm extracting this from a different thread hoping for more help :) Thanks Rudolf for all the help so far. This is the last "funny" snippet from a Linux boot log with ACPI enabled: irq 9: nobody cared (try booting with the "irqpoll" option) Pid: 0, comm: swapper Not tainted 2.6.27-11-generic #1 Call Trace: <IRQ> [<ffffffff8029e8ab>] __report_bad_irq+0x2b/0x90 [<ffffffff8029ea47>] note_interrupt+0x137/0x170 [<ffffffff8029f1dd>] handle_fasteoi_irq+0xed/0x110 [<ffffffff80215b16>] do_IRQ+0x86/0x100 [<ffffffff80212f0e>] ret_from_intr+0x0/0x29 <EOI> [<ffffffff8022d236>] ? native_safe_halt+0x6/0x10 [<ffffffff805068ca>] ? atomic_notifier_call_chain+0x1a/0x20 [<ffffffff8021ac35>] ? default_idle+0x55/0x60 [<ffffffff80210e95>] ? cpu_idle+0x75/0x110 [<ffffffff804fe845>] ? start_secondary+0x97/0xc2 handlers: [<ffffffff803d2b90>] (acpi_irq+0x0/0x2b) Disabling IRQ #9 Freeing initrd memory: 8460k freed audit: initializing netlink socket (disabled) This IRQ is very active > > 9: 1 276 15 99709 IO-APIC-fasteoi acpi > > Huh quite big number. Is it from coreboot or legacy BIOS? It's from Coreboot. Here's the same line from the factory BIOS: 9: 0 0 0 0 IO-APIC-fasteoi acpi > Maybe some ACPI GP > timer is generating the IRQ9? How do you find an interrupt source that's going crazy like that? When I boot with acpi=off I IRQ9 doesn't even get registered. Thanks, Myles

2 16

build service results for r4009
by coreboot information 16 Mar '09

16 Mar '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4009 to the coreboot repository. This caused the following changes: Change Log: drop empty directory. (trivial) Signed-off-by: <stepan(a)coresystems.de> Acked-by: <stepan(a)coresystems.de> Build Log: Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4009&device=ep405pc&vendor… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4009&device=sandpointx3_al… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4009&device=briq&vendor=to… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot March 2009