#154: Flashing BIOSes from Fujitsu/Siemens is not supported
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Reporter: johannesobermayr@… | Owner: carldani
Type: enhancement | Status: new
Priority: major | Milestone:
Component: flashrom | Version:
Keywords: | Dependencies:
Patchstatus: there is no patch |
---------------------------------------+------------------------------------
As summary says I cannot flash BIOSes provided by Fujitsu/Siemens.
You can see BIOS architecture from Fujitsu/Siemens if you download for
example this BIOS package (for D1326): http://dl-
extern3.treiberupdate.de/download2/123525.EXE
I also could not find a suitable converter...
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/154>
coreboot <http://www.coreboot.org/>
#134: flashrom crashes acer aspire one laptop
-----------------------------------------------------------+----------------
Reporter: Timo Juhani Lindfors <timo.lindfors@…> | Owner: somebody
Type: defect | Status: new
Priority: minor | Milestone:
Component: flashrom | Version: v2
Keywords: aspire laptop | Dependencies:
Patchstatus: there is no patch |
-----------------------------------------------------------+----------------
I ran the "flashrom" command on my acer aspire one laptop. The display
turned black and the system did not respond to even sysrq after that.
(Fortunately the system boots after powercycling.)
This is debian stable with flashrom package that has version
"0.0+r3397-1".
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/134>
coreboot <http://www.coreboot.org/>
On Wed, Apr 29, 2009 at 04:53:13PM +0200, samuel wrote:
> Hi Kevin,
>
> I have tried Seabios on my hp dl145 g3 (the patches from mondrian) and
> it works really well now
> I was able to load the vga rom and i have output on the screen.
Great!
> One single problem... It doesn't seem to find the sata controller...
>
> bootlog with coreboot and seabios:
> http://merlin.ugent.be/~samuel/dl145g3/corebootwithseabios.log
There isn't much SeaBIOS info in that log - can you recompile with
CONFIG_DEBUG_LEVEL set to 6?
>
> lspci -vnn : http://merlin.ugent.be/~samuel/dl145g3/info/lspci-vnn.txt
>
> and the original patch from mondrian to add support for the dl145g3 to filo:
> http://merlin.ugent.be/~samuel/dl145g3/patch/filo_dl145_sata.patch
>
> It looks rather simple but I don't see what i have to change in
> seabios to support the device.
>
> The pci id (0x104 is already in pci_ids.h of seabios) so i would think
> it should just work. Myles thought it could be related to the fact
> that his sata interface of this mainboard does not support a legacy
> IDE interface mode.
>
> You have any ideas how i could quickly add support for the hp dl145 g3
> to SeaBIOS??
The equivalent patch in SeaBIOS would look like:
--- a/src/ata.c
+++ b/src/ata.c
@@ -841,7 +845,8 @@ ata_init()
int count=0;
int bdf, max;
foreachpci(bdf, max) {
- if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE)
+ u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE);
+ if (class != PCI_CLASS_STORAGE_IDE && class != PCI_CLASS_STORAGE_RAID)
continue;
if (count >= ARRAY_SIZE(ATA.channels))
break;
-Kevin
#153: resume from suspend on epia-m
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Reporter: bam <mybigspam@…> | Owner: stepan
Type: defect | Status: new
Priority: major | Milestone:
Component: coreboot | Version: v2
Keywords: s3 suspend epia | Dependencies:
Patchstatus: there is no patch |
---------------------------------------+------------------------------------
When I enter suspend mode from linux, the board suspends, but the led is
stayed on instead of blinking. On waking up (on button or wol) the board
reboots.[[BR]]
I've follow instructions in
[http://www.coreboot.org/VIA_EPIA-M#Advanced_ACPI] on changing dsdt.c.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/153>
coreboot <http://www.coreboot.org/>
#142: remove #warnings in the code
---------------------------------+------------------------------------------
Reporter: myles | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component: coreboot | Version: v2
Keywords: | Dependencies:
Patchstatus: there is no patch |
---------------------------------+------------------------------------------
#warnings in the code should be converted to tickets in trac, or fixed.
Compiler warnings don't seem to be useful to get things fixed. They also
obscure real warnings. The medium-term goal would be to have warning-free
compilation. After that -Werror would be nice. It seems like a small
thing to ask that code compile without warnings.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/142>
coreboot <http://www.coreboot.org/>
I think we should clean up memory allocation. There are multiple places in
the code where RAMTOP is used as an offset into ram and cast to a struct.
I think if something is important enough that it needs to be allocated
separately from the stack, it should show up in the ldscripts, not just in
the code.
What's important enough?
K8 page tables for APs?
EHCI debug?
Sysinfo structs?
Signed-off-by: Myles Watson <mylesgw(a)gmail.com>
Thanks,
Myles
#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
Reporter: edwin_beasant@… | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component: coreboot | Version: v2
Keywords: | Dependencies:
Patchstatus: patch needs review |
-------------------------------------------+--------------------------------
A vanilla build of r4971 appears to hang at the "Decompressing Coreboot to
Ram" message when run on the Zoom DB800 development board.
After tearing this down, it appears that the code pre "call
cbfs_and_run_core" (and post done_cache_as ram_main) in cache_as_ram.inc
for the geode appears to have gained some code from the crt0.S.lb generic
i386 infrastructure.
From the end of "done_cache_as_ram_main" to the point of calling
cbfs_and_run_core appears to attempt to "reset" the stack after flushing
the cache.
This causes the subsequent calls to printk_debug() (or related functions)
to fail.
(CONSOLE_DEBUG_TX_STRING would also appear to not clean up after itself)
Solution is to leave the stack as is until the copy to ram has completed.
Patch attached as tested working on Zoom AMD DB800 board, 256MB of RAM,
1024k Flash (SST 49LF008A).
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149>
coreboot <http://www.coreboot.org/>
Here's the patch:
http://panzer.utcluj.ro/cgi-bin/cgit.cgi/avatt/patch/?id=1f45b765097fd8ba21…
Signed-off by: Cristi Măgherușan <cristi.magherusan(a)net.utcluj.ro>
I'm unable to say which others may worth it, but someone who's
interested by buildrom can also cherry-pick some changesets/patches from
my git repos at http://panzer.utcluj.ro/cgi-bin/cgit.cgi/ and include
them in the main buildrom repo. A few of them are merged in the buildrom
repo, while others are still in AVATT (I'm using braid to track my
buildrom repo from AVATT, so it's easy to do it), but they will be
merged eventually when I have some spare time..
From 1f45b765097fd8ba2139a078bd57679e16ac4699 Mon Sep 17 00:00:00 2001
From: Cristi Măgherușan <cristi.magherusan(a)net.utcluj.ro>
Date: Thu, 16 Jul 2009 18:16:13 +0000
Subject: Added support for my Asus M2V-MX SE
---
diff --git a/buildrom/buildrom-devel/config/platforms/Config.in b/buildrom/buildrom-devel/config/platforms/Config.in
index e8a0a8b..1fa6a12 100644
--- a/buildrom/buildrom-devel/config/platforms/Config.in
+++ b/buildrom/buildrom-devel/config/platforms/Config.in
@@ -104,6 +104,13 @@ config PLATFORM_ASUS_A8N_E
select PLATFORM
select PLATFORM_SUPPORT_64BIT
+config PLATFORM_ASUS_M2V_MX_SE
+ bool "ASUS M2V-MX SE"
+ depends on VENDOR_ASUS
+ depends on COREBOOT_V2
+ select PLATFORM
+ select PLATFORM_SUPPORT_64BIT
+
config PLATFORM_GA_2761GXDK
bool "GIGABYTE GA-2761GXDK"
depends on VENDOR_GIGABYTE
diff --git a/buildrom/buildrom-devel/config/platforms/asus_m2v-mx_se.conf b/buildrom/buildrom-devel/config/platforms/asus_m2v-mx_se.conf
new file mode 100644
index 0000000..a78863e
--- a/dev/null
+++ b/buildrom/buildrom-devel/config/platforms/asus_m2v-mx_se.conf
@@ -0,0 +1,28 @@
+# Support for the ASUS A8V-E SE board
+
+#### Platform configuration
+
+ifeq ($(CONFIG_TARGET_64BIT),y)
+TARGET_ARCH=x86_64
+CFLAGS_platform =
+else
+TARGET_ARCH=i686
+CFLAGS_platform =
+endif
+
+# kernel configuration (for LAB)
+
+# TODO
+
+UCLIBC_ARCH=$(TARGET_ARCH)
+
+# Etherboot configuration
+
+ETHERBOOT_ARCH=i386
+
+# coreboot configuration
+
+COREBOOT_VENDOR=asus
+COREBOOT_BOARD=m2v-mx_se
+CBV2_TDIR=m2v-mx_se
+CBV2_TAG=4426
diff --git a/buildrom/buildrom-devel/config/platforms/platforms.conf b/buildrom/buildrom-devel/config/platforms/platforms.conf
index 733ca73..f5f62f8 100644
--- a/buildrom/buildrom-devel/config/platforms/platforms.conf
+++ b/buildrom/buildrom-devel/config/platforms/platforms.conf
@@ -23,6 +23,7 @@ PLATFORM-$(CONFIG_PLATFORM_DBE61) = dbe61.conf
PLATFORM-$(CONFIG_PLATFORM_GA_M57SLI_S4) = m57sli.conf
PLATFORM-$(CONFIG_PLATFORM_ASUS_A8V_E_SE) = asus_a8v-e_se.conf
PLATFORM-$(CONFIG_PLATFORM_ASUS_A8N_E) = asus_a8n-e.conf
+PLATFORM-$(CONFIG_PLATFORM_ASUS_M2V_MX_SE) = asus_m2v-mx_se.conf
PLATFORM-$(CONFIG_PLATFORM_TYAN_S2881) = tyan-s2881.conf
PLATFORM-$(CONFIG_PLATFORM_TYAN_S2882) = tyan-s2882.conf
PLATFORM-$(CONFIG_PLATFORM_TYAN_S2891) = tyan-s2891.conf
--
Ing. Cristi Măgherușan, System/Network Engineer
Technical University of Cluj-Napoca, Romania
http://cc.utcluj.ro +40264 401247
#108: Add int 10 VESA video driver to libpayload
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Reporter: stuge | Owner: somebody
Type: enhancement | Status: new
Priority: major | Milestone:
Component: libpayload | Version:
Keywords: video | Dependencies:
Patchstatus: there is no patch |
---------------------------------+------------------------------------------
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/108>
coreboot <http://www.coreboot.org/>
