coreboot October 2009

coreboot@coreboot.org

63 participants
534 discussions

[v2] r4714 - in trunk/coreboot-v2/src: . mainboard/amd/serengeti_cheetah mainboard/dell/s1850 mainboard/sunw/ultra40 mainboard/supermicro/h8dme mainboard/tyan/s2850 mainboard/tyan/s2875 mainboard/tyan/s2881 mainboard/tyan/s2891 mainboard/tyan/s2892 mainboard/tyan/s2895
by svn＠coreboot.org 03 Oct '09

03 Oct '09

Author: oxygene Date: 2009-10-03 23:04:13 +0200 (Sat, 03 Oct 2009) New Revision: 4714 Modified: trunk/coreboot-v2/src/Kconfig trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig Log: Move HAVE_FAILOVER_BOOT and USE_FAILOVER_IMAGE from boards to global. It's not a per-board value, but compatibility stuff. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/Kconfig =================================================================== --- trunk/coreboot-v2/src/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -146,6 +146,14 @@ bool default y +config HAVE_FAILOVER_BOOT + bool + default n + +config USE_FAILOVER_IMAGE + bool + default n + config HAVE_HARD_RESET bool default 0 Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -72,16 +72,6 @@ default y depends on BOARD_AMD_SERENGETI_CHEETAH -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH - config MAX_CPUS int default 8 Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -33,21 +33,6 @@ default 0x016c depends on BOARD_DELL_S1850 -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_DELL_S1850 - -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_DELL_S1850 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_DELL_S1850 - config MAX_CPUS int default 2 Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -76,16 +76,6 @@ default 0x100000 depends on BOARD_SUNW_ULTRA40 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_SUNW_ULTRA40 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_SUNW_ULTRA40 - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -76,16 +76,6 @@ default 0x100000 depends on BOARD_SUPERMICRO_H8DME -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_SUPERMICRO_H8DME - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_SUPERMICRO_H8DME - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -39,16 +39,6 @@ default 0x100000 depends on BOARD_TYAN_S2850 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2850 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2850 - config MAX_CPUS int default 2 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -40,16 +40,6 @@ default 0x100000 depends on BOARD_TYAN_S2875 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2875 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2875 - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -45,11 +45,6 @@ default 0x2881 depends on BOARD_TYAN_S2881 -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2881 - config HW_MEM_HOLE_SIZEK hex default 0x100000 @@ -60,16 +55,6 @@ default n depends on BOARD_TYAN_S2881 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2881 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2881 - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -45,11 +45,6 @@ default 0x2891 depends on BOARD_TYAN_S2891 -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2891 - config HW_MEM_HOLE_SIZEK hex default 0x100000 @@ -60,16 +55,6 @@ default n depends on BOARD_TYAN_S2891 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2891 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2891 - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -45,11 +45,6 @@ default 0x2892 depends on BOARD_TYAN_S2892 -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2892 - config HW_MEM_HOLE_SIZEK hex default 0x100000 @@ -60,16 +55,6 @@ default n depends on BOARD_TYAN_S2892 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2892 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2892 - config MAX_CPUS int default 4 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig 2009-10-03 16:27:48 UTC (rev 4713) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig 2009-10-03 21:04:13 UTC (rev 4714) @@ -45,11 +45,6 @@ default 0x2895 depends on BOARD_TYAN_S2895 -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2895 - config HW_MEM_HOLE_SIZEK hex default 0x100000 @@ -60,16 +55,6 @@ default n depends on BOARD_TYAN_S2895 -config HAVE_FAILOVER_BOOT - bool - default n - depends on BOARD_TYAN_S2895 - -config USE_FAILOVER_IMAGE - bool - default n - depends on BOARD_TYAN_S2895 - config MAX_CPUS int default 4

1 0

Gigabyte M57SLI Kconfig support
by Harald Gutmann 03 Oct '09

03 Oct '09

Hello, here is my new patch which adds the Kconfig support for m57sli from gigabyte. There is one Problem with the patch, but I'm not able to track that down. I've really no idea what causes Kconfig to put all those warnings out with my patch. As this patch causes quite a massive amount of warnings, and I wasn't able to fix that it is not signed off. The warnings which are given by make menuconfig are attached in warnings.txt and the patch itself is also attached. Hopefully someone can help me to track this down. Kind regards, Harald

1 2

Re: [coreboot] [v2] r4707 - in trunk/coreboot-v2: src/mainboard/dell/s1850 targets
by Peter Stuge 03 Oct '09

03 Oct '09

svn(a)coreboot.org wrote: > + bool "S1850" Is this a PowerEdge S1850 ? //Peter

5 12

[v2] r4713 - in trunk/coreboot-v2/src: mainboard/artecgroup/dbe61/realmode mainboard/via/epia-m northbridge/via/cn400 northbridge/via/cn700 northbridge/via/cx700 northbridge/via/vx800
by svn＠coreboot.org 03 Oct '09

03 Oct '09

Author: oxygene Date: 2009-10-03 18:27:48 +0200 (Sat, 03 Oct 2009) New Revision: 4713 Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c trunk/coreboot-v2/src/northbridge/via/cn400/vgabios.c trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c trunk/coreboot-v2/src/northbridge/via/cx700/vgabios.c trunk/coreboot-v2/src/northbridge/via/vx800/vgabios.c Log: Tell vgabios code in a couple of boards/chipsets about CBFS Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -7,6 +7,7 @@ #include <arch/io.h> #include <string.h> #include "chip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -266,7 +267,7 @@ { unsigned long busdevfn; - unsigned int rom = dev->rom_address; + unsigned int rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); unsigned char *buf; unsigned int size = 64*1024; int i; Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfffc0000; + rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("rom base, size: %x\n", rom); Modified: trunk/coreboot-v2/src/northbridge/via/cn400/vgabios.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/cn400/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/northbridge/via/cn400/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfff80000; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("VGA BIOS ROM base address: %x\n", rom); Modified: trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfff80000; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("rom base, size: %x\n", rom); Modified: trunk/coreboot-v2/src/northbridge/via/cx700/vgabios.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/cx700/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/northbridge/via/cx700/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -28,6 +28,7 @@ #undef __KERNEL__ #include <arch/io.h> #include <string.h> +#include <cbfs.h> void write_protect_vgabios(void); @@ -323,7 +324,7 @@ * of core LXB stuff */ #warning ROM address hardcoded to 512K - rom = 0xfff80000; + rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); printk_debug("rom base, size: %x\n", rom); Modified: trunk/coreboot-v2/src/northbridge/via/vx800/vgabios.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/vx800/vgabios.c 2009-10-03 16:24:58 UTC (rev 4712) +++ trunk/coreboot-v2/src/northbridge/via/vx800/vgabios.c 2009-10-03 16:27:48 UTC (rev 4713) @@ -6,6 +6,7 @@ #include <arch/io.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -319,7 +320,7 @@ /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xffffffff - CONFIG_ROM_SIZE + 1; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); printk_debug("rom base: %x\n", rom); buf = (unsigned char *)rom;

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[v2] r4712 - in trunk/coreboot-v2: src src/arch/i386 src/arch/i386/init src/arch/i386/lib src/arch/ppc src/boot src/config src/cpu/amd/car src/cpu/amd/model_lx src/cpu/x86/car src/devices src/lib src/mainboard/a-trend/atc-6220 src/mainboard/a-trend/atc-6240 src/mainboard/abit/be6-ii_v2_0 src/mainboard/advantech/pcm-5820 src/mainboard/amd/db800 src/mainboard/amd/dbm690t src/mainboard/amd/norwich src/mainboard/amd/pistachio src/mainboard/amd/rumba src/mainboard/amd/serengeti_cheetah src/mainboard/a
by svn＠coreboot.org 03 Oct '09

03 Oct '09

Author: oxygene Date: 2009-10-03 18:24:58 +0200 (Sat, 03 Oct 2009) New Revision: 4712 Removed: trunk/coreboot-v2/src/arch/i386/init/ldscript.lb trunk/coreboot-v2/src/arch/i386/init/ldscript_fallback.lb trunk/coreboot-v2/src/arch/i386/lib/copy_and_run.c trunk/coreboot-v2/src/boot/elfboot.c trunk/coreboot-v2/src/boot/filo.c trunk/coreboot-v2/src/stream/ Modified: trunk/coreboot-v2/src/Kconfig trunk/coreboot-v2/src/arch/i386/Config.lb trunk/coreboot-v2/src/arch/i386/init/crt0.S.lb trunk/coreboot-v2/src/arch/i386/lib/Config.lb trunk/coreboot-v2/src/arch/ppc/Config.lb trunk/coreboot-v2/src/boot/Config.lb trunk/coreboot-v2/src/boot/hardwaremain.c trunk/coreboot-v2/src/config/Config.lb trunk/coreboot-v2/src/config/Options.lb trunk/coreboot-v2/src/config/failovercalculation.lb trunk/coreboot-v2/src/config/nofailovercalculation.lb trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c trunk/coreboot-v2/src/cpu/amd/model_lx/cache_as_ram.inc trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c trunk/coreboot-v2/src/devices/pci_rom.c trunk/coreboot-v2/src/lib/Config.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb trunk/coreboot-v2/src/mainboard/intel/eagleheights/Options.lb trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/mitac/6513wu/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/h8dmr_fam10/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-n/Options.lb trunk/coreboot-v2/src/mainboard/via/epia/Options.lb trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb trunk/coreboot-v2/targets/kontron/986lcd-m/Config.lb trunk/coreboot-v2/targets/lippert/roadrunner-lx/Config.lb trunk/coreboot-v2/targets/lippert/spacerunner-lx/Config.lb trunk/coreboot-v2/util/abuild/abuild trunk/coreboot-v2/util/newconfig/config.g Log: Remove: - CONFIG_CBFS - anything that's conditional on CONFIG_CBFS == 0 - files that were only included for CONFIG_CBFS == 0 In particular: - elfboot - stream boot code - mini-filo and filesystems (depends on stream boot code) After this commit, there is no way to build an image that is not using CBFS anymore. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/Kconfig =================================================================== --- trunk/coreboot-v2/src/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/Kconfig 2009-10-03 16:24:58 UTC (rev 4712) @@ -36,10 +36,6 @@ source src/superio/Kconfig source src/cpu/Kconfig -config CBFS - bool - default y - config PCI_BUS_SEGN_BITS int default 0 Modified: trunk/coreboot-v2/src/arch/i386/Config.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,45 +1,29 @@ -uses CONFIG_CBFS uses CONFIG_SMP uses CONFIG_PRECOMPRESSED_PAYLOAD uses CONFIG_USE_INIT uses CONFIG_HAVE_FAILOVER_BOOT uses CONFIG_USE_FAILOVER_IMAGE uses CONFIG_USE_FALLBACK_IMAGE -uses CONFIG_CBFS init init/crt0.S.lb -if CONFIG_CBFS - if CONFIG_USE_FAILOVER_IMAGE - else - initobject /src/lib/cbfs.o - initobject /src/lib/lzma.o - end +if CONFIG_USE_FAILOVER_IMAGE +else + initobject /src/lib/cbfs.o + initobject /src/lib/lzma.o end if CONFIG_HAVE_FAILOVER_BOOT if CONFIG_USE_FAILOVER_IMAGE ldscript init/ldscript_failover.lb else - if CONFIG_CBFS ldscript init/ldscript_cbfs.lb - else - ldscript init/ldscript.lb - end end else - if CONFIG_CBFS - if CONFIG_USE_FALLBACK_IMAGE - ldscript init/ldscript_fallback_cbfs.lb - else - ldscript init/ldscript_cbfs.lb - end + if CONFIG_USE_FALLBACK_IMAGE + ldscript init/ldscript_fallback_cbfs.lb else - if CONFIG_USE_FALLBACK_IMAGE - ldscript init/ldscript_fallback.lb - else - ldscript init/ldscript.lb - end + ldscript init/ldscript_cbfs.lb end end @@ -82,13 +66,6 @@ # catch the case where there is no compression makedefine PAYLOAD-1:=payload -if CONFIG_CBFS -else -# match the case where a compression type is specified. -makedefine PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_NRV2B):=payload.nrv2b -makedefine PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_LZMA):=payload.lzma -end - # catch the case where there is precompression. Yes, this bites. if CONFIG_PRECOMPRESSED_PAYLOAD makedefine PAYLOAD-1:=payload @@ -105,8 +82,8 @@ else makerule coreboot.rom depends "coreboot.strip buildrom $(PAYLOAD-1)" - action "PAYLOAD=$(PAYLOAD-1); if [ $(CONFIG_CBFS) -eq 1 ]; then PAYLOAD=/dev/null; touch cbfs-support; fi; ./buildrom $< $@ $$PAYLOAD $(CONFIG_ROM_IMAGE_SIZE) $(CONFIG_ROM_SECTION_SIZE)" - action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 -a $(CONFIG_CBFS) -eq 1 ]; then echo l > cbfs-support; fi" + action "touch cbfs-support; ./buildrom $< $@ /dev/null $(CONFIG_ROM_IMAGE_SIZE) $(CONFIG_ROM_SECTION_SIZE)" + action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 ]; then echo l > cbfs-support; fi" end end Modified: trunk/coreboot-v2/src/arch/i386/init/crt0.S.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/init/crt0.S.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/init/crt0.S.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -74,19 +74,8 @@ movl $0x4000000, %esp movl %esp, %ebp pushl %esi -#if CONFIG_CBFS == 1 pushl $str_coreboot_ram_name call cbfs_and_run_core -#else - movl $_liseg, %esi - movl $_iseg, %edi - movl $_eiseg, %ecx - subl %edi, %ecx - pushl %ecx - pushl %edi - pushl %esi - call copy_and_run_core -#endif .Lhlt: intel_chip_post_macro(0xee) /* post fe */ @@ -148,12 +137,10 @@ #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#if CONFIG_CBFS == 1 -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 str_coreboot_ram_name: .string "fallback/coreboot_ram" -# else +#else str_coreboot_ram_name: .string "normal/coreboot_ram" -# endif #endif #endif /* CONFIG_USE_DCACHE_RAM */ Deleted: trunk/coreboot-v2/src/arch/i386/init/ldscript.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/init/ldscript.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/init/ldscript.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,70 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -INPUT(coreboot_ram.rom) -SECTIONS -{ - . = CONFIG_ROMBASE; - - .ram . : { - _ram = . ; - coreboot_ram.rom(*) - _eram = . ; - } - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = CONFIG_RAMBASE; - _eiseg = _iseg + SIZEOF(.ram); - _liseg = _ram; - _eliseg = _eram; - - /DISCARD/ : { - *(.comment) - *(.comment.*) - *(.note) - *(.note.*) - } -} Deleted: trunk/coreboot-v2/src/arch/i386/init/ldscript_fallback.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/init/ldscript_fallback.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/init/ldscript_fallback.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,75 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -INPUT(coreboot_ram.rom) -SECTIONS -{ - . = CONFIG_ROMBASE; - - .ram . : { - _ram = . ; - coreboot_ram.rom(*) - _eram = . ; - } - - /* cut _start into last 64k*/ - _x = .; - . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.init.rodata.*); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = CONFIG_RAMBASE; - _eiseg = _iseg + SIZEOF(.ram); - _liseg = _ram; - _eliseg = _eram; - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - } -} Modified: trunk/coreboot-v2/src/arch/i386/lib/Config.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/lib/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/lib/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,7 +1,6 @@ uses CONFIG_USE_INIT uses CONFIG_USE_PRINTK_IN_CAR uses CONFIG_USE_FAILOVER_IMAGE -uses CONFIG_CBFS object c_start.S object cpu.c @@ -15,9 +14,5 @@ if CONFIG_USE_FAILOVER_IMAGE else - if CONFIG_CBFS - initobject cbfs_and_run.o - else - initobject copy_and_run.o - end + initobject cbfs_and_run.o end Deleted: trunk/coreboot-v2/src/arch/i386/lib/copy_and_run.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/lib/copy_and_run.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/i386/lib/copy_and_run.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,53 +0,0 @@ -/* by yhlu 6.2005 - moved from nrv2v.c and some lines from crt0.S - 2006/05/02 - stepan: move nrv2b to an extra file. -*/ - -#include <console/console.h> -#include <stdint.h> -#include <string.h> - -#if CONFIG_COMPRESS -#define ENDIAN 0 -#define BITSIZE 32 -#include "../lib/nrv2b.c" -#endif - -void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp) -{ - unsigned long olen; - -#if CONFIG_USE_INIT - printk_spew("src=%08x\r\n",src); - printk_spew("dst=%08x\r\n",dst); -#else - print_spew("src="); print_spew_hex32((uint32_t)src); print_spew("\r\n"); - print_spew("dst="); print_spew_hex32((uint32_t)dst); print_spew("\r\n"); -#endif - -#if !CONFIG_COMPRESS - print_debug("Copying image to RAM.\r\n"); - memcpy(src, dst, ilen); - olen = ilen; -#else - print_debug("Uncompressing image to RAM.\r\n"); -// dump_mem(src, src+0x100); - olen = unrv2b(src, dst, &ilen); -#endif - -// dump_mem(dst, dst+0x100); -#if CONFIG_USE_INIT - printk_spew("image length = %08x\r\n", olen); -#else - print_spew("image length = "); print_spew_hex32(olen); print_spew("\r\n"); -#endif - print_debug("Jumping to image.\r\n"); - - __asm__ volatile ( - "movl %%eax, %%ebp\n\t" - "cli\n\t" - "jmp *%%edi\n\t" - :: "a"(ebp), "D"(dst) - ); - -} Modified: trunk/coreboot-v2/src/arch/ppc/Config.lb =================================================================== --- trunk/coreboot-v2/src/arch/ppc/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/arch/ppc/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,4 +1,3 @@ -uses CONFIG_CBFS ldscript init/ldscript.lb makerule coreboot.strip @@ -11,10 +10,8 @@ action "cp $< $@" end -if CONFIG_CBFS - initobject /src/lib/cbfs.o - initobject /src/lib/lzma.o -end +initobject /src/lib/cbfs.o +initobject /src/lib/lzma.o dir init dir lib Modified: trunk/coreboot-v2/src/boot/Config.lb =================================================================== --- trunk/coreboot-v2/src/boot/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/boot/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,9 +1,2 @@ object hardwaremain.o -if CONFIG_CBFS - object selfboot.o -else - object elfboot.o -end -if CONFIG_FS_PAYLOAD - object filo.o -end +object selfboot.o Deleted: trunk/coreboot-v2/src/boot/elfboot.c =================================================================== --- trunk/coreboot-v2/src/boot/elfboot.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/boot/elfboot.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,687 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric W. Biederman <ebiederm(a)xmission.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#include <console/console.h> -#include <part/fallback_boot.h> -#include <boot/elf.h> -#include <boot/elf_boot.h> -#include <boot/coreboot_tables.h> -#include <ip_checksum.h> -#include <stream/read_bytes.h> -#include <stdint.h> -#include <stdlib.h> -#include <string.h> - -/* Maximum physical address we can use for the coreboot bounce buffer. - */ -#ifndef MAX_ADDR -#define MAX_ADDR -1UL -#endif - -extern unsigned char _ram_seg; -extern unsigned char _eram_seg; - -struct segment { - struct segment *next; - struct segment *prev; - struct segment *phdr_next; - struct segment *phdr_prev; - unsigned long s_addr; - unsigned long s_memsz; - unsigned long s_offset; - unsigned long s_filesz; -}; - -struct verify_callback { - struct verify_callback *next; - int (*callback)(struct verify_callback *vcb, - Elf_ehdr *ehdr, Elf_phdr *phdr, struct segment *head); - unsigned long desc_offset; - unsigned long desc_addr; -}; - -struct ip_checksum_vcb { - struct verify_callback data; - unsigned short ip_checksum; -}; - -int verify_ip_checksum( - struct verify_callback *vcb, - Elf_ehdr *ehdr, Elf_phdr *phdr, struct segment *head) -{ - struct ip_checksum_vcb *cb; - struct segment *ptr; - unsigned long bytes; - unsigned long checksum; - unsigned char buff[2], *n_desc; - cb = (struct ip_checksum_vcb *)vcb; - /* zero the checksum so it's value won't - * get in the way of verifying the checksum. - */ - n_desc = 0; - if (vcb->desc_addr) { - n_desc = (unsigned char *)(vcb->desc_addr); - memcpy(buff, n_desc, 2); - memset(n_desc, 0, 2); - } - bytes = 0; - checksum = compute_ip_checksum(ehdr, sizeof(*ehdr)); - bytes += sizeof(*ehdr); - checksum = add_ip_checksums(bytes, checksum, - compute_ip_checksum(phdr, ehdr->e_phnum*sizeof(*phdr))); - bytes += ehdr->e_phnum*sizeof(*phdr); - for(ptr = head->phdr_next; ptr != head; ptr = ptr->phdr_next) { - checksum = add_ip_checksums(bytes, checksum, - compute_ip_checksum((void *)ptr->s_addr, ptr->s_memsz)); - bytes += ptr->s_memsz; - } - if (n_desc != 0) { - memcpy(n_desc, buff, 2); - } - if (checksum != cb->ip_checksum) { - printk_err("Image checksum: %04x != computed checksum: %04lx\n", - cb->ip_checksum, checksum); - } - return checksum == cb->ip_checksum; -} - -/* The problem: - * Static executables all want to share the same addresses - * in memory because only a few addresses are reliably present on - * a machine, and implementing general relocation is hard. - * - * The solution: - * - Allocate a buffer the size of the coreboot image plus additional - * required space. - * - Anything that would overwrite coreboot copy into the lower part of - * the buffer. - * - After loading an ELF image copy coreboot to the top of the buffer. - * - Then jump to the loaded image. - * - * Benefits: - * - Nearly arbitrary standalone executables can be loaded. - * - Coreboot is preserved, so it can be returned to. - * - The implementation is still relatively simple, - * and much simpler then the general case implemented in kexec. - * - */ - -static unsigned long bounce_size; - -static unsigned long get_bounce_buffer(struct lb_memory *mem) -{ - unsigned long lb_size; - unsigned long mem_entries; - unsigned long buffer; - int i; - lb_size = (unsigned long)(&_eram_seg - &_ram_seg); - /* Double coreboot size so I have somewhere to place a copy to return to */ - bounce_size = lb_size; - lb_size = bounce_size + lb_size; - mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]); - buffer = 0; - for(i = 0; i < mem_entries; i++) { - unsigned long mstart, mend; - unsigned long msize; - unsigned long tbuffer; - if (mem->map[i].type != LB_MEM_RAM) - continue; - if (unpack_lb64(mem->map[i].start) > MAX_ADDR) - continue; - if (unpack_lb64(mem->map[i].size) < lb_size) - continue; - mstart = unpack_lb64(mem->map[i].start); - msize = MAX_ADDR - mstart +1; - if (msize > unpack_lb64(mem->map[i].size)) - msize = unpack_lb64(mem->map[i].size); - mend = mstart + msize; - tbuffer = mend - lb_size; - if (tbuffer < buffer) - continue; - buffer = tbuffer; - } - return buffer; -} - - -static struct verify_callback *process_elf_notes( - unsigned char *header, - unsigned long offset, unsigned long length) -{ - struct verify_callback *cb_chain; - unsigned char *note, *end; - unsigned char *program, *version; - - cb_chain = 0; - note = header + offset; - end = note + length; - program = version = 0; - while(note < end) { - Elf_Nhdr *hdr; - unsigned char *n_name, *n_desc, *next; - hdr = (Elf_Nhdr *)note; - n_name = note + sizeof(*hdr); - n_desc = n_name + ((hdr->n_namesz + 3) & ~3); - next = n_desc + ((hdr->n_descsz + 3) & ~3); - if (next > end) { - break; - } - if ((hdr->n_namesz == sizeof(ELF_NOTE_BOOT)) && - (memcmp(n_name, ELF_NOTE_BOOT, sizeof(ELF_NOTE_BOOT)) == 0)) { - switch(hdr->n_type) { - case EIN_PROGRAM_NAME: - if (n_desc[hdr->n_descsz -1] == 0) { - program = n_desc; - } - break; - case EIN_PROGRAM_VERSION: - if (n_desc[hdr->n_descsz -1] == 0) { - version = n_desc; - } - break; - case EIN_PROGRAM_CHECKSUM: - { - struct ip_checksum_vcb *cb; - cb = malloc(sizeof(*cb)); - cb->ip_checksum = *((uint16_t *)n_desc); - cb->data.callback = verify_ip_checksum; - cb->data.next = cb_chain; - cb->data.desc_offset = n_desc - header; - cb_chain = &cb->data; - break; - } - } - } - printk_spew("n_type: %08x n_name(%d): %-*.*s n_desc(%d): %-*.*s\n", - hdr->n_type, - hdr->n_namesz, hdr->n_namesz, hdr->n_namesz, n_name, - hdr->n_descsz,hdr->n_descsz, hdr->n_descsz, n_desc); - note = next; - } - if (program && version) { - printk_info("Loading %s version: %s\n", - program, version); - } - return cb_chain; -} - -static int valid_area(struct lb_memory *mem, unsigned long buffer, - unsigned long start, unsigned long len) -{ - /* Check through all of the memory segments and ensure - * the segment that was passed in is completely contained - * in RAM. - */ - int i; - unsigned long end = start + len; - unsigned long mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]); - - /* See if I conflict with the bounce buffer */ - if (end >= buffer) { - return 0; - } - - /* Walk through the table of valid memory ranges and see if I - * have a match. - */ - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - if ((mtype == LB_MEM_RAM) && (start < mend) && (end > mstart)) { - break; - } - if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > mstart)) { - printk_err("Payload is overwriting Coreboot tables.\n"); - break; - } - } - if (i == mem_entries) { - printk_err("No matching ram area found for range:\n"); - printk_err(" [0x%016lx, 0x%016lx)\n", start, end); - printk_err("Ram areas\n"); - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - printk_err(" [0x%016lx, 0x%016lx) %s\n", - (unsigned long)mstart, - (unsigned long)mend, - (mtype == LB_MEM_RAM)?"RAM":"Reserved"); - - } - return 0; - } - return 1; -} - -static void relocate_segment(unsigned long buffer, struct segment *seg) -{ - /* Modify all segments that want to load onto coreboot - * to load onto the bounce buffer instead. - */ - unsigned long lb_start = (unsigned long)&_ram_seg; - unsigned long lb_end = (unsigned long)&_eram_seg; - unsigned long start, middle, end; - - printk_spew("lb: [0x%016lx, 0x%016lx)\n", - lb_start, lb_end); - - start = seg->s_addr; - middle = start + seg->s_filesz; - end = start + seg->s_memsz; - /* I don't conflict with coreboot so get out of here */ - if ((end <= lb_start) || (start >= lb_end)) - return; - - printk_spew("segment: [0x%016lx, 0x%016lx, 0x%016lx)\n", - start, middle, end); - - /* Slice off a piece at the beginning - * that doesn't conflict with coreboot. - */ - if (start < lb_start) { - struct segment *new; - unsigned long len = lb_start - start; - new = malloc(sizeof(*new)); - *new = *seg; - new->s_memsz = len; - seg->s_memsz -= len; - seg->s_addr += len; - seg->s_offset += len; - if (seg->s_filesz > len) { - new->s_filesz = len; - seg->s_filesz -= len; - } else { - seg->s_filesz = 0; - } - - /* Order by stream offset */ - new->next = seg; - new->prev = seg->prev; - seg->prev->next = new; - seg->prev = new; - /* Order by original program header order */ - new->phdr_next = seg; - new->phdr_prev = seg->phdr_prev; - seg->phdr_prev->phdr_next = new; - seg->phdr_prev = new; - - /* compute the new value of start */ - start = seg->s_addr; - - printk_spew(" early: [0x%016lx, 0x%016lx, 0x%016lx)\n", - new->s_addr, - new->s_addr + new->s_filesz, - new->s_addr + new->s_memsz); - } - - /* Slice off a piece at the end - * that doesn't conflict with coreboot - */ - if (end > lb_end) { - unsigned long len = lb_end - start; - struct segment *new; - new = malloc(sizeof(*new)); - *new = *seg; - seg->s_memsz = len; - new->s_memsz -= len; - new->s_addr += len; - new->s_offset += len; - if (seg->s_filesz > len) { - seg->s_filesz = len; - new->s_filesz -= len; - } else { - new->s_filesz = 0; - } - /* Order by stream offset */ - new->next = seg->next; - new->prev = seg; - seg->next->prev = new; - seg->next = new; - /* Order by original program header order */ - new->phdr_next = seg->phdr_next; - new->phdr_prev = seg; - seg->phdr_next->phdr_prev = new; - seg->phdr_next = new; - - printk_spew(" late: [0x%016lx, 0x%016lx, 0x%016lx)\n", - new->s_addr, - new->s_addr + new->s_filesz, - new->s_addr + new->s_memsz); - - } - /* Now retarget this segment onto the bounce buffer */ - seg->s_addr = buffer + (seg->s_addr - lb_start); - - printk_spew(" bounce: [0x%016lx, 0x%016lx, 0x%016lx)\n", - seg->s_addr, - seg->s_addr + seg->s_filesz, - seg->s_addr + seg->s_memsz); -} - - -static int build_elf_segment_list( - struct segment *head, - unsigned long bounce_buffer, struct lb_memory *mem, - Elf_phdr *phdr, int headers) -{ - struct segment *ptr; - int i; - memset(head, 0, sizeof(*head)); - head->phdr_next = head->phdr_prev = head; - head->next = head->prev = head; - for(i = 0; i < headers; i++) { - struct segment *new; - /* Ignore data that I don't need to handle */ - if (phdr[i].p_type != PT_LOAD) { - printk_debug("Dropping non PT_LOAD segment\n"); - continue; - } - if (phdr[i].p_memsz == 0) { - printk_debug("Dropping empty segment\n"); - continue; - } - new = malloc(sizeof(*new)); - new->s_addr = phdr[i].p_paddr; - new->s_memsz = phdr[i].p_memsz; - new->s_offset = phdr[i].p_offset; - new->s_filesz = phdr[i].p_filesz; - printk_debug("New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n", - new->s_addr, new->s_memsz, new->s_offset, new->s_filesz); - /* Clean up the values */ - if (new->s_filesz > new->s_memsz) { - new->s_filesz = new->s_memsz; - } - printk_debug("(cleaned up) New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n", - new->s_addr, new->s_memsz, new->s_offset, new->s_filesz); - for(ptr = head->next; ptr != head; ptr = ptr->next) { - if (new->s_offset < ptr->s_offset) - break; - } - /* Order by stream offset */ - new->next = ptr; - new->prev = ptr->prev; - ptr->prev->next = new; - ptr->prev = new; - /* Order by original program header order */ - new->phdr_next = head; - new->phdr_prev = head->phdr_prev; - head->phdr_prev->phdr_next = new; - head->phdr_prev = new; - - /* Verify the memory addresses in the segment are valid */ - if (!valid_area(mem, bounce_buffer, new->s_addr, new->s_memsz)) - goto out; - - /* Modify the segment to load onto the bounce_buffer if necessary. - */ - relocate_segment(bounce_buffer, new); - } - return 1; - out: - return 0; -} - -static int load_elf_segments( - struct segment *head, unsigned char *header, unsigned long header_size) -{ - unsigned long offset; - struct segment *ptr; - - offset = 0; - for(ptr = head->next; ptr != head; ptr = ptr->next) { - unsigned long start_offset; - unsigned long skip_bytes, read_bytes; - unsigned char *dest, *middle, *end; - byte_offset_t result; - printk_debug("Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n", - ptr->s_addr, ptr->s_memsz, ptr->s_filesz); - - /* Compute the boundaries of the segment */ - dest = (unsigned char *)(ptr->s_addr); - end = dest + ptr->s_memsz; - middle = dest + ptr->s_filesz; - start_offset = ptr->s_offset; - /* Ignore s_offset if I have a pure bss segment */ - if (ptr->s_filesz == 0) { - start_offset = offset; - } - - printk_spew("[ 0x%016lx, %016lx, 0x%016lx) <- %016lx\n", - (unsigned long)dest, - (unsigned long)middle, - (unsigned long)end, - (unsigned long)start_offset); - - /* Skip intial buffer unused bytes */ - if (offset < header_size) { - if (start_offset < header_size) { - offset = start_offset; - } else { - offset = header_size; - } - } - - /* Skip the unused bytes */ - skip_bytes = start_offset - offset; - if (skip_bytes && - ((result = stream_skip(skip_bytes)) != skip_bytes)) { - printk_err("ERROR: Skip of %ld bytes skipped %ld bytes\n", - skip_bytes, result); - goto out; - } - offset = start_offset; - - /* Copy data from the initial buffer */ - if (offset < header_size) { - size_t len; - if ((ptr->s_filesz + start_offset) > header_size) { - len = header_size - start_offset; - } - else { - len = ptr->s_filesz; - } - memcpy(dest, &header[start_offset], len); - dest += len; - } - - /* Read the segment into memory */ - read_bytes = middle - dest; - if (read_bytes && - ((result = stream_read(dest, read_bytes)) != read_bytes)) { - printk_err("ERROR: Read of %ld bytes read %ld bytes...\n", - read_bytes, result); - goto out; - } - offset += ptr->s_filesz; - - /* Zero the extra bytes between middle & end */ - if (middle < end) { - printk_debug("Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n", - (unsigned long)middle, (unsigned long)(end - middle)); - - /* Zero the extra bytes */ - memset(middle, 0, end - middle); - } - } - return 1; - out: - return 0; -} - -static int verify_loaded_image( - struct verify_callback *vcb, - Elf_ehdr *ehdr, Elf_phdr *phdr, - struct segment *head - ) -{ - struct segment *ptr; - int ok; - ok = 1; - for(; ok && vcb ; vcb = vcb->next) { - /* Find where the note is loaded */ - /* The whole note must be loaded intact - * so an address of 0 for the descriptor is impossible - */ - vcb->desc_addr = 0; - for(ptr = head->next; ptr != head; ptr = ptr->next) { - unsigned long desc_addr; - desc_addr = ptr->s_addr + vcb->desc_offset - ptr->s_offset; - if ((desc_addr >= ptr->s_addr) && - (desc_addr < (ptr->s_addr + ptr->s_filesz))) { - vcb->desc_addr = desc_addr; - } - } - ok = vcb->callback(vcb, ehdr, phdr, head); - } - return ok; -} - -int elfload(struct lb_memory *mem, - unsigned char *header, unsigned long header_size) -{ - Elf_ehdr *ehdr; - Elf_phdr *phdr; - void *entry; - struct segment head; - struct verify_callback *cb_chain; - unsigned long bounce_buffer; - - /* Find a bounce buffer so I can load to coreboot's current location */ - bounce_buffer = get_bounce_buffer(mem); - if (!bounce_buffer) { - printk_err("Could not find a bounce buffer...\n"); - goto out; - } - - ehdr = (Elf_ehdr *)header; - entry = (void *)(ehdr->e_entry); - phdr = (Elf_phdr *)(&header[ehdr->e_phoff]); - - /* Digest elf note information... */ - cb_chain = 0; - if ((phdr[0].p_type == PT_NOTE) && - ((phdr[0].p_offset + phdr[0].p_filesz) < header_size)) { - cb_chain = process_elf_notes(header, - phdr[0].p_offset, phdr[0].p_filesz); - } - - /* Preprocess the elf segments */ - if (!build_elf_segment_list(&head, - bounce_buffer, mem, phdr, ehdr->e_phnum)) - goto out; - - /* Load the segments */ - if (!load_elf_segments(&head, header, header_size)) - goto out; - - printk_spew("Loaded segments\n"); - /* Verify the loaded image */ - if (!verify_loaded_image(cb_chain, ehdr, phdr, &head)) - goto out; - - printk_spew("verified segments\n"); - /* Shutdown the stream device */ - stream_fini(); - - printk_spew("closed down stream\n"); - /* Reset to booting from this image as late as possible */ - boot_successful(); - - printk_debug("Jumping to boot code at %p\n", entry); - post_code(0xfe); - - /* Jump to kernel */ - jmp_to_elf_entry(entry, bounce_buffer, bounce_size); - return 1; - - out: - return 0; -} - -int elfboot(struct lb_memory *mem) -{ - Elf_ehdr *ehdr; - static unsigned char header[ELF_HEAD_SIZE]; - int header_offset; - int i, result; - - result = 0; - printk_debug("\nelfboot: Attempting to load payload.\n"); - post_code(0xf8); - - if (stream_init() < 0) { - printk_err("Could not initialize driver...\n"); - goto out; - } - - /* Read in the initial ELF_HEAD_SIZE bytes */ - if (stream_read(header, ELF_HEAD_SIZE) != ELF_HEAD_SIZE) { - printk_err("Read failed...\n"); - goto out; - } - /* Scan for an elf header */ - header_offset = -1; - for(i = 0; i < ELF_HEAD_SIZE - (sizeof(Elf_ehdr) + sizeof(Elf_phdr)); i+=16) { - ehdr = (Elf_ehdr *)(&header[i]); - if (memcmp(ehdr->e_ident, ELFMAG, 4) != 0) { - printk_debug("No header at %d\n", i); - continue; - } - printk_debug("Found ELF candidate at offset %d\n", i); - /* Sanity check the elf header */ - if ((ehdr->e_type == ET_EXEC) && - elf_check_arch(ehdr) && - (ehdr->e_ident[EI_VERSION] == EV_CURRENT) && - (ehdr->e_version == EV_CURRENT) && - (ehdr->e_ehsize == sizeof(Elf_ehdr)) && - (ehdr->e_phentsize = sizeof(Elf_phdr)) && - (ehdr->e_phoff < (ELF_HEAD_SIZE - i)) && - ((ehdr->e_phoff + (ehdr->e_phentsize * ehdr->e_phnum)) <= - (ELF_HEAD_SIZE - i))) { - header_offset = i; - break; - } - ehdr = 0; - } - printk_debug("header_offset is %d\n", header_offset); - if (header_offset == -1) { - goto out; - } - - printk_debug("Try to load at offset 0x%x\n", header_offset); - result = elfload(mem, - header + header_offset , ELF_HEAD_SIZE - header_offset); - out: - if (!result) { - /* Shutdown the stream device */ - stream_fini(); - - printk_err("Can not load ELF Image.\n"); - - post_code(0xff); - } - return 0; - -} Deleted: trunk/coreboot-v2/src/boot/filo.c =================================================================== --- trunk/coreboot-v2/src/boot/filo.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/boot/filo.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,194 +0,0 @@ -/* - * Copyright (C) 2003 by SONE Takeshi <ts1(a)tsn.or.jp> and others. - * This program is licensed under the terms of GNU General Public License. - * - * Modified for coreboot by Greg Watson <gwatson(a)lanl.gov> - */ - -#include <console/console.h> -#include <delay.h> -#include <string.h> -#include <boot/tables.h> -#include <boot/elf.h> - -#define ENTER '\r' -#define ESCAPE '\x1b' - -#ifndef CONFIG_AUTOBOOT_CMDLINE -#define autoboot(mem) -#endif - -#if !CONFIG_AUTOBOOT_DELAY -#define autoboot_delay() 0 /* success */ -#endif - -#define havechar() console_tst_byte() -#define putchar(c) console_tx_byte(c) -#define getchar(c) console_rx_byte(c) - -extern char *boot_file; - -int getline(char *buf, int max) -{ - int cur, ch, nonspace_seen; - - cur = 0; - while (buf[cur]) { - putchar(buf[cur]); - cur++; - } - for (;;) { - ch = getchar(); - switch (ch) { - /* end of line */ - case '\r': - case '\n': - putchar('\n'); - goto out; - /* backspace */ - case '\b': - case '\x7f': - if (cur > 0) { - cur--; - putchar('\b'); - putchar(' '); - putchar('\b'); - } - break; - /* word erase */ - case 'W' & 0x1f: /* ^W */ - nonspace_seen = 0; - while (cur) { - if (buf[cur-1] != ' ') - nonspace_seen = 1; - putchar('\b'); - putchar(' '); - putchar('\b'); - cur--; - if (nonspace_seen && cur < max-1 && cur > 0 && buf[cur-1]==' ') - break; - } - break; - /* line erase */ - case 'U' & 0x1f: /* ^U */ - while (cur) { - putchar('\b'); - putchar(' '); - putchar('\b'); - cur--; - } - cur = 0; - break; - default: - if (ch < 0x20) - break; /* ignore control char */ - if (ch >= 0x7f) - break; - if (cur + 1 < max) { - putchar(ch); /* echo back */ - buf[cur] = ch; - cur++; - } - } - } -out: - if (cur >= max) - cur = max - 1; - buf[cur] = '\0'; - return cur; -} - -static void boot(struct lb_memory *mem, const char *line) -{ - char *param; - - /* Split filename and parameter */ - boot_file = strdup(line); - param = strchr(boot_file, ' '); - if (param) { - *param = '\0'; - param++; - } - - if (!elfboot(mem)) - printk_info("Unsupported image format\n"); - free(boot_file); -} - -#ifdef CONFIG_AUTOBOOT_CMDLINE -#if CONFIG_AUTOBOOT_DELAY -static inline int autoboot_delay(void) -{ - unsigned int timeout; - int sec, tmp; - char key; - - key = 0; - - printk_info("Press <Enter> for default boot, or <Esc> for boot prompt... "); - for (sec = CONFIG_AUTOBOOT_DELAY; sec>0 && key==0; sec--) { - printk_info("%d", sec); - timeout = 10; - while (timeout-- > 0) { - if (havechar()) { - key = getchar(); - if (key==ENTER || key==ESCAPE) - break; - } - mdelay(100); - } - for (tmp = sec; tmp; tmp /= 10) - printk_info("\b \b"); - } - if (key == 0) { - printk_info("timed out\n"); - return 0; /* success */ - } else { - putchar('\n'); - if (key == ESCAPE) - return -1; /* canceled */ - else - return 0; /* default accepted */ - } -} -#endif /* CONFIG_AUTOBOOT_DELAY */ - -static void autoboot(struct lb_memory *mem) -{ - /* If Escape key is pressed already, skip autoboot */ - if (havechar() && getchar()==ESCAPE) - return; - - if (autoboot_delay()==0) { - printk_info("boot: %s\n", CONFIG_AUTOBOOT_CMDLINE); - boot(mem, CONFIG_AUTOBOOT_CMDLINE); - } -} -#endif /* CONFIG_AUTOBOOT_CMDLINE */ - -/* The main routine */ -int filo(struct lb_memory *mem) -{ - char line[256]; - - printk_info("FILO version 0.4.1\n"); - - /* Try default image */ - autoboot(mem); - - /* The above didn't work, ask user */ - while (havechar()) - getchar(); -#ifdef CONFIG_AUTOBOOT_CMDLINE - strncpy(line, CONFIG_AUTOBOOT_CMDLINE, sizeof(line)-1); - line[sizeof(line)-1] = '\0'; -#else - line[0] = '\0'; -#endif - for (;;) { - printk_info("boot: "); - getline(line, sizeof line); - if (line[0]) - boot(mem, line); - } -} Modified: trunk/coreboot-v2/src/boot/hardwaremain.c =================================================================== --- trunk/coreboot-v2/src/boot/hardwaremain.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/boot/hardwaremain.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -96,22 +96,11 @@ * write our configuration tables. */ lb_mem = write_tables(); -#if CONFIG_CBFS == 1 -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 cbfs_load_payload(lb_mem, "fallback/payload"); -# else - cbfs_load_payload(lb_mem, "normal/payload"); -# endif #else - -#if CONFIG_FS_PAYLOAD == 1 -#warning "CONFIG_FS_PAYLOAD is deprecated." - filo(lb_mem); -#else -#warning "elfboot will soon be deprecated." - elfboot(lb_mem); + cbfs_load_payload(lb_mem, "normal/payload"); #endif -#endif printk(BIOS_ERR, "Boot failed.\n"); } Modified: trunk/coreboot-v2/src/config/Config.lb =================================================================== --- trunk/coreboot-v2/src/config/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/config/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -215,7 +215,6 @@ # for now, this is just 'lib', but it may be more later. dir /lib dir /console -dir /stream dir /devices dir /pc80 dir /boot Modified: trunk/coreboot-v2/src/config/Options.lb =================================================================== --- trunk/coreboot-v2/src/config/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/config/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -641,11 +641,6 @@ export always comment "Use Multiboot (rather than ELF boot notes) to boot the payload" end -define CONFIG_IDE_PAYLOAD - default 0 - export always - comment "Boot from IDE device" -end define CONFIG_ROM_PAYLOAD default 0 export always @@ -672,47 +667,6 @@ export always comment "boot image is already compressed" end -define CONFIG_SERIAL_PAYLOAD - default 0 - export always - comment "Download boot image from serial port" -end -define CONFIG_FS_PAYLOAD - default 0 - export always - comment "Boot from a filesystem" -end -define CONFIG_FS_EXT2 - default 0 - export always - comment "Enable ext2 filesystem support" -end -define CONFIG_FS_ISO9660 - default 0 - export always - comment "Enable ISO9660 filesystem support" -end -define CONFIG_FS_FAT - default 0 - export always - comment "Enable FAT filesystem support" -end -define CONFIG_CBFS - default 1 - export always - comment "The new CBFS file system" -end -define CONFIG_AUTOBOOT_DELAY - default 2 - export always - comment "Delay (in seconds) before autobooting" -end -define CONFIG_AUTOBOOT_CMDLINE - default "hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" - export always - format "\"%s\"" - comment "Default command line when autobooting" -end define CONFIG_USE_WATCHDOG_ON_BOOT default 0 Modified: trunk/coreboot-v2/src/config/failovercalculation.lb =================================================================== --- trunk/coreboot-v2/src/config/failovercalculation.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/config/failovercalculation.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -10,13 +10,8 @@ default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE ) else - if CONFIG_CBFS - default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE - default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE ) - else - default CONFIG_ROM_SECTION_SIZE = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE ) - default CONFIG_ROM_SECTION_OFFSET = 0 - end + default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE + default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE ) end end Modified: trunk/coreboot-v2/src/config/nofailovercalculation.lb =================================================================== --- trunk/coreboot-v2/src/config/nofailovercalculation.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/config/nofailovercalculation.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -6,13 +6,8 @@ default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE ) else - if CONFIG_CBFS - default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE - default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE ) - else - default CONFIG_ROM_SECTION_SIZE = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE ) - default CONFIG_ROM_SECTION_OFFSET = 0 - end + default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE + default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE ) end ## Modified: trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c =================================================================== --- trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -3,16 +3,15 @@ 2006/05/02 - stepan: move nrv2b to an extra file. */ -#if CONFIG_CBFS == 1 void cbfs_and_run_core(const char*, unsigned ebp); static void copy_and_run(void) { -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 cbfs_and_run_core("fallback/coreboot_ram", 0); -# else +#else cbfs_and_run_core("normal/coreboot_ram", 0); -# endif +#endif } #if CONFIG_AP_CODE_IN_CAR == 1 @@ -26,38 +25,3 @@ # endif } #endif - -#else -void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp); - -extern u8 _liseg, _iseg, _eiseg; - -static void copy_and_run(void) -{ - uint8_t *src, *dst; - unsigned long ilen; - - src = &_liseg; - dst = &_iseg; - ilen = &_eiseg - dst; - - copy_and_run_core(src, dst, ilen, 0); -} - -#if CONFIG_AP_CODE_IN_CAR == 1 - -extern u8 _liseg_apc, _iseg_apc, _eiseg_apc; - -static void copy_and_run_ap_code_in_car(unsigned ret_addr) -{ - uint8_t *src, *dst; - unsigned long ilen; - - src = &_liseg_apc; - dst = &_iseg_apc; - ilen = &_eiseg_apc - dst; - - copy_and_run_core(src, dst, ilen, ret_addr); -} -#endif -#endif Modified: trunk/coreboot-v2/src/cpu/amd/model_lx/cache_as_ram.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_lx/cache_as_ram.inc 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/cpu/amd/model_lx/cache_as_ram.inc 2009-10-03 16:24:58 UTC (rev 4712) @@ -222,19 +222,8 @@ movl $0x4000000, %esp movl %esp, %ebp pushl %esi -#if CONFIG_CBFS == 1 pushl $str_coreboot_ram_name call cbfs_and_run_core -#else - movl $_liseg, %esi - movl $_iseg, %edi - movl $_eiseg, %ecx - subl %edi, %ecx - pushl %ecx - pushl %edi - pushl %esi - call copy_and_run_core -#endif .Lhlt: intel_chip_post_macro(0xee) /* post fail ee */ @@ -295,10 +284,8 @@ .previous #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#if CONFIG_CBFS == 1 -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 str_coreboot_ram_name: .string "fallback/coreboot_ram" -# else +#else str_coreboot_ram_name: .string "normal/coreboot_ram" -# endif #endif Modified: trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -2,7 +2,6 @@ (Written by Patrick Georgi <patrick.georgi(a)coresystems.de> for coresystems GmbH */ -#if CONFIG_CBFS == 1 void cbfs_and_run_core(char*, unsigned ebp); static void copy_and_run(unsigned cpu_reset) @@ -10,32 +9,9 @@ if (cpu_reset == 1) cpu_reset = -1; else cpu_reset = 0; -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 cbfs_and_run_core("fallback/coreboot_ram", cpu_reset); -# else - cbfs_and_run_core("normal/coreboot_ram", cpu_reset); -# endif -} - #else -void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp); - -extern u8 _liseg, _iseg, _eiseg; - -static void copy_and_run(unsigned cpu_reset) -{ - uint8_t *src, *dst; - unsigned long ilen; - - - src = &_liseg; - dst = &_iseg; - ilen = &_eiseg - dst; - - if (cpu_reset == 1) cpu_reset = -1; - else cpu_reset = 0; - - copy_and_run_core(src, dst, ilen, cpu_reset); -} + cbfs_and_run_core("normal/coreboot_ram", cpu_reset); #endif - +} Modified: trunk/coreboot-v2/src/devices/pci_rom.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_rom.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/devices/pci_rom.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -35,22 +35,17 @@ struct rom_header *rom_header; struct pci_data *rom_data; - if (CONFIG_CBFS) { - void *v; - /* if it's in FLASH, then it's as if dev->on_mainboard was true */ - v = cbfs_load_optionrom(dev->vendor, dev->device, NULL); - printk_debug("In cbfs, rom address for %s = %p\n", - dev_path(dev), v); - if (v) { - dev->rom_address = (u32)v; - dev->on_mainboard = 1; - } - } + void *v; + /* if it's in FLASH, then it's as if dev->on_mainboard was true */ + v = cbfs_load_optionrom(dev->vendor, dev->device, NULL); + printk_debug("In cbfs, rom address for %s = %p\n", + dev_path(dev), v); + if (v) { + dev->rom_address = (u32)v; + dev->on_mainboard = 1; + } if (dev->on_mainboard) { - /* this is here as a legacy path. We hope it goes away soon. Users should not have to - * compute the ROM address at build time! - */ // in case some device PCI_ROM_ADDRESS can not be set or readonly rom_address = dev->rom_address; printk_debug("On mainboard, rom address for %s = %lx\n", Modified: trunk/coreboot-v2/src/lib/Config.lb =================================================================== --- trunk/coreboot-v2/src/lib/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/lib/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -27,11 +27,5 @@ initobject memcpy.o initobject memcmp.o -if CONFIG_CBFS - object cbfs.o - object lzma.o -end - -if CONFIG_COMPRESSED_PAYLOAD_LZMA - object lzma.o -end +object cbfs.o +object lzma.o Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -98,9 +97,4 @@ default CONFIG_CONSOLE_VGA = 1 # Override this in targets/*/Config.lb. default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb. -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,9 +102,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -180,10 +179,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -301,9 +300,4 @@ default CONFIG_HAVE_MAINBOARD_RESOURCES=1 ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -180,10 +179,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -299,9 +298,4 @@ default CONFIG_HAVE_MAINBOARD_RESOURCES=1 ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -159,10 +158,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -325,9 +324,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -18,7 +18,6 @@ # uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -362,9 +361,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -242,9 +241,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -180,10 +179,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,9 +102,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_PIRQ_TABLE -uses CONFIG_CBFS uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT uses CONFIG_HAVE_HARD_RESET @@ -161,10 +160,4 @@ # default CONFIG_PCI_ROM_RUN=1 default CONFIG_VIDEO_MB = 0 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_USE_FAILOVER_IMAGE @@ -167,9 +166,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON" -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -18,7 +18,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -167,9 +166,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON" -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -18,7 +18,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -176,9 +175,4 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 # Override this in targets/*/Config.lb. default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb. -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -158,9 +157,4 @@ default CONFIG_UDELAY_TSC=1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -98,9 +97,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,5 +102,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -104,9 +103,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,9 +102,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,9 +102,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,10 +102,4 @@ ## default CONFIG_MAX_PCI_BUSES = 3 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -260,9 +259,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,9 +227,4 @@ ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -113,11 +112,4 @@ default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -121,11 +120,4 @@ default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -35,9 +35,6 @@ - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 */ static void enable_dev(struct device *dev) { -#if !CONFIG_CBFS - extern unsigned char *rom_start, *rom_end; -#endif volatile struct mmcrpic *pic = MMCRPIC; volatile struct mmcr *mmcr = MMCRDEFAULT; @@ -135,15 +132,6 @@ */ /* follow fuctory here */ mmcr->dmacontrol.extchanmapa = 0x3210; - -#if !CONFIG_CBFS - /* hack for IDIOTIC need to fix rom_start */ - printk_err("Patching rom_start due to sc520 limits\n"); - rom_start = 0x2000000 + 0x40000; - rom_end = rom_start + CONFIG_PAYLOAD_SIZE - 1; -#endif - - } struct chip_operations mainboard_ops = { CHIP_NAME("DIGITAL-LOGIC MSM586SEG Mainboard") Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -180,10 +179,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -164,10 +163,4 @@ default CONFIG_VIDEO_MB = 0 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -48,13 +48,11 @@ uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL -uses CONFIG_CBFS default CONFIG_CONSOLE_SERIAL8250=1 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 -default CONFIG_CBFS=1 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. default CONFIG_ROM_SIZE = 256*1024 Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -22,7 +22,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -351,9 +350,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -359,10 +358,5 @@ ## Select power on after power fail setting default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" -# -# CBFS -# -# -default CONFIG_CBFS=1 ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -84,7 +84,6 @@ uses CONFIG_HW_MEM_HOLE_SIZEK uses CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC uses CONFIG_K8_HT_FREQ_1G_SUPPORT -uses CONFIG_CBFS uses CONFIG_HT_CHAIN_UNITID_BASE uses CONFIG_HT_CHAIN_END_UNITID_BASE @@ -327,9 +326,5 @@ ## Select power on after power fail setting default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" -## -## CBFS -default CONFIG_CBFS=1 - ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -221,9 +220,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -227,9 +226,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -145,10 +144,4 @@ default CONFIG_VIDEO_MB = 0 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -172,10 +171,4 @@ default CONFIG_VIDEO_MB = 0 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -106,10 +105,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/intel/eagleheights/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/eagleheights/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/intel/eagleheights/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -70,7 +70,6 @@ uses CONFIG_PCIE_CONFIGSPACE_HOLE uses CONFIG_MMCONF_SUPPORT uses CONFIG_MMCONF_BASE_ADDRESS -uses CONFIG_CBFS # uses CONFIG_MAINBOARD uses CONFIG_MAINBOARD_PART_NUMBER @@ -322,10 +321,5 @@ ## Select power on after power fail setting default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" -# -# CBFS -# -default CONFIG_CBFS=1 - ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -242,9 +241,4 @@ ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -18,7 +18,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -225,9 +224,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -18,7 +18,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -236,10 +235,4 @@ ### End Options.lb - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_HAVE_PIRQ_TABLE @@ -240,9 +239,4 @@ # default CONFIG_CPU_OPT="-g" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -326,9 +325,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,9 +227,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -227,9 +226,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -104,10 +103,4 @@ ## default CONFIG_MAX_PCI_BUSES = 3 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -71,7 +71,6 @@ uses CONFIG_MMCONF_SUPPORT uses CONFIG_MMCONF_BASE_ADDRESS uses CONFIG_GFXUMA -uses CONFIG_CBFS # uses CONFIG_MAINBOARD @@ -327,10 +326,5 @@ ## Select power on after power fail setting default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" -# -# CBFS -# -default CONFIG_CBFS=1 - ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -159,10 +158,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -21,7 +21,6 @@ ## Based on Options.lb from AMD's DB800 mainboard. uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -29,11 +28,6 @@ uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD -uses CONFIG_IDE -uses CONFIG_FS_PAYLOAD -uses CONFIG_FS_EXT2 -uses CONFIG_AUTOBOOT_DELAY -uses CONFIG_AUTOBOOT_CMDLINE uses CONFIG_IRQ_SLOT_COUNT uses CONFIG_MAINBOARD uses CONFIG_MAINBOARD_VENDOR @@ -211,9 +205,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -21,7 +21,6 @@ ## Based on Options.lb from AMD's DB800 mainboard. uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -29,11 +28,6 @@ uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD -uses CONFIG_IDE -uses CONFIG_FS_PAYLOAD -uses CONFIG_FS_EXT2 -uses CONFIG_AUTOBOOT_DELAY -uses CONFIG_AUTOBOOT_CMDLINE uses CONFIG_IRQ_SLOT_COUNT uses CONFIG_MAINBOARD uses CONFIG_MAINBOARD_VENDOR @@ -211,9 +205,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/mitac/6513wu/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/mitac/6513wu/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/mitac/6513wu/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CC -uses CONFIG_CBFS uses CONFIG_COMPRESSED_PAYLOAD_LZMA uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_VGA @@ -78,7 +77,6 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_ROM_PAYLOAD = 1 -default CONFIG_CBFS=1 # RAM layout default CONFIG_RAMBASE = 0x00004000 Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,9 +96,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,7 +96,6 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -default CONFIG_CBFS = 1 default CONFIG_HAVE_HIGH_TABLES = 1 default CONFIG_VIDEO_MB = 1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -21,7 +21,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_USE_FAILOVER_IMAGE @@ -320,9 +319,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_USE_FAILOVER_IMAGE @@ -186,9 +185,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON" -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -23,7 +23,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -327,9 +326,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -23,7 +23,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -307,9 +306,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -96,9 +95,4 @@ default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -243,9 +242,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -349,9 +348,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -160,10 +159,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -160,10 +159,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -198,10 +197,4 @@ ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CC -uses CONFIG_CBFS uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_VGA uses CONFIG_COMPRESSED_PAYLOAD_LZMA @@ -96,9 +95,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_MAINBOARD_VENDOR = "RCA" default CONFIG_MAINBOARD_PART_NUMBER = "RM4100" -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -96,5 +95,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -276,9 +275,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -351,9 +350,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -348,11 +347,5 @@ default CONFIG_USE_FALLBACK_IMAGE=0 default CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE -# -# CBFS -# -# -default CONFIG_CBFS=1 - ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dmr_fam10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dmr_fam10/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dmr_fam10/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -360,12 +359,5 @@ default CONFIG_USE_FAILOVER_IMAGE=0 default CONFIG_USE_FALLBACK_IMAGE=0 default CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE - -# -# CBFS -# -# -default CONFIG_CBFS=1 - ### End Options.lb end Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,10 +227,4 @@ ### End Options.lb - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,10 +227,4 @@ ### End Options.lb - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,10 +227,4 @@ ### End Options.lb - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,9 +227,4 @@ ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -228,9 +227,4 @@ ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -135,10 +134,4 @@ ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c 2009-10-03 16:24:58 UTC (rev 4712) @@ -35,9 +35,6 @@ - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 */ static void enable_dev(struct device *dev) { -#if !CONFIG_CBFS - extern unsigned char *rom_start, *rom_end; -#endif volatile struct mmcrpic *pic = MMCRPIC; volatile struct mmcr *mmcr = MMCRDEFAULT; @@ -141,15 +138,7 @@ mmcr->dmacontrol.extchanmapa = 0xf210; mmcr->dmacontrol.extchanmapb = 0xffff; -#if !CONFIG_CBFS - /* hack for IDIOTIC need to fix rom_start */ - printk_err("Patching rom_start due to sc520 limits\n"); - rom_start = 0x09400000 + 0xe0000; - rom_end = rom_start + CONFIG_PAYLOAD_SIZE - 1; -#endif - printk_err("TS5300 EXIT %s\n", __func__); - } struct chip_operations mainboard_ops = { Modified: trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,10 +102,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CC -uses CONFIG_CBFS uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_VGA uses CONFIG_COMPRESSED_PAYLOAD_LZMA @@ -96,9 +95,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_MAINBOARD_VENDOR = "THOMSON" default CONFIG_MAINBOARD_PART_NUMBER = "IP1000" -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -97,10 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -256,9 +255,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -244,9 +243,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -245,9 +244,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -244,9 +243,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -261,9 +260,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -244,9 +243,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -271,9 +270,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -300,9 +299,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -288,9 +287,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -307,9 +306,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -351,9 +350,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_HAVE_ACPI_RESUME @@ -360,9 +359,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -253,9 +252,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -252,9 +251,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" ### End Options.lb -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/epia/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL -uses CONFIG_CBFS uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_TTYS0_BAUD @@ -139,12 +138,4 @@ default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" - - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -20,7 +20,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -103,11 +102,4 @@ ## time when it can't find a device. ## default CONFIG_MAX_PCI_BUSES = 3 - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -1,5 +1,4 @@ uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -142,11 +141,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 default CONFIG_CONSOLE_SERIAL8250=1 - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_HAVE_MP_TABLE -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE uses CONFIG_HAVE_FALLBACK_BOOT @@ -137,7 +136,6 @@ default HOSTCC = "gcc" default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 -default CONFIG_CBFS=1 ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. Modified: trunk/coreboot-v2/src/mainboard/via/epia-n/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-n/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/epia-n/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses CONFIG_CBFS uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HAVE_FAILOVER_BOOT uses CONFIG_USE_FAILOVER_IMAGE @@ -120,11 +119,4 @@ ## time when it can't find a device. ## default CONFIG_MAX_PCI_BUSES = 3 - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -19,7 +19,6 @@ ## uses CONFIG_SMP -uses CONFIG_CBFS uses CONFIG_HAVE_MP_TABLE uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_USE_FALLBACK_IMAGE @@ -111,11 +110,4 @@ default CONFIG_TTYS0_LCS = 0x3 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 - - -# -# CBFS -# -# -default CONFIG_CBFS=1 end Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -55,7 +55,6 @@ uses CONFIG_RAMBASE uses CONFIG_XIP_ROM_SIZE uses CONFIG_XIP_ROM_BASE -uses CONFIG_CBFS # compiler specifics uses CONFIG_CROSS_COMPILE @@ -242,11 +241,5 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5 ## At a maximum only compile in this level of debugging default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5 - -# -# CBFS -# -default CONFIG_CBFS=1 - end Modified: trunk/coreboot-v2/targets/kontron/986lcd-m/Config.lb =================================================================== --- trunk/coreboot-v2/targets/kontron/986lcd-m/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/targets/kontron/986lcd-m/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -5,7 +5,6 @@ ## (normal AND fallback images and payloads). option CONFIG_ROM_SIZE = 1024 * 1024 -option CONFIG_CBFS=1 option HAVE_HIGH_TABLES=1 option MAXIMUM_CONSOLE_LOGLEVEL=9 option DEFAULT_CONSOLE_LOGLEVEL=9 Modified: trunk/coreboot-v2/targets/lippert/roadrunner-lx/Config.lb =================================================================== --- trunk/coreboot-v2/targets/lippert/roadrunner-lx/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/targets/lippert/roadrunner-lx/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -30,14 +30,6 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0 option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0 -## Load payload (e.g. Linux) from IDE. -#option CONFIG_ROM_PAYLOAD = 0 -#option CONFIG_IDE = 1 -#option CONFIG_FS_PAYLOAD = 1 -#option CONFIG_FS_EXT2 = 1 -#option CONFIG_AUTOBOOT_DELAY = 0 -#option CONFIG_AUTOBOOT_CMDLINE = "hda1:/payload.elf" - # Leave 36k for VSA. Usually board is equipped with a 512 KB FWH (LPC) flash, # however it can be replaced with a 1 MB chip. option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) Modified: trunk/coreboot-v2/targets/lippert/spacerunner-lx/Config.lb =================================================================== --- trunk/coreboot-v2/targets/lippert/spacerunner-lx/Config.lb 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/targets/lippert/spacerunner-lx/Config.lb 2009-10-03 16:24:58 UTC (rev 4712) @@ -31,14 +31,6 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0 option CONFIG_COMPRESSED_PAYLOAD_LZMA = 0 -## Load payload (e.g. Linux) from IDE. -#option CONFIG_ROM_PAYLOAD = 0 -#option CONFIG_IDE = 1 -#option CONFIG_FS_PAYLOAD = 1 -#option CONFIG_FS_EXT2 = 1 -#option CONFIG_AUTOBOOT_DELAY = 0 -#option CONFIG_AUTOBOOT_CMDLINE = "hda1:/payload.elf" - # Leave 36k for VSA. Board is equipped with a 1 MB SPI flash, however, due to # limitations of the IT8712F Super I/O, only the top 512 KB are directly mapped. option CONFIG_ROM_SIZE = (512 * 1024) - (36 * 1024) Modified: trunk/coreboot-v2/util/abuild/abuild =================================================================== --- trunk/coreboot-v2/util/abuild/abuild 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/util/abuild/abuild 2009-10-03 16:24:58 UTC (rev 4712) @@ -176,20 +176,12 @@ cat <<EOF romimage "normal" option CONFIG_USE_FALLBACK_IMAGE=0 -if CONFIG_CBFS -else - option CONFIG_ROM_IMAGE_SIZE=0x17000 -end option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" option CONFIG_USE_FALLBACK_IMAGE=1 -if CONFIG_CBFS -else - option CONFIG_ROM_IMAGE_SIZE=0x17000 -end option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Modified: trunk/coreboot-v2/util/newconfig/config.g =================================================================== --- trunk/coreboot-v2/util/newconfig/config.g 2009-10-03 15:34:08 UTC (rev 4711) +++ trunk/coreboot-v2/util/newconfig/config.g 2009-10-03 16:24:58 UTC (rev 4712) @@ -2247,7 +2247,7 @@ file = safe_open(makefilepath, 'w+') writemakefileheader(file, makefilepath) - # Hack to get the necessary settings (CONFIG_CBFS): + # Hack to get the necessary settings (CONFIG_COMPRESSED_PAYLOAD_LZMA): file.write("include %s/Makefile.settings\n\n" % romimages.keys()[0]) # main rule @@ -2275,7 +2275,6 @@ file.write("base-clean:\n") file.write("\trm -f romcc*\n\n") - file.write("ifeq \"$(CONFIG_CBFS)\" \"1\"\n\n") file.write("CBFS_COMPRESS_FLAG:=\n") file.write("CBFS_STAGE_COMPRESS_FLAG:=\n") file.write("ifeq \"$(CONFIG_COMPRESSED_PAYLOAD_LZMA)\" \"1\"\nCBFS_COMPRESS_FLAG:=l\nendif\n\n") @@ -2309,20 +2308,7 @@ file.write("\tif [ -f %s/coreboot_apc ]; then ./cbfs/cbfstool %s add-stage %s/coreboot_apc %s/coreboot_apc $(CBFS_COMPRESS_FLAG); fi\n" % (j, i.name, j, j,)) file.write("\t./cbfs/cbfstool %s print\n" % i.name) file.write("\n") - file.write("else\n\n") - for i in buildroms: - file.write("%s:" % i.name) - for j in i.roms: - file.write(" %s/coreboot.rom " % j) - file.write("\n") - file.write("\t cat ") - for j in i.roms: - file.write(" %s/coreboot.rom " % j) - file.write("> %s\n\n" %i.name) - - file.write("endif\n\n") - file.write(".PHONY: all clean cbfstool") for i in romimages.keys(): file.write(" %s-clean" % i)

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[v2] r4711 - in trunk/coreboot-v2/src/mainboard: a-trend/atc-6220 a-trend/atc-6240 abit/be6-ii_v2_0 amd/rumba amd/serengeti_cheetah asus/m2v-mx_se asus/mew-am asus/mew-vm asus/p2b asus/p2b-d asus/p2b-ds asus/p2b-f asus/p3b-f azza/pt-6ibd biostar/m6tba compaq/deskpro_en_sff_p600 dell/s1850 emulation/qemu-x86 gigabyte/ga-6bxc intel/eagleheights intel/jarrell intel/mtarvon intel/truxton intel/xe7501devkit kontron/986lcd-m mitac/6513wu msi/ms6119 msi/ms6147 msi/ms6178 nec/powermate2000 soyo/sy-6ba-pl
by svn＠coreboot.org 03 Oct '09

03 Oct '09

Author: uwe Date: 2009-10-03 17:34:08 +0200 (Sat, 03 Oct 2009) New Revision: 4711 Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Kconfig trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Kconfig trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Kconfig trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Kconfig trunk/coreboot-v2/src/mainboard/asus/mew-am/Kconfig trunk/coreboot-v2/src/mainboard/asus/mew-vm/Kconfig trunk/coreboot-v2/src/mainboard/asus/p2b-d/Kconfig trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Kconfig trunk/coreboot-v2/src/mainboard/asus/p2b-f/Kconfig trunk/coreboot-v2/src/mainboard/asus/p2b/Kconfig trunk/coreboot-v2/src/mainboard/asus/p3b-f/Kconfig trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Kconfig trunk/coreboot-v2/src/mainboard/biostar/m6tba/Kconfig trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Kconfig trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Kconfig trunk/coreboot-v2/src/mainboard/intel/eagleheights/Kconfig trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig trunk/coreboot-v2/src/mainboard/intel/mtarvon/Kconfig trunk/coreboot-v2/src/mainboard/intel/truxton/Kconfig trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Kconfig trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Kconfig trunk/coreboot-v2/src/mainboard/mitac/6513wu/Kconfig trunk/coreboot-v2/src/mainboard/msi/ms6119/Kconfig trunk/coreboot-v2/src/mainboard/msi/ms6147/Kconfig trunk/coreboot-v2/src/mainboard/msi/ms6178/Kconfig trunk/coreboot-v2/src/mainboard/nec/powermate2000/Kconfig trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s1846/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig trunk/coreboot-v2/src/mainboard/via/epia-cn/Kconfig trunk/coreboot-v2/src/mainboard/via/epia-m/Kconfig trunk/coreboot-v2/src/mainboard/via/epia-m700/Kconfig trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig trunk/coreboot-v2/src/mainboard/via/epia/Kconfig trunk/coreboot-v2/src/mainboard/via/pc2500e/Kconfig trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig Log: Remove duplicate and not too useful Kconfig board comments as per discussion on the mailing list. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - A-Trend ATC-6220 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - A-Trend ATC-6240 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - Abit BE6-II V2.0 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -27,8 +27,6 @@ select UDELAY_TSC select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 select HAVE_PIRQ_TABLE - help - AMD Rumba mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -11,8 +11,6 @@ select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR select USE_DCACHE_RAM - help - AMD Serengeti Cheetah mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -34,8 +34,6 @@ select IOAPIC select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES - help - Asus M2V-MX SE mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS MEW-AM mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS MEW-VM mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS P2B mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-d/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-d/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-d/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -32,8 +32,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS P2B-D mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -32,8 +32,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS P2B-DS mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS P2B-F mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - ASUS P3B-F mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - AZZA PT-6IBD mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - Biostar M6TBA mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -30,8 +30,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - Compaq Deskpro EN SFF P600 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -7,8 +7,6 @@ select SOUTHBRIDGE_INTEL_PXHD select SUPERIO_NSC_PC8374 select PIRQ_TABLE - help - Dell PowerEdge 1850 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -5,8 +5,6 @@ select SOUTHBRIDGE_INTEL_I82371EB select CPU_EMULATION_QEMU_X86 select CONSOLE_SERIAL8250 - help - x86 QEMU variant. config MAINBOARD_DIR string @@ -15,5 +13,5 @@ config MAINBOARD_PART_NUMBER string - default "QEMU-86" + default "QEMU-x86" depends on BOARD_EMULATION_QEMU_X86 Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - GIGABYTE GA-6BXC mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/intel/eagleheights/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/eagleheights/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/intel/eagleheights/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -12,8 +12,6 @@ select UDELAY_TSC select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 select AP_IN_SIPI_WAIT - help - Intel EagleHeights mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -8,8 +8,6 @@ select SUPERIO_NSC_PC87427 select HAVE_PIRQ_TABLE select UDELAY_TSC - help - Intel Jarrell (SE7520JR2) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/intel/mtarvon/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/mtarvon/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/intel/mtarvon/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -7,8 +7,6 @@ select SUPERIO_INTEL_I3100 select HAVE_PIRQ_TABLE select UDELAY_TSC - help - Intel 3100 devkit (Mt. Arvon) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/intel/truxton/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/truxton/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/intel/truxton/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -8,8 +8,6 @@ select SUPERIO_SMSC_SMSCSUPERIO select HAVE_PIRQ_TABLE select UDELAY_TSC - help - Intel EP80579 devkit (Truxton) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -8,8 +8,6 @@ select SUPERIO_SMSC_LPC47B272 select HAVE_PIRQ_TABLE select UDELAY_TSC - help - Intel XE7501devkit mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -10,8 +10,6 @@ select MMCONF_SUPPORT select USE_PRINTK_IN_CAR select AP_IN_SIPI_WAIT - help - Kontron 986LCD-M/mITX mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/mitac/6513wu/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/mitac/6513wu/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/mitac/6513wu/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - Mitac 6513WU mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - MSI MS-6119 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/msi/ms6147/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6147/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/msi/ms6147/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - MSI MS-6147 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - MSI MS-6178 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/nec/powermate2000/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/nec/powermate2000/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/nec/powermate2000/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - NEC PowerMate 2000 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -29,8 +29,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - SOYO SY-6BA+ III mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -10,8 +10,6 @@ select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR select USE_DCACHE_RAM - help - Sun Ultra 40 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -10,8 +10,6 @@ select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR select USE_DCACHE_RAM - help - Supermicro H8DME mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -28,8 +28,6 @@ select UDELAY_IO select PCI_ROM_RUN select CONSOLE_VGA - help - Tyan Tsunami ATX (S1846) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -8,8 +8,6 @@ select SOUTHBRIDGE_AMD_AMD8111 select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE - help - Tyan Tomcat K8S (S2850) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -9,8 +9,6 @@ select SOUTHBRIDGE_AMD_AMD8111 select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE - help - Tyan Tiger K8W (S2875) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -9,8 +9,6 @@ select SOUTHBRIDGE_AMD_AMD8111 select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE - help - Tyan Thunder K8SR (S2881) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -9,8 +9,6 @@ select SOUTHBRIDGE_AMD_AMD8131 select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE - help - Tyan Thunder K8SRE (S2891) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -9,8 +9,6 @@ select SOUTHBRIDGE_AMD_AMD8131 select SUPERIO_WINBOND_W83627HF select PIRQ_TABLE - help - Tyan Thunder K8SE (S2892) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -9,8 +9,6 @@ select SOUTHBRIDGE_AMD_AMD8131 select SUPERIO_SMSC_LPC47B397 select PIRQ_TABLE - help - Tyan Thunder K8WE (S2895) mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/epia/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/epia/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -6,8 +6,6 @@ select SOUTHBRIDGE_VIA_VT8231 select SUPERIO_WINBOND_W83627HF select HAVE_PIRQ_TABLE - help - VIA EPIA mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -6,8 +6,6 @@ select SOUTHBRIDGE_VIA_VT8237R select SUPERIO_VIA_VT1211 select HAVE_PIRQ_TABLE - help - VIA EPIA-CN mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -7,8 +7,6 @@ select SOUTHBRIDGE_RICOH_RL5C476 select SUPERIO_VIA_VT1211 select HAVE_PIRQ_TABLE - help - VIA EPIA-M mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/epia-m700/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m700/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/epia-m700/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -5,8 +5,6 @@ select NORTHBRIDGE_VIA_VX800 select SUPERIO_WINBOND_W83697HF select HAVE_PIRQ_TABLE - help - VIA EPIA-M700 mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -6,8 +6,6 @@ select SOUTHBRIDGE_VIA_VT8237R select SUPERIO_WINBOND_W83697HF select HAVE_PIRQ_TABLE - help - VIA EPIA-N mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/pc2500e/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/pc2500e/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/pc2500e/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -6,8 +6,6 @@ select SOUTHBRIDGE_VIA_VT8237R select SUPERIO_ITE_IT8716F select HAVE_PIRQ_TABLE - help - VIA pc2500e mainboard. config MAINBOARD_DIR string Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig 2009-10-02 15:46:10 UTC (rev 4710) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig 2009-10-03 15:34:08 UTC (rev 4711) @@ -8,8 +8,6 @@ select HAVE_PIRQ_TABLE # select MMCONF_SUPPORT select USE_PRINTK_IN_CAR - help - VIA VT8454C mainboard. config MAINBOARD_DIR string

1 0

[PATCH]fix various vgabios.c copies in light of CBFS
by Patrick Georgi 03 Oct '09

03 Oct '09

Hi, there were a couple of copies of vgabios.c that looked for the option rom image at fixed addresses (usually begin of flash), which is not the supported way of doing things anymore. As this patch removes the non-CBFS capability, I'd commit it right after the removal of non-CBFS support this evening (in ~3 hours), as non-CBFS support isn't necessary anymore at that point. Of course, the duplication should be eliminated, as well as (some of) the rom_address entries in Config.lb and devicetree.cb for the boards. It might also be worthwhile to investigate if src/devices/pci_rom.c couldn't be used for the option rom loading. Just using dev->rom_address didn't work on my board, but this fix was good enough for me for now. The change is the same in all vgabios.c files, it's boot tested on cx700 (via/vt8454c), via/epia-m and artecgroup/dbe61 are build tested. Furthermore, for cn400, via/epia-n built, for cn700, via/epia-cn built, for vx800, via/epia-m700 built Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

2 1

SerialICE Build Error
by Joseph Smith 03 Oct '09

03 Oct '09

[root@smitty5m SerialICE-1.0]# make gcc -O2 -Wall -o romcc util/romcc.c util/romcc.c: In function ‘simplify_load’: util/romcc.c:9925: warning: dereferencing type-punned pointer will break strict-aliasing rules util/romcc.c:9926: warning: dereferencing type-punned pointer will break strict-aliasing rules util/romcc.c:9927: warning: dereferencing type-punned pointer will break strict-aliasing rules util/romcc.c: In function ‘get_const_pool_ref’: util/romcc.c:23846: warning: format ‘%ld’ expects type ‘long int’, but argument 3 has type ‘size_t’ util/romcc.c:23851: warning: format ‘%ld’ expects type ‘long int’, but argument 3 has type ‘size_t’ util/romcc.c: In function ‘print_sdecl’: util/romcc.c:24660: warning: format ‘%ld’ expects type ‘long int’, but argument 3 has type ‘size_t’ ./romcc -mcpu=i386 -I. -Imainboard -o serialice.S serialice.c i386-elf-as -o serialice.o serialice.S make: i386-elf-as: Command not found make: *** [serialice.o] Error 127 Any ideas? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

4 10

Re: [coreboot] [Qemu-devel] Release plan for 0.12.0
by Carl-Daniel Hailfinger 02 Oct '09

02 Oct '09

Hi Jordan, thanks for the detailed explanation. It certainly helped me understand some parts of the tianocore umbrealla better. On 02.10.2009 07:37, Jordan Justen wrote: > I work for Intel on the edk2.tianocore.org project. (Compared to the > original edk) edk2 may be of interest to those on this list since it > supports building on several OS's with several different toolchains. > In other words, it also supports building under Linux and OS X with > the GNU compiler and binutils. > Neat. I remember the toolchain issues Linux-based developers had in the past, so I think this is a good thing. > Within our edk2 tree, we have two projects that relate to QEMU. > > The DUET platform is a UEFI emulator that boots like a legacy OS on > top of a legacy BIOS. It contains various hardware initialization > drivers for several legacy hardware devices, but it also will call > into the legacy BIOS and make use of certain items from the legacy > BIOS. DUET can boot from the QEMU legacy BIOS, but it does require a > disk to be setup to have the DUET image on it. I am not sure if all > of DUET's code is currently safe for a UEFI OS to be able to access > UEFI runtime services. > By the way, SeaBIOS can boot virtual floppy images stored in the ROM (at least when SeaBIOS runs as coreboot payload), so if you can fit DUET into a floppy image (or if Kevin adds support for virtual harddisk images), you can have a coreboot+SeaBIOS+DUET ROM right now. > The OVMF platform is a project to build a (mostly) UEFI compatible > firmware for virtual machines. QEMU support is one of the main goals > for OVMF. The OVMF rom image completely replaces QEMU's standard > bios.bin, and therefore we must have hardware drivers for any hardware > within the QEMU VM that we want to make use of. The project also has > the goal to support UEFI OS's at runtime. > So OVMF is not just hardware init, but a complete package of hardware init and UEFI interface? Regards, Carl-Daniel

1 0

[Fwd: Re: [Qemu-devel] Release plan for 0.12.0]
by Carl-Daniel Hailfinger 02 Oct '09

02 Oct '09

Comments? Please try to add the original recipients to CC if you answer. -------- Original Message -------- Subject: Re: [Qemu-devel] Release plan for 0.12.0 Date: Fri, 02 Oct 2009 16:37:49 -0500 From: Anthony Liguori <aliguori(a)us.ibm.com> To: Jordan Justen <jljusten(a)gmail.com> CC: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>, qemu-devel(a)nongnu.org References: <4AC29E4D.80707(a)us.ibm.com> <D0452B81-706B-4154-92E1-6E253A305053(a)claunia.com> <4AC4A487.1050003(a)us.ibm.com> <2a50f7880910011410u6afbb658hf99839fdb3e7bab1(a)mail.gmail.com> <4AC51DBA.7020609(a)codemonkey.ws> <2a50f7880910011741k65ac8dfbq2fc8c9f58f5fa8d9(a)mail.gmail.com> <4AC60037.6000001(a)codemonkey.ws> <2a50f7880910020958g3fe5eadehe5e5094c05b218d9(a)mail.gmail.com> <4AC64A5C.6010003(a)gmx.net> <2a50f7880910021357i2b441f5flb98b1fa41c5f2150(a)mail.gmail.com> Jordan Justen wrote: > Carl-Daniel, > > Interesting. So, where can I download a QEMU bios rom to boot a UEFI > OS with this solution? > > Can you explain what coreboot+tianocore means? Which parts of > tianocore do you use in this situation? > > If your solution can accomplish all of what you say, I'm not sure how > OVMF would be able to compete against in terms of being included with > QEMU. Part of the reason for starting OVMF was to help enable UEFI > support within VM's such as QEMU. If OVMF was utilized by QEMU it > definitely would have been a bit of a boost for our efforts, but if > QEMU accomplishes UEFI support via another path, then overall we will > still be happy. > FWIW, I looked more closely at Coreboot + SeaBIOS today. It's much less functional than just SeaBIOS alone. There really is no additional functionality because all payloads that Coreboot can run already run directly under QEMU (or under SeaBIOS). With respect to Coreboot + SeaBIOS + UEFI, AFAIK, you cannot have multiple payloads without using essentially a payload switcher (like Bayou). The problem with this though is your just deferring the EFI/BIOS choice to the user in a different place. What we need is a mechanism to transparently choose UEFI or SeaBIOS depending on whether the guest is EFI aware. I think option roms further complicate the matter because we would need a gPXE EFI module to support network boot. That makes the switch logic even more complicated. For PCI passthrough, I assume that the legacy option ROMs have to be loaded through a CSM so if we want to enable PCI passthrough, we really need a proper CSM. -- Regards, Anthony Liguori -- http://www.hailfinger.org/

1 0

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coreboot October 2009