coreboot January 2009

coreboot@coreboot.org

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320 discussions

r3893 - trunk/util/flashrom
by svn＠coreboot.org 25 Jan '09

25 Jan '09

Author: stuge Date: 2009-01-25 00:01:08 +0100 (Sun, 25 Jan 2009) New Revision: 3893 Modified: trunk/util/flashrom/flashchips.c Log: flashrom: ST M50FW080 TEST_OK_ PROBE READ ERASE WRITE Report by Jody McIntyre. Thanks! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2009-01-24 01:32:40 UTC (rev 3892) +++ trunk/util/flashrom/flashchips.c 2009-01-24 23:01:08 UTC (rev 3893) @@ -1755,7 +1755,7 @@ .model_id = ST_M50FW080, .total_size = 1024, .page_size = 64 * 1024, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab,

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dbm690t PIRQ table
by Dan Lykowski 24 Jan '09

24 Jan '09

Has anyone tested the PIRQ table generated by the dbm690t code? With a really trimmed down kernel, no ACPI and IO_APIC disabled the kernel goes looking for the PIRQ table. It finds one, but something isn't right the interrupts don't get routed. ( I really LOVE how there are three different ways to get the same information. ) Comparing the generated PIRQ to one pulled from my BIOS, they are nowhere near similar. I've tried replacing the dbm690t PIRQ table generator with a table from my BIOS, but it tells me the CRC is wrong. Something smells a little fishy. The mptables are very similar as expected. By telling the kernel to use the advanced IO_APIC, I can finally boot to a prompt. Next issue to resolve... X11 with fglrx... Is this the right list to post FILO patches? I've attached my PIRQ and MPtables for your reading enjoyment. Dan Lykowski

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How can I help?
by Glenn Kerbein 24 Jan '09

24 Jan '09

Hello everyone, I first stumbled upon this great project a few months back, and was really intrigued by it. At the time, I wasn't compelled to subscribe to the mailing list. After seeing Peter Stuge's adress at the 25th Chaos Communications Camp, I looked up my hardware, and how I can help the project. Currently, however, I'm having some issues with my hardware. On my local fileserver here, I have an AMD system that uses this board: http://www.msicomputer.com/product/p_spec.asp?model=K9N4_Ultra-F&class=mb , and is not supported currently by coreboot. Is there some way I can provide feedback on how to give you hardware specs, etc? I also happen to have this machine as my main desktop: http://asus.com/products.aspx?l1=1&l2=3&l3=483&l4=0&model=1523&modelmenu=1 . (Specifications are here: http://asus.com/products.aspx?l1=1&l2=3&l3=483&l4=0&model=1523&modelmenu=2 ). The hardware is not supported (since it's an ICH7). Can I help you all out with this setup at all? Thanks, and take care.

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Re: [coreboot] coreboot Digest, Vol 47, Issue 96
by Baski 24 Jan '09

24 Jan '09

4. Re: FILO (IDE) problems with ubuntu 8.10 (Peter Stuge) Date: Fri, 23 Jan 2009 00:24:44 +0100 From: Peter Stuge <peter(a)stuge.se> Subject: Re: [coreboot] FILO (IDE) problems with ubuntu 8.10 To: coreboot(a)coreboot.org Message-ID: <20090122232444.24504.qmail(a)stuge.se> Content-Type: text/plain; charset=utf-8 Baski wrote: > ??? ? kernel? /boot/vmlinuz-2.6.27-9-generic root=UUID=f2fb5830-a8c9-4c22-aa22-2762fcfa0ad9 ro console=ttyS0,115200n8 console=tty0 Please change this line in menu.lst to include hda1: before /boot: kernel hda1:/boot/vmlinuz-2.6.27-9-generic root=UUID=f2fb5830-a8c9-4c22-aa22-2762fcfa0ad9 ro console=ttyS0,115200n8 console=tty0 > ??? ? dev=(NULL), path=/boot/vmlinuz-2.6.27-9-generic As it stands, FILO does not know which device the kernel is on. FILO finds menu.lst because the path (and device) for that file was compiled in and still remains in your boot flash. //Peter Thank you for the help. -Baski

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r3892 - trunk/util/flashrom
by svn＠coreboot.org 24 Jan '09

24 Jan '09

Author: stuge Date: 2009-01-24 02:32:40 +0100 (Sat, 24 Jan 2009) New Revision: 3892 Modified: trunk/util/flashrom/flashchips.c Log: flashrom: SST25VF080B TEST_OK_PROBE Report by Scaldov M.V. Thanks! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2009-01-23 22:16:13 UTC (rev 3891) +++ trunk/util/flashrom/flashchips.c 2009-01-24 01:32:40 UTC (rev 3892) @@ -1107,7 +1107,7 @@ .model_id = SST_25VF080B, .total_size = 1024, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .erase = spi_chip_erase_60_c7, .write = spi_chip_write,

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PIRQ Table 690/600
by Dan Lykowski 24 Jan '09

24 Jan '09

I am having troubles getting things to post. Sorry if this is a dup AGAIN! Has anyone tested the PIRQ table generator for the dbm690t? I was running a minimal kernel ACPI off and IO_APIC off, and my interrupts were not being assigned. The kernel found the PIRQ table, but that is all it did. The PIRQ table being generated by the dbm690t, seems pretty simplistic compared to the table I pulled from my BIOS. The one I pulled from my BIOS is reported as having a CRC error when I try to use it. Something seems fishy. The mpTable looks very similar to the one I pulled from my BIOS as I expected it would. When my kernel is configured to use the mpTable, I am able to get to a prompt. Interrupts are assigned WAY different when I use the mptable generated from my BIOS, but they still work. I can find no relation between the table and what interrupt is actually assigned. ACPI seems to assign incorrect interrupts at random. Is it possible to dump an ACPI table and reuse it? I am able to boot all 3 ways with the original BIOS. I have attached the mptable.c and irq_tables.c from the SOM-5781 690/600 board I have been working on. Thanks Dan Lykowski

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PIRQ table 690/600
by Dan Lykowski 24 Jan '09

24 Jan '09

I sent this earlier, but for some reason it hasn't posted.. So sorry if its a dup. Has anyone tested the PIRQ table generator for the dbm690t? I was running a minimal kernel ACPI off and IO_APIC off, and my interrupts were not being assigned. The kernel found the PIRQ table, but that is all it did. The PIRQ table being generated by the dbm690t, seems pretty simplistic compared to the table I pulled from my BIOS. The one I pulled from my BIOS is reported as having a CRC error when I try to use it. Something seems fishy. The mpTable looks very similar to the one I pulled from my BIOS as I expected it would. When my kernel is configured to use the mpTable, I am able to get to a prompt. Interrupts are assigned WAY different when I use the mptable generated from my BIOS, but they still work. I can find no relation between the table and what interrupt is actually assigned. ACPI seems to assign incorrect interrupts at random. Is it possible to dump an ACPI table and reuse it? I am able to boot all 3 ways with the original BIOS. I have attached the mptable.c and irq_tables.c from the SOM-5781 690/600 board I have been working on. Thanks Dan Lykowski

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r1123 - coreboot-v3/southbridge/amd/rs690
by svn＠coreboot.org 23 Jan '09

23 Jan '09

Author: mjones Date: 2009-01-23 23:18:24 +0100 (Fri, 23 Jan 2009) New Revision: 1123 Modified: coreboot-v3/southbridge/amd/rs690/pcie.c Log: Fix rs690 bug about GPPSB configuration. Signed-off-by: Maggie Li <maggie.li(a)amd.com> Reviewed-by: Zheng Bao <Zheng.bao(a)amd.com> Acked-by: Marc Jones <marcj303(a)gmail.com> Modified: coreboot-v3/southbridge/amd/rs690/pcie.c =================================================================== --- coreboot-v3/southbridge/amd/rs690/pcie.c 2009-01-23 10:53:55 UTC (rev 1122) +++ coreboot-v3/southbridge/amd/rs690/pcie.c 2009-01-23 22:18:24 UTC (rev 1123) @@ -135,8 +135,8 @@ /* sets desired GPPSB configurations, bit4-7 */ reg = nbmisc_read_index(nb_dev, 0x67); - reg &= 0xff0f; /* clean */ - reg |= cfg->gpp_configuration; + reg &= 0xffffff0f; /* clean */ + reg |= cfg->gpp_configuration << 4; nbmisc_write_index(nb_dev, 0x67, reg); /* read bit14 and write back its inverst value */

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r3891 - trunk/coreboot-v2/src/southbridge/amd/rs690
by svn＠coreboot.org 23 Jan '09

23 Jan '09

Author: mjones Date: 2009-01-23 23:16:13 +0100 (Fri, 23 Jan 2009) New Revision: 3891 Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c Log: Fix rs690 bug about GPPSB configuration. Signed-off-by: Maggie Li <maggie.li(a)amd.com> Reviewed-by: Zheng Bao <Zheng.bao(a)amd.com> Acked-by: Marc Jones <marcj303(a)gmail.com> Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c 2009-01-23 05:23:06 UTC (rev 3890) +++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c 2009-01-23 22:16:13 UTC (rev 3891) @@ -133,8 +133,8 @@ /* sets desired GPPSB configurations, bit4-7 */ reg = nbmisc_read_index(nb_dev, 0x67); - reg &= 0xff0f; /* clean */ - reg |= cfg->gpp_configuration; + reg &= 0xffffff0f; /* clean */ + reg |= cfg->gpp_configuration << 4; nbmisc_write_index(nb_dev, 0x67, reg); /* read bit14 and write back its inverst value */

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r258 - buildrom-devel/packages/filo
by svn＠coreboot.org 23 Jan '09

23 Jan '09

Author: ward Date: 2009-01-23 21:25:27 +0100 (Fri, 23 Jan 2009) New Revision: 258 Modified: buildrom-devel/packages/filo/filo.mk Log: Bump up filo to the latest rev (85). This is a trivial patch. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: buildrom-devel/packages/filo/filo.mk =================================================================== --- buildrom-devel/packages/filo/filo.mk 2009-01-23 20:20:49 UTC (rev 257) +++ buildrom-devel/packages/filo/filo.mk 2009-01-23 20:25:27 UTC (rev 258) @@ -1,5 +1,5 @@ FILO_URL=svn://coreboot.org/filo/trunk/filo -FILO_TAG=81 +FILO_TAG=85 FILO_DIR=$(BUILD_DIR)/filo FILO_SRC_DIR=$(FILO_DIR)/svn

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coreboot January 2009