April 2008 - coreboot - mail.coreboot.org

Re: [coreboot] pci device memory allocation problem
by joe＠settoplinux.org April 24, 2008

April 24, 2008

>Doing it this way is better: first assign align value to be at least >of min_align then compare align with bridge->align to see if >bridge->align needs updated. >... ... > while((dev = largest_resource(bus, &resource, type_mask, type))) { > resource_t size; > /* Do NOT I repeat do not ignore resources which have zero size. > * If they need to be ignored dev->read_resources should not even > * return them. Some resources must be set even when they have > * no size. PCI bridge resources are a good example of this. > */ > /* Make certain we are dealing with a good minimum size */ > size = resource->size; > align = resource->align; > if (align < min_align) { > align = min_align; > } > > /* Propogate the resource alignment to the bridge register */ > if (align > bridge->align) { > bridge->align = align; > } > > > if (resource->flags & IORESOURCE_FIXED) { > continue; > } >... ... > I noticed this problem, if certian devices are disabled (like onboard vga for example). The other enabled devices try to use 0xfec00000 for memory allocation, causing APIC to fail. I think the above code looks good :-) Have you done up a patch? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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r3259 build service
by coreboot information April 24, 2008

April 24, 2008

Dear coreboot readers! This is the automated build check service of coreboot. The developer "hailfinger" checked in revision 3259 to the coreboot source repository and caused the following changes: Change Log: Same old story: Fam10 needs more space again. My calculations say it needs 172 more bytes, give it 512 and hope that's enough for a while. Trivial. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Build Log: Compilation of amd:serengeti_cheetah_fam10 has been fixed If something broke during this checkin please be a pain in hailfinger's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[patch][v2] Fam10 GART table walk
by Marc Jones April 23, 2008

April 23, 2008

-- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Enables MCA reportingof GART cache table walks which encounter a GART PTE entry which is invalid. Useful for GART debugging and profiling. Make AMD BTS register checking tool happy. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: coreboot-v2/src/cpu/amd/model_10xxx/defaults.h =================================================================== --- coreboot-v2.orig/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:08:42.000000000 -0600 +++ coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:10:19.000000000 -0600 @@ -46,6 +46,10 @@ 0xF << 19, 0x00000000, 0xF << 19, 0x00000000 }, /* [RtryHt[0..3]]=1 */ + { MC4_CTL_MASK, AMD_DR_ALL, AMD_PTYPE_ALL, + 0x1 << 10, 0x00000000, + 0x1 << 10, 0x00000000 }, /* [GartTblWkEn]=1 */ + { DC_CFG, AMD_DR_ALL, AMD_PTYPE_SVR, 0x00000000, 0x00000004, 0x00000000, 0x0000000C }, /* [REQ_CTR] = 1 for Server */

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r3258 build service
by coreboot information April 23, 2008

April 23, 2008

Dear coreboot readers! This is the automated build check service of coreboot. The developer "myles" checked in revision 3258 to the coreboot source repository and caused the following changes: Change Log: Trivial payload location changes for buildrom. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3258&device=serengeti_chee… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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r3259 - trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10
by svn＠coreboot.org April 23, 2008

April 23, 2008

Author: hailfinger Date: 2008-04-24 00:54:40 +0200 (Thu, 24 Apr 2008) New Revision: 3259 Modified: trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb Log: Same old story: Fam10 needs more space again. My calculations say it needs 172 more bytes, give it 512 and hope that's enough for a while. Trivial. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb 2008-04-23 22:01:55 UTC (rev 3258) +++ trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb 2008-04-23 22:54:40 UTC (rev 3259) @@ -13,7 +13,7 @@ romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x22000 + option ROM_IMAGE_SIZE=0x22200 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end

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r3257 build service
by coreboot information April 23, 2008

April 23, 2008

Dear coreboot readers! This is the automated build check service of coreboot. The developer "myles" checked in revision 3257 to the coreboot source repository and caused the following changes: Change Log: These config files are so that buildrom can use these two boards. Myles Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Ward Vandewege <ward(a)gnu.org> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3257&device=serengeti_chee… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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r3258 - in trunk/coreboot-v2/targets/tyan: s2892 s2895
by svn＠coreboot.org April 23, 2008

April 23, 2008

Author: myles Date: 2008-04-24 00:01:55 +0200 (Thu, 24 Apr 2008) New Revision: 3258 Modified: trunk/coreboot-v2/targets/tyan/s2892/Config.lb trunk/coreboot-v2/targets/tyan/s2895/Config.lb Log: Trivial payload location changes for buildrom. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/targets/tyan/s2892/Config.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2892/Config.lb 2008-04-23 21:06:08 UTC (rev 3257) +++ trunk/coreboot-v2/targets/tyan/s2892/Config.lb 2008-04-23 22:01:55 UTC (rev 3258) @@ -7,8 +7,8 @@ # Tyan s2892 romimage "normal" -# 48K for ATI ROM in 1M - option ROM_SIZE = 1024*1024-48*1024 +# 36K for ATI ROM in 1M + option ROM_SIZE = 1024*1024-36*1024 # 48K for SCSI FW or ATI ROM # option ROM_SIZE = 512*1024-48*1024 # 48K for SCSI FW and 48K for ATI ROM @@ -29,11 +29,12 @@ # payload ../../../payloads/filo.zelf # payload ../../../payloads/tg3.zelf # payload ../../../payloads/tg3_vga.zelf - payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf # payload ../../../payloads/tg3--filo_hda2_com2.zelf # payload ../../../payloads/e1000--filo.zelf # payload ../../../payloads/tg3--e1000--filo.zelf # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf + payload ../payload.elf end romimage "fallback" @@ -51,11 +52,12 @@ # payload ../../../payloads/filo.zelf # payload ../../../payloads/tg3.zelf # payload ../../../payloads/tg3_vga.zelf - payload ../../../../payloads/tg3--filo_hda2_vga.zelf +# payload ../../../../payloads/tg3--filo_hda2_vga.zelf # payload ../../../payloads/tg3--filo_hda2_com2.zelf # payload ../../../payloads/e1000--filo.zelf # payload ../../../payloads/tg3--e1000--filo.zelf # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf + payload ../payload.elf end buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Modified: trunk/coreboot-v2/targets/tyan/s2895/Config.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2895/Config.lb 2008-04-23 21:06:08 UTC (rev 3257) +++ trunk/coreboot-v2/targets/tyan/s2895/Config.lb 2008-04-23 22:01:55 UTC (rev 3258) @@ -30,7 +30,7 @@ # payload ../../../payloads/filo.zelf # payload ../../../payloads/tg3.zelf # payload ../../../payloads/tg3--filo_hda2_vga.zelf - payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf # payload ../../../payloads/forcedeth_vga.zelf # payload ../../../payloads/forcedeth--filo_hda2_vga_5_4.zelf # payload ../../../../../../elf/ram0_2.5_2.6.11.tiny.elf @@ -42,6 +42,7 @@ # payload ../../../payloads/e1000--filo.zelf # payload ../../../payloads/tg3--e1000--filo.zelf # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf + payload ../payload.elf end romimage "fallback" @@ -60,7 +61,7 @@ # payload ../../../payloads/filo.zelf # payload ../../../payloads/tg3.zelf # payload ../../../payloads/tg3--filo_hda2_vga.zelf - payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf +# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf # payload ../../../payloads/forcedeth_vga.zelf # payload ../../../payloads/tg3--filo_hda2_vga_5_4.zelf # payload ../../../payloads/tg3_vga.zelf @@ -69,6 +70,7 @@ # payload ../../../payloads/e1000--filo.zelf # payload ../../../payloads/tg3--e1000--filo.zelf # payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf + payload ../payload.elf end romimage "failover"

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r3256 build service
by coreboot information April 23, 2008

April 23, 2008

Dear coreboot readers! This is the automated build check service of coreboot. The developer "ward" checked in revision 3256 to the coreboot source repository and caused the following changes: Change Log: This is the sata irq patch for s2895 and ultra40. It also changes some broken white space in the s2892 and s2891 mptable.c files. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Ward Vandewege <ward(a)gnu.org> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3256&device=serengeti_chee… If something broke during this checkin please be a pain in ward's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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The discussion of PCI memory IO
by Feng, Libo April 23, 2008

April 23, 2008

Hi, all, I remember there is a discussion about how to allocate the PCI memory IO on a system with a 4G physical memory. I can't find it, Who could please send me the link. Thank you. Best Regards 丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406

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s2892 and s2895 Config-lab.lb as a precursor to buildrom support
by Myles Watson April 23, 2008

April 23, 2008

These config files are so that buildrom can use these two boards. Myles Signed-off-by: Myles Watson <mylesgw(a)gmail.com>

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