coreboot September 2007

coreboot@coreboot.org

81 participants
367 discussions

[LinuxBIOS] flashrom erase failed
by Lane Brooks 01 Oct '07

01 Oct '07

I am trying to flash an SST49LF008A on a board with a Geode CS5536AD southbridge using flashrom. It reads fine, but when I try to write, it failed with an ERASE FAILED message. Any ideas on why? Thanks, Lane Brooks

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[LinuxBIOS] [v2][PATCH] PCI PERR# and SERR#
by Marc Jones 01 Oct '07

01 Oct '07

I found this problem on the AMD Geode db800 platform but it probably affects other platforms and chipsets. LinuxBIOS sets every PCI device PERR# enable and SERR# enable in the PCI Command Register. This is probably not the right thing to do for a number of reasons. The PCI spec is not clear on what should be done with a PERR# it is a device, chipset and platform design desicsion and we don't know what the platform or device will do. For example, PERR# can be connected to SERR# which can be connected to reset. Instead of just getting a parity error you have now reset the system, oops. Also, PERR# is required to be reported to system software. This has to be done through the driver via an interrupt (or through polling, ewwww). As you can see, a lot of pieces need to be in place, the device has to do the interrupt, the driver should do something with the PERR#, and then? I don't know if the kernel does anything with the PERR# message. LinuxBIOS is no longer in play so it can't do anything with the errors. Because of the uncertainty of PERR# and SERR# I don't think that many manufacturers use it, especially in the consumer space. They may still detect and fix parity errors at the hardware level or in their driver, just not use the PERR# and SERR signals. Note that is a device does have a parity error it will still report it in As I noted above, the SERR# can cause a system reset. I think that it would be better to do nothing and maybe the device will stop/hang/etc rather than to mysteriously reset. Again, let the system software decide policy. All this seems like a good reason to let the driver and/or system level software enable PERR# and SERR# and for LinuxBIOS to leave them alone. Dissenting opinions welcome. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Don't arbitrarily enable PERR# and SERR# for PCI devices. It is platform specific. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: LinuxBIOSv2/src/devices/pci_device.c =================================================================== --- LinuxBIOSv2.orig/src/devices/pci_device.c 2007-09-25 11:20:10.000000000 -0600 +++ LinuxBIOSv2/src/devices/pci_device.c 2007-09-25 11:20:41.000000000 -0600 @@ -603,7 +603,6 @@ } command = pci_read_config16(dev, PCI_COMMAND); command |= dev->command; - command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); /* error check */ printk_debug("%s cmd <- %02x\n", dev_path(dev), command); pci_write_config16(dev, PCI_COMMAND, command); }

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[LinuxBIOS] EHCI stack to port to FILO?
by Corey Osgood 01 Oct '07

01 Oct '07

Anyone know of a decent/simple EHCI stack to port to FILO? I'm working from the 2.6 kernel driver at the moment, but I'm wondering if anyone knows of anything else, there are way more features in here then we need. And can anyone, perhaps with an EPIA or EPIA-M, confirm that UHCI is working in FILO? I've tried disabling the EHCI device, but it still fails on vt8237. Thanks, Corey

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[LinuxBIOS] RTL8139.zelf
by Markus 30 Sep '07

30 Sep '07

Hi Volks, is somebody able to create an RTL8139.zelf oder elf image? I tried the etherboot 5.4.2 and 5.4.3 also the shnapshot. One thing was the realmode.h this I changed. Without succes. The only positiv thing: The Supertek ST-3WT mainboard works with the source from the eaglelion 5BCM. It boots to the payload. My target has no disk so i use pxe normaly. So i need help to create a image for the Realtec nic. Greeding Markus

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[LinuxBIOS] [PATCH] Fix the AMD K8 DDR init
by Rudolf Marek 30 Sep '07

30 Sep '07

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, This patch changes the "if else" style of parameter matching to table and also changes the rdpreamble parameter, which will cause that more then one DIMM will work for 939 motherboard. What about the 2T support? Please take a look to a patch and will prepare some more final version. Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFG/Zf03J9wPJqZRNURAseZAKCFPLMnxGmaxOg9R+Ba/1scovQ27QCgjGif eO58z0iG+fB76Qpzwb+D/D8= =IEKO -----END PGP SIGNATURE-----

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[LinuxBIOS] [PATCH] K8T890/VT8237 /a8v-se preview
by Rudolf Marek 30 Sep '07

30 Sep '07

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello all, I'm attaching quite big patch which adds support for the K8T890/VT8237R chipset and for my motherboard Asus A8V-E SE. It works fine except for reboot, I'm using it daily ;) Now I need help with the release. I have done some modifications to raminit.c for K8, fixing unbuffered mem stuff, adding some tables instead of ifs... I added support for MCFG ACPI table (mmconfig for PCIe) but I need to somehow figure out how to tell FILO/LXBtables to reserve some mem region. I will put this into separate patches. What I need now is to discuss technical aspects of patches rather than codingstyle etc etc. I will prepare some more tidy patches later, but I really want to show something now ;) The patch is on http://assembler.cz/download/preview.patch I dont know if I can pass 150KB to the list and also Wifi sucks. It is 2am in morning so please forgive some errors and omissions in this mail. Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFG/ZWW3J9wPJqZRNURAo4WAJ0XR4sz81kzRk1wWMechwfzLiB4swCfeKKV lGfQrL6KWyuHZaeSjULc438= =CBIn -----END PGP SIGNATURE-----

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[LinuxBIOS] [PATCH] LAR compression in xip not supported
by Alex Beregszaszi 29 Sep '07

29 Sep '07

Hi, attached patch returns if someone tries to execute in place a compressed entry. -- Alex

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[LinuxBIOS] Naming policy (was: Re: r2814 - trunk/util/superiotool)
by Carl-Daniel Hailfinger 29 Sep '07

29 Sep '07

On 28.09.2007 17:45, svn(a)openbios.org wrote: > Author: uwe > Date: 2007-09-28 17:45:43 +0200 (Fri, 28 Sep 2007) > New Revision: 2814 > > Log: > Random minor fixes. Use svn revision as superiotool version number. > Make the -V output more informative. > > Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> > Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> > > > > Modified: trunk/util/superiotool/Makefile > =================================================================== > --- trunk/util/superiotool/Makefile 2007-09-28 15:39:10 UTC (rev 2813) > +++ trunk/util/superiotool/Makefile 2007-09-28 15:45:43 UTC (rev 2814) > @@ -1,5 +1,5 @@ > ## > -## This file is part of the LinuxBIOS project. > +## This file is part of the superiotool project. > ## > ## Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> > ## > Please ask before such changes. OTOH, if you insist that every sub-project of LinuxBIOS is a project in itself, we should also have the "GA-M57SLI porting project" etc. Oh, and headlines like "LinuxBIOS is running Windows XP" would have to be changed to "ADLO is running Windows XP". We have established the LinuxBIOS brand with a lot of work. Calling every single one of our subprojects by its own name is not going to help our public image at all. This situation is similar to the GNU/Linux debate and I don't want LinuxBIOS to be in the GNU "nobody mentions us" situation. Carl-Daniel

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[LinuxBIOS] Asus P5E3 Deluxe
by Simon Kellett 29 Sep '07

29 Sep '07

I just read this news item about this new board from Asus: Asus P5E3 Deluxe. http://www.pclaunches.com/motherboard/asus_p5e3_deluxewifiapn_motherboard.p… "It's Express Gate (based on Linux) is another interesting feature that allows you to surf internet without booting Windows in under 5 seconds." Does anyone know more about this ? Is it using LinuxBIOS ? I assume that they will have to release the code for it, so could it then be merged into LinuxBIOS ? My first thought was this would be a great LinuxBIOS board, although it does look a bit high end ? -- Simon Kellett, Darmstadt, Germany | http://www.zoxed.eu Gentoo Linux, Fvwm, Firefox | Xemacs, vm, Gnus

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[LinuxBIOS] [PATCH] Add MCFG table for ACPI
by Rudolf Marek 29 Sep '07

29 Sep '07

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, Following patch adds MCFG table for ACPI, so linux can find MMCONFIG area for PCI configuration access. Please note that you need to hack Linux kernel and remove the check for e820 not reserved complain. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFG/Za43J9wPJqZRNURAmibAKCLqEzJTAT3X332dzvLUFr9fQK7lQCglxLC zQvvXvQNuY/NACGvuJozLi8= =iSRu -----END PGP SIGNATURE-----

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coreboot September 2007