I started a thread (well, its me talking to myself) "read the spd on
A7V133" on lm-sensors list. My conclusions:
E:\dane\Testery !\sandra>SPDINFO.EXE 1 a7v
Ctrl 0, SMBus, Sys, IO 0000e800h, Mem 00000000h, Drv Intel PIIX4 SMBus
/ compatible, Brd A7V
Mux 0 Asus IO mux, IO 0000e44dh, Ext 4267320
rasz@capek:~$ cat /proc/ioports|grep e4
e400-e47f : motherboard
e400-e403 : ACPI PM1a_EVT_BLK
e404-e405 : ACPI PM1a_CNT_BLK
e408-e40b : ACPI PM_TMR
e410-e415 : ACPI CPU throttle
e420-e423 : ACPI GPE0_BLK
I decompiled ACPI DSDT from my bios and found this :
OperationRegion (\SGPO, SystemIO, 0xE44C, 0x04)
Field (SGPO, ByteAcc, NoLock, Preserve)
{
GPO0, 1,
Offset (0x01),
GPO8, 1,
, 2,
GP11, 1,
Offset (0x04)
}
so
1 Linux ACPI - Bios ACPI mismatch, 0xE44C is not claimed and not
mapped properly
2 mux GPIO is mapped to 0xE44C-0xE44F.
We can reverse it by trial and error (or by talking to sandra/everest
developers, Im trying it now), or just use SPDINFO.EXE (its a part of
SiSoftware Sandra package) on board to board basis comparing data and
obtaining the right bit mask to switch smbus to SPD channel.
Im posting this because I saw some movement on VT82C686 front, and
this info will be needed to port to Asus boards (K7 ones hide SPD and
Clock chip).
--
Who logs in to gdm? Not I, said the duck.