coreboot December 2007

coreboot@coreboot.org

78 participants
271 discussions

[LinuxBIOS] [PATCH] flashrom: add support for ST M25P80 chips
by Carl-Daniel Hailfinger 16 Dec '07

16 Dec '07

Add support for ST M25P80 chips to flashrom. Untested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-m25p80/flash.h =================================================================== --- flashrom-m25p80/flash.h (Revision 3007) +++ flashrom-m25p80/flash.h (Arbeitskopie) @@ -167,7 +167,12 @@ #define SST_49LF016C 0x5C #define SST_49LF160C 0x4C +/* + * ST25P chips are SPI, first byte of device ID is memory type, second + * byte of device ID is related to log(bitsize) at least for some chips. + */ #define ST_ID 0x20 /* ST */ +#define ST_M25P80 0x2014 #define ST_M50FLW040A 0x08 #define ST_M50FLW040B 0x28 #define ST_M50FLW080A 0x80 Index: flashrom-m25p80/flashchips.c =================================================================== --- flashrom-m25p80/flashchips.c (Revision 3007) +++ flashrom-m25p80/flashchips.c (Arbeitskopie) @@ -140,6 +140,8 @@ probe_jedec, erase_chip_jedec, write_jedec}, {"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024, probe_29f040b, erase_29f040b, write_29f040b}, + {"M25P80", ST_ID, ST_M25P80, 1024, 64 * 1024, + probe_spi, generic_spi_chip_erase, generic_spi_chip_write}, {"82802ab", 137, 173, 512, 64 * 1024, probe_82802ab, erase_82802ab, write_82802ab}, {"82802ac", 137, 172, 1024, 64 * 1024,

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[LinuxBIOS] r3008 - trunk/util/flashrom
by svn＠openbios.org 16 Dec '07

16 Dec '07

Author: hailfinger Date: 2007-12-16 22:15:27 +0100 (Sun, 16 Dec 2007) New Revision: 3008 Modified: trunk/util/flashrom/flash.h trunk/util/flashrom/flashchips.c trunk/util/flashrom/spi.c Log: Add support for ST M25P80 chips to flashrom. Detection was tested. Print status register before erase to help debugging block locks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2007-12-14 20:00:58 UTC (rev 3007) +++ trunk/util/flashrom/flash.h 2007-12-16 21:15:27 UTC (rev 3008) @@ -167,7 +167,12 @@ #define SST_49LF016C 0x5C #define SST_49LF160C 0x4C +/* + * ST25P chips are SPI, first byte of device ID is memory type, second + * byte of device ID is related to log(bitsize) at least for some chips. + */ #define ST_ID 0x20 /* ST */ +#define ST_M25P80 0x2014 #define ST_M50FLW040A 0x08 #define ST_M50FLW040B 0x28 #define ST_M50FLW080A 0x80 Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2007-12-14 20:00:58 UTC (rev 3007) +++ trunk/util/flashrom/flashchips.c 2007-12-16 21:15:27 UTC (rev 3008) @@ -140,6 +140,8 @@ probe_jedec, erase_chip_jedec, write_jedec}, {"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024, probe_29f040b, erase_29f040b, write_29f040b}, + {"M25P80", ST_ID, ST_M25P80, 1024, 64 * 1024, + probe_spi, generic_spi_chip_erase, generic_spi_chip_write}, {"82802ab", 137, 173, 512, 64 * 1024, probe_82802ab, erase_82802ab, write_82802ab}, {"82802ac", 137, 172, 1024, 64 * 1024, Modified: trunk/util/flashrom/spi.c =================================================================== --- trunk/util/flashrom/spi.c 2007-12-14 20:00:58 UTC (rev 3007) +++ trunk/util/flashrom/spi.c 2007-12-16 21:15:27 UTC (rev 3008) @@ -280,7 +280,11 @@ int generic_spi_chip_erase(struct flashchip *flash) { const unsigned char cmd[] = JEDEC_CE_2; + uint8_t statusreg; + statusreg = generic_spi_read_status_register(); + printf("chip status register before erase is %02x\n", statusreg); + generic_spi_write_enable(); /* Send CE (Chip Erase) */ generic_spi_command(JEDEC_CE_2_OUTSIZE, JEDEC_CE_2_INSIZE, cmd, NULL);

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[LinuxBIOS] AMD Geode LX on Lippert Roadrunner LX800
by Simpson, Matthew 16 Dec '07

16 Dec '07

Hello, Is this supported? What target do I choose? Here is the info about this board, used for embedded systems: Board: Lippert Roadrunner LX800 Processor: AMD Geode LX800 Chipset: AMD CS5536 I/O Companion Super I/O ITE 8712 (documentation says this but the chip says ITE IT8888G if I looked at the right chip) BIOS chip: SST 49LF004B (Bios Savior supports this) Output of lspci: 00:01.0 Host bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge (rev 30) 00:01.1 VGA compatible controller: Advanced Micro Devices [AMD] Geode LX Video 00:01.2 Entertainment encryption device: Advanced Micro Devices [AMD] Geode LX AES Security Block 00:0c.0 Bridge: Integrated Technology Express, Inc. IT8888F PCI to ISA Bridge with SMB (rev 03) 00:0e.0 Ethernet controller: Intel Corporation 8255xER/82551IT Fast Ethernet Controller (rev 10) 00:0f.0 ISA bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA (rev 03) 00:0f.2 IDE interface: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE (rev 01) 00:0f.3 Multimedia audio controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] Audio (rev 01) 00:0f.4 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC (rev 02) 00:0f.5 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC (rev 02) 00:10.0 Class ff00: Advanced Micro Devices [AMD] Unknown device 2098 (rev 02) 00:10.1 Signal processing controller: Advanced Micro Devices [AMD] Unknown device 209b (rev 02) The data sheet and technical manual can be found at: http://www.lippert-at.com/ Scroll down to the Cool Roadrunner-LX800 Thank You! Matt

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[LinuxBIOS] Abit BE6-II V2.0
by Sergei Antonov 15 Dec '07

15 Dec '07

Hi! I'd like to try LinuxBIOS on a 440BX-based Abit BE6-II V2.0. After talking on IRC, I'm sending the output of 'lspci -tvnn' and 'superiotool -dV' and a generated irq_tabl.c. 'lspci -tvnn' output: -[0000:00]-+-00.0 Unknown device [8086:7190] +-01.0-[0000:01]----00.0 Unknown device [10de:0110] +-07.0 Unknown device [8086:7110] +-07.1 Unknown device [8086:7111] +-07.2 Unknown device [8086:7112] +-07.3 Unknown device [8086:7113] +-0f.0 Unknown device [11ab:4320] \-13.0 Unknown device [1103:0004] 'superiotool -dV' output: superiotool r Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Found Winbond W83627HF/F/HG/G (id=0x52, rev=0xf4) at 0x3f0 Register dump: idx 02 07 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f val ff 0b 52 f4 ff fe 80 00 00 00 ff 00 00 00 00 ff def 00 NA 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0c 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 00 def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 00 40 def 01 00 60 00 64 01 0c 80 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, MIDI port, GPIO 1) idx 30 60 61 62 63 70 f0 f1 f2 val 01 00 00 00 00 00 ff 00 ff def 00 02 01 03 30 09 ff 00 00 LDN 0x08 (GPIO 2, Watchdog timer) idx 30 f0 f1 f2 f3 f5 f6 f6 f7 val 01 00 ff 00 00 ff ff ff ff def 00 ff 00 00 00 00 00 00 00 LDN 0x09 (GPIO 3) idx 30 f0 f1 f2 f3 val 00 ff ff ff ff def 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 00 00 08 00 00 00 00 00 00 8f 37 00 00 00 00 00 00 def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 val 01 ff ff ff ff def 00 00 00 00 00 Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff

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Re: [LinuxBIOS] [PATCH] AMD Barcelona(family 10) support 1 of 4 repost
by Marc Jones 14 Dec '07

14 Dec '07

Steve Isaacs wrote: > Here's something I hit when attempting to compile (this is gcc 3.4.6). > > from > /home/isaacs/localprojects/barcelona/LinuxBIOSv2-working-20071213/src/ma > inboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c:142: > /home/isaacs/localprojects/barcelona/LinuxBIOSv2-working-20071213/src/cp > u/amd/model_10xxx/fidvid_common.c: At top level: > /home/isaacs/localprojects/barcelona/LinuxBIOSv2-working-20071213/src/cp > u/amd/model_10xxx/fidvid_common.c:82: error: conflicting types for > 'udelay' > /home/isaacs/localprojects/barcelona/LinuxBIOSv2-working-20071213/src/no > rthbridge/amd/amdfam10/raminit_sysinfo_in_ram.c:45: error: previous > implicit declaration of 'udelay' was here > fixed raminit_sysinfo_in_ram.c. Changed the call to udelay_tsc(). Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors

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[LinuxBIOS] r3007 - trunk/util/superiotool
by svn＠openbios.org 14 Dec '07

14 Dec '07

Author: cozzie Date: 2007-12-14 21:00:58 +0100 (Fri, 14 Dec 2007) New Revision: 3007 Modified: trunk/util/superiotool/smsc.c Log: Add dump support for SMSC LPC47M192. Signed-off-by: Ulf Jordan <jordan(a)chalmers.se> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/util/superiotool/smsc.c =================================================================== --- trunk/util/superiotool/smsc.c 2007-12-14 00:04:16 UTC (rev 3006) +++ trunk/util/superiotool/smsc.c 2007-12-14 20:00:58 UTC (rev 3007) @@ -319,6 +319,37 @@ {0x5f, "LPC47M14x", { {EOT}}}, {0x60, "LPC47M15x/192/997", { + {NOLDN, NULL, + {0x03,0x07,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, + 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, + {RSVD,0x00,0x60,NANA,0x00,0x00,0x44,MISC,MISC,RSVD, + NANA,NANA,NANA,NANA,NANA,NANA,EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5, + EOT}, + {0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00, + EOT}}, + {0x3, "Parallel port", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT}, + {0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}}, + {0x4, "COM1", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x5, "COM2 / IR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT}, + {NANA,0x00,0x00,0x00,0x00,0x02,0x03,EOT}}, + {0x7, "Keyboard", + {0x30,0x70,0x72,0xf0,EOT}, + {0x00,0x00,0x00,0x00,EOT}}, + {0x9, "Game port", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x00,EOT}}, + {0xa, "Power Management Events (PME)", + {0x30,0x60,0x61,0xf0,EOT}, + {0x00,0x00,0x00,NANA,EOT}}, + {0xb, "MPU-401", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0x03,0x30,0x05,EOT}}, {EOT}}}, {0x62, "LPC47S45x", { {EOT}}},

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[LinuxBIOS] TOPSEARCH TS-M-8V01C
by Cimino Vittorio 14 Dec '07

14 Dec '07

LinuxBiosV3 (latest snapshot) Motherborad TOPSEARCH TS-M-8V01C SouthBridge : VT8231 NorthBridge : VT8601 This the data from motherboard CPU processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 7 model name : VIA Samuel 2 stepping : 3 cpu MHz : 400.917 cache size : 64 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu de tsc msr cx8 mtrr pge mmx 3dnow bogomips : 799.53 INTERRUPTS CPU0 0: 54354 XT-PIC timer 2: 0 XT-PIC cascade 4: 466 XT-PIC serial 5: 7 XT-PIC usb-uhci, internal 7: 0 XT-PIC LCD_KEYPAD 8: 0 XT-PIC rtc 10: 4 XT-PIC external 11: 1 XT-PIC IPSEC0 14: 9052 XT-PIC ide0 NMI: 0 ERR: 0 IOMEM 00000000-0009efff : System RAM 000a0000-000bffff : Video RAM area 000f0000-000fffff : System ROM 00100000-07ffffff : System RAM 00100000-0028a3ff : Kernel code 0028a400-00310ffb : Kernel data e7000000-e7000fff : PCI device 15bc:4003 (Agilent Technologies) e7002000-e70020ff : PCI device 1106:3053 (VIA Technologies, Inc.) e7002000-e70020ff : via-rhine e7003000-e70030ff : PCI device 1106:3053 (VIA Technologies, Inc.) e7003000-e70030ff : via-rhine MEMORY total: used: free: shared: buffers: cached: shm Mem: 129720320 99012608 30707712 0 565248 57450496i 12398592 Swap: 0 0 0 MemTotal: 126680 kB MemFree: 29988 kB MemShared: 0 kB Buffers: 552 kB Cached: 56104 kB SwapCached: 0 kB Active: 9232 kB Inactive: 47516 kB HighTotal: 0 kB HighFree: 0 kB LowTotal: 126680 kB LowFree: 29988 kB SwapTotal: 0 kB SwapFree: 0 kB MTRR reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1 PCI 00:00.0 Class 0600: 1106:0601 (rev 05) 00:01.0 Class 0604: 1106:8601 00:0d.0 Class 1000: 15bc:4003 (rev 02) 00:0f.0 Class 0200: 1106:3053 (rev 96) 00:10.0 Class 0200: 1106:3053 (rev 96) 00:11.0 Class 0601: 1106:8231 (rev 10) 00:11.1 Class 0101: 1106:0571 (rev 06) 00:11.2 Class 0c03: 1106:3038 (rev 1e) 00:11.4 Class 0000: 1106:8235 (rev 10) 00:00.0 Host bridge: VIA Technologies, Inc. VT8601 (rev 05) Flags: bus master, medium devsel, latency 8 Memory at <unassigned> (32-bit, prefetchable) Capabilities: [a0] AGP version 2.0 00:01.0 PCI bridge: VIA Technologies, Inc. VT8601 (prog-if 00 [Normal decode]) Flags: bus master, 66Mhz, medium devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 Capabilities: [80] Power Management version 2 00:0d.0 Network and computing encryption device: Agilent Technologies: Unknown d evice 4003 (rev 02) Flags: bus master, 66Mhz, medium devsel, latency 252, IRQ 11 Memory at e7000000 (32-bit, non-prefetchable) [size=4K] 00:0f.0 Ethernet controller: VIA Technologies, Inc.: Unknown device 3053 (rev 96 ) Subsystem: VIA Technologies, Inc.: Unknown device 0106 Flags: bus master, medium devsel, latency 32, IRQ 10 I/O ports at d800 [size=256] Memory at e7002000 (32-bit, non-prefetchable) [size=256] Capabilities: [40] Power Management version 2 00:10.0 Ethernet controller: VIA Technologies, Inc.: Unknown device 3053 (rev 96 ) Subsystem: VIA Technologies, Inc.: Unknown device 0106 Flags: bus master, medium devsel, latency 32, IRQ 5 I/O ports at dc00 [size=256] Memory at e7003000 (32-bit, non-prefetchable) [size=256] Capabilities: [40] Power Management version 2 00:11.0 ISA bridge: VIA Technologies, Inc. VT8231 [PCI-to-ISA Bridge] (rev 10) Flags: bus master, stepping, medium devsel, latency 0 Capabilities: [c0] Power Management version 2 00:11.1 IDE interface: VIA Technologies, Inc. VT82C586 IDE [Apollo] (rev 06) (pr og-if 8a [Master SecP PriP]) Flags: bus master, medium devsel, latency 64 I/O ports at e000 [size=16] Capabilities: [c0] Power Management version 2 00:11.2 USB Controller: VIA Technologies, Inc. VT82C586B USB (rev 1e) (prog-if 0 0 [UHCI]) Subsystem: Unknown device 0925:1234 Flags: bus master, medium devsel, latency 64, IRQ 5 I/O ports at f200 [size=32] Capabilities: [80] Power Management version 2 00:11.4 Non-VGA unclassified device: VIA Technologies, Inc.: Unknown device 8235 (rev 10) Flags: medium devsel Capabilities: [68] Power Management version 2 PCI devices found: Bus 0, device 0, function 0: Host bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia] (rev 5). Master Capable. Latency=8. Prefetchable 32 bit memory at 0x0 [0xffffffff]. Bus 0, device 1, function 0: PCI bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia AGP] (rev 0). Bus 0, device 13, function 0: Network and computing encryption device: PCI device 15bc:4003 (Agilent Techn ologies) (rev 2). IRQ 11. Master Capable. Latency=252. Non-prefetchable 32 bit memory at 0xe7000000 [0xe7000fff]. Bus 0, device 15, function 0: Ethernet controller: PCI device 1106:3053 (VIA Technologies, Inc.) (rev 150) . IRQ 10. Master Capable. Latency=32. Min Gnt=3.Max Lat=8. I/O at 0xd800 [0xd8ff]. Non-prefetchable 32 bit memory at 0xe7002000 [0xe70020ff]. Bus 0, device 16, function 0: Ethernet controller: PCI device 1106:3053 (VIA Technologies, Inc.) (rev 150) . IRQ 5. Master Capable. Latency=32. Min Gnt=3.Max Lat=8. I/O at 0xdc00 [0xdcff]. Non-prefetchable 32 bit memory at 0xe7003000 [0xe70030ff]. Bus 0, device 17, function 0: ISA bridge: VIA Technologies, Inc. VT8231 [PCI-to-ISA Bridge] (rev 16). Bus 0, device 17, function 1: IDE interface: VIA Technologies, Inc. Bus Master IDE (rev 6). Master Capable. Latency=64. I/O at 0xe000 [0xe00f]. Bus 0, device 17, function 2: USB Controller: VIA Technologies, Inc. UHCI USB (rev 30). IRQ 5. Master Capable. Latency=64. I/O at 0xf200 [0xf21f]. Bus 0, device 17, function 4: Non-VGA unclassified device: VIA Technologies, Inc. VT8235 Power Management (rev 16). This can be a VIA/EPIA compatible Motherboard. The make process and other operation (programming flash etc etc) are ok. When system start LinuxBios don't find the memory. This the log of boot: LinuxBIOS-2.0.0.0Normal mer dic 12 11:39:32 CET 2007 starting... 87 is the comm register SMBus controller enabled vt8601 init starting 00000000 is the north 1106 0601 0120e4 is the computed timing NOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00 is empty Slot 01 is empty Slot 02 is empty Slot 03 is empty vt8601 done Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. at this point the system hang. Anyone can help me. Tnx

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[LinuxBIOS] r85 - in buildrom-devel: config/platforms packages/qemu
by svn＠openbios.org 14 Dec '07

14 Dec '07

Author: myles Date: 2007-12-14 15:23:56 +0100 (Fri, 14 Dec 2007) New Revision: 85 Modified: buildrom-devel/config/platforms/Config.in buildrom-devel/packages/qemu/qemu.mk Log: This patch puts build output from qemu into log files, corrects a reference to the compiler in the Makefile, and updates the default compiler to be gcc34 instead of gcc32. Modified: buildrom-devel/config/platforms/Config.in =================================================================== --- buildrom-devel/config/platforms/Config.in 2007-12-13 18:09:30 UTC (rev 84) +++ buildrom-devel/config/platforms/Config.in 2007-12-14 14:23:56 UTC (rev 85) @@ -112,15 +112,16 @@ default n help Say 'y' here to build a patched version of QEMU to work with - LinuxBIOS. This downloads the correct version and patches it + LinuxBIOS. This downloads the correct version and patches it; it even builds it if you specify the QEMU_CC correctly. config QEMU_CC string "Compiler to use when building QEMU" depends BUILD_QEMU - default "gcc32" + default "gcc34" help - Set this string to point to your compiler (GCC_VER <=3.2) + QEMU has known problems when built using gcc 4.x. + Set this string to point to your compiler (GCC_VER 3.x). config SIMNOW bool "Build for the AMD SimNow (TM) emulator" Modified: buildrom-devel/packages/qemu/qemu.mk =================================================================== --- buildrom-devel/packages/qemu/qemu.mk 2007-12-13 18:09:30 UTC (rev 84) +++ buildrom-devel/packages/qemu/qemu.mk 2007-12-14 14:23:56 UTC (rev 85) @@ -32,11 +32,11 @@ @ touch $@ $(QEMU_STAMP_DIR)/.configured: $(QEMU_STAMP_DIR)/.patched - @ cd $(QEMU_SRC_DIR); ./configure --cc=gcc32 --target-list=i386-softmmu + @ cd $(QEMU_SRC_DIR); ./configure --cc=$(CONFIG_QEMU_CC) --target-list=i386-softmmu > $(QEMU_CONFIG_LOG) 2>&1 @ touch $@ $(QEMU_SRC_DIR)/i386-softmmu/qemu: $(QEMU_STAMP_DIR)/.configured - @ make -C $(QEMU_SRC_DIR) CC=$(CONFIG_QEMU_CC) CCFLAGS="" CFLAGS="" LDFLAGS="" + @ make -C $(QEMU_SRC_DIR) CC=$(CONFIG_QEMU_CC) CCFLAGS="" CFLAGS="" LDFLAGS="" > $(QEMU_BUILD_LOG) 2>&1 @ echo "the qemu executable is in $(QEMU_SRC_DIR)/i386-softmmu/" $(QEMU_STAMP_DIR) $(QEMU_LOG_DIR):

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[LinuxBIOS] Southbridge
by Cimino Vittorio 14 Dec '07

14 Dec '07

Is possible to make a dump of southbridge? tnx

3 3

[LinuxBIOS] [PATCH] buildrom qemu patch
by Myles Watson 14 Dec '07

14 Dec '07

This patch puts build output from qemu into log files, corrects a reference to the compiler in the Makefile, and updates the default compiler to be gcc34 instead of gcc32. I'd have called it trivial except that I changed the default compiler. Myles Signed-off-by: Myles Watson <myles(a)pel.cs.byu.edu>

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coreboot December 2007