coreboot October 2007

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[LinuxBIOS] r2857 build service
by LinuxBIOS information 15 Oct '07

15 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2857 to the LinuxBIOS source repository and caused the following changes: Change Log: Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2857&device=khepri&vendor… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r2856 build service
by LinuxBIOS information 15 Oct '07

15 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2856 to the LinuxBIOS source repository and caused the following changes: Change Log: This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA) Signed-off-by: Joseph Smith <joe(a)smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2856&device=khepri&vendor… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] Mobile Intel Celeron CPU Question
by joe＠smittys.pointclark.net 15 Oct '07

15 Oct '07

Here is /proc/cpuinfo from the original bios: processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 11 model name : Mobile Intel(R) Celeron(TM) CPU 733MHz stepping : 4 cpu MHz : 731.076 cache size : 256 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr sse bogomips : 1445.88 What would my cpu_device_id be then? 0x06B4 right? Can this be combined with the model_69x then? They are very close. Thanks - Joe

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[LinuxBIOS] r2858 - trunk/util/flashrom
by svn＠openbios.org 15 Oct '07

15 Oct '07

Author: stepan Date: 2007-10-15 23:45:29 +0200 (Mon, 15 Oct 2007) New Revision: 2858 Added: trunk/util/flashrom/spi.c Log: (forgot to add spi.c) Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Added: trunk/util/flashrom/spi.c =================================================================== --- trunk/util/flashrom/spi.c (rev 0) +++ trunk/util/flashrom/spi.c 2007-10-15 21:45:29 UTC (rev 2858) @@ -0,0 +1,199 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2007 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Contains the generic SPI framework + */ + +#include <stdio.h> +#include <pci/pci.h> +#include <stdint.h> +#include <string.h> +#include "flash.h" + +#define ITE_SUPERIO_PORT1 0x2e +#define ITE_SUPERIO_PORT2 0x4e + +#define JEDEC_RDID {0x9f} +#define JEDEC_RDID_OUTSIZE 0x01 +#define JEDEC_RDID_INSIZE 0x03 + +static uint16_t it8716f_flashport = 0; + +/* Generic Super I/O helper functions */ +uint8_t regval(uint16_t port, uint8_t reg) +{ + outb(reg, port); + return inb(port + 1); +} + +void regwrite(uint16_t port, uint8_t reg, uint8_t val) +{ + outb(reg, port); + outb(val, port + 1); +} + +/* Helper functions for most recent ITE IT87xx Super I/O chips */ +#define CHIP_ID_BYTE1_REG 0x20 +#define CHIP_ID_BYTE2_REG 0x21 +static void enter_conf_mode_ite(uint16_t port) +{ + outb(0x87, port); + outb(0x01, port); + outb(0x55, port); + if (port == ITE_SUPERIO_PORT1) + outb(0x55, port); + else + outb(0xaa, port); +} + +static void exit_conf_mode_ite(uint16_t port) +{ + regwrite(port, 0x02, 0x02); +} + +static uint16_t find_ite_serial_flash_port(uint16_t port) +{ + uint8_t tmp = 0; + uint16_t id, flashport = 0; + + enter_conf_mode_ite(port); + + id = regval(port, CHIP_ID_BYTE1_REG) << 8; + id |= regval(port, CHIP_ID_BYTE2_REG); + + /* TODO: Handle more IT87xx if they support flash translation */ + if (id == 0x8716) { + /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ + tmp = regval(port, 0x24) & 0xFE; + printf("Serial flash segment 0x%08x-0x%08x %sabled\n", + 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis"); + printf("Serial flash segment 0x%08x-0x%08x %sabled\n", + 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis"); + printf("Serial flash segment 0x%08x-0x%08x %sabled\n", + 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis"); + printf("Serial flash segment 0x%08x-0x%08x %sabled\n", + 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); + printf("LPC write to serial flash %sabled\n", + (tmp & 1 << 4) ? "en" : "dis"); + printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); + /* LDN 0x7, reg 0x64/0x65 */ + regwrite(port, 0x07, 0x7); + flashport = regval(port, 0x64) << 8; + flashport |= regval(port, 0x65); + } + exit_conf_mode_ite(port); + return flashport; +} + +/* The IT8716F only supports commands with length 1,2,4,5 bytes including + command byte and can not read more than 3 bytes from the device. + This function expects writearr[0] to be the first byte sent to the device, + whereas the IT8716F splits commands internally into address and non-address + commands with the address in inverse wire order. That's why the register + ordering in case 4 and 5 may seem strange. */ +static int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr) +{ + uint8_t busy, writeenc; + do { + busy = inb(port) & 0x80; + } while (busy); + if (readcnt > 3) { + printf("%s called with unsupported readcnt %i\n", + __FUNCTION__, readcnt); + return 1; + } + switch (writecnt) { + case 1: + outb(writearr[0], port + 1); + writeenc = 0x0; + break; + case 2: + outb(writearr[0], port + 1); + outb(writearr[1], port + 7); + writeenc = 0x1; + break; + case 4: + outb(writearr[0], port + 1); + outb(writearr[1], port + 4); + outb(writearr[2], port + 3); + outb(writearr[3], port + 2); + writeenc = 0x2; + break; + case 5: + outb(writearr[0], port + 1); + outb(writearr[1], port + 4); + outb(writearr[2], port + 3); + outb(writearr[3], port + 2); + outb(writearr[4], port + 7); + writeenc = 0x3; + break; + default: + printf("%s called with unsupported writecnt %i\n", + __FUNCTION__, writecnt); + return 1; + } + /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: + * We can't use writecnt directly, but have to use a strange encoding + */ + outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); + do { + busy = inb(port) & 0x80; + } while (busy); + readarr[0] = inb(port + 5); + readarr[1] = inb(port + 6); + readarr[2] = inb(port + 7); + return 0; +} + +static int it8716f_serial_rdid(uint16_t port, unsigned char *readarr) +{ + const unsigned char cmd[] = JEDEC_RDID; + + if (it8716f_spi_command(port, JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr)) + return 1; + printf("RDID returned %02x %02x %02x\n", readarr[0], readarr[1], readarr[2]); + return 0; +} + +int it87xx_probe_serial_flash(const char *name) +{ + it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT1); + if (!it8716f_flashport) + it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT2); + return (!it8716f_flashport); +} + +int probe_spi(struct flashchip *flash) +{ + unsigned char readarr[3]; + uint8_t manuf_id; + uint16_t model_id; + if (it8716f_flashport) { + it8716f_serial_rdid(it8716f_flashport, readarr); + manuf_id = readarr[0]; + model_id = (readarr[1] << 8) | readarr[2]; + printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, model_id); + if (manuf_id == flash->manufacture_id && model_id == flash->model_id) + return 1; + } + + return 0; +} +

1 0

[LinuxBIOS] r2857 - trunk/util/flashrom
by svn＠openbios.org 15 Oct '07

15 Oct '07

Author: stepan Date: 2007-10-15 23:44:47 +0200 (Mon, 15 Oct 2007) New Revision: 2857 Modified: trunk/util/flashrom/Makefile trunk/util/flashrom/board_enable.c trunk/util/flashrom/flash.h Log: Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/flashrom/Makefile =================================================================== --- trunk/util/flashrom/Makefile 2007-10-15 21:39:48 UTC (rev 2856) +++ trunk/util/flashrom/Makefile 2007-10-15 21:44:47 UTC (rev 2857) @@ -24,7 +24,7 @@ am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o w49f002u.o \ 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o sst49lfxxxc.o \ sst_fwhub.o layout.o lbtable.o flashchips.o flashrom.o \ - sharplhf00l04.o w29ee011.o + sharplhf00l04.o w29ee011.o spi.o all: pciutils dep $(PROGRAM) Modified: trunk/util/flashrom/board_enable.c =================================================================== --- trunk/util/flashrom/board_enable.c 2007-10-15 21:39:48 UTC (rev 2856) +++ trunk/util/flashrom/board_enable.c 2007-10-15 21:44:47 UTC (rev 2857) @@ -30,176 +30,6 @@ #include <string.h> #include "flash.h" -#define ITE_SUPERIO_PORT1 0x2e -#define ITE_SUPERIO_PORT2 0x4e - -#define JEDEC_RDID {0x9f} -#define JEDEC_RDID_OUTSIZE 0x01 -#define JEDEC_RDID_INSIZE 0x03 - -static uint16_t it8716f_flashport = 0; - -/* Generic Super I/O helper functions */ -uint8_t regval(uint16_t port, uint8_t reg) -{ - outb(reg, port); - return inb(port + 1); -} - -void regwrite(uint16_t port, uint8_t reg, uint8_t val) -{ - outb(reg, port); - outb(val, port + 1); -} - -/* Helper functions for most recent ITE IT87xx Super I/O chips */ -#define CHIP_ID_BYTE1_REG 0x20 -#define CHIP_ID_BYTE2_REG 0x21 -static void enter_conf_mode_ite(uint16_t port) -{ - outb(0x87, port); - outb(0x01, port); - outb(0x55, port); - if (port == ITE_SUPERIO_PORT1) - outb(0x55, port); - else - outb(0xaa, port); -} - -static void exit_conf_mode_ite(uint16_t port) -{ - regwrite(port, 0x02, 0x02); -} - -static uint16_t find_ite_serial_flash_port(uint16_t port) -{ - uint8_t tmp = 0; - uint16_t id, flashport = 0; - - enter_conf_mode_ite(port); - - id = regval(port, CHIP_ID_BYTE1_REG) << 8; - id |= regval(port, CHIP_ID_BYTE2_REG); - - /* TODO: Handle more IT87xx if they support flash translation */ - if (id == 0x8716) { - /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ - tmp = regval(port, 0x24) & 0xFE; - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis"); - printf("Serial flash segment 0x%08x-0x%08x %sabled\n", - 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); - printf("LPC write to serial flash %sabled\n", - (tmp & 1 << 4) ? "en" : "dis"); - printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); - /* LDN 0x7, reg 0x64/0x65 */ - regwrite(port, 0x07, 0x7); - flashport = regval(port, 0x64) << 8; - flashport |= regval(port, 0x65); - } - exit_conf_mode_ite(port); - return flashport; -} - -/* The IT8716F only supports commands with length 1,2,4,5 bytes including - command byte and can not read more than 3 bytes from the device. - This function expects writearr[0] to be the first byte sent to the device, - whereas the IT8716F splits commands internally into address and non-address - commands with the address in inverse wire order. That's why the register - ordering in case 4 and 5 may seem strange. */ -static int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr) -{ - uint8_t busy, writeenc; - do { - busy = inb(port) & 0x80; - } while (busy); - if (readcnt > 3) { - printf("%s called with unsupported readcnt %i\n", - __FUNCTION__, readcnt); - return 1; - } - switch (writecnt) { - case 1: - outb(writearr[0], port + 1); - writeenc = 0x0; - break; - case 2: - outb(writearr[0], port + 1); - outb(writearr[1], port + 7); - writeenc = 0x1; - break; - case 4: - outb(writearr[0], port + 1); - outb(writearr[1], port + 4); - outb(writearr[2], port + 3); - outb(writearr[3], port + 2); - writeenc = 0x2; - break; - case 5: - outb(writearr[0], port + 1); - outb(writearr[1], port + 4); - outb(writearr[2], port + 3); - outb(writearr[3], port + 2); - outb(writearr[4], port + 7); - writeenc = 0x3; - break; - default: - printf("%s called with unsupported writecnt %i\n", - __FUNCTION__, writecnt); - return 1; - } - /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: - * We can't use writecnt directly, but have to use a strange encoding - */ - outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); - do { - busy = inb(port) & 0x80; - } while (busy); - readarr[0] = inb(port + 5); - readarr[1] = inb(port + 6); - readarr[2] = inb(port + 7); - return 0; -} - -static int it8716f_serial_rdid(uint16_t port, unsigned char *readarr) -{ - const unsigned char cmd[] = JEDEC_RDID; - - if (it8716f_spi_command(port, JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr)) - return 1; - printf("RDID returned %02x %02x %02x\n", readarr[0], readarr[1], readarr[2]); - return 0; -} - -static int it87xx_probe_serial_flash(const char *name) -{ - it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT1); - if (!it8716f_flashport) - it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT2); - return (!it8716f_flashport); -} - -int probe_spi(struct flashchip *flash) -{ - unsigned char readarr[3]; - uint8_t manuf_id; - uint16_t model_id; - if (it8716f_flashport) { - it8716f_serial_rdid(it8716f_flashport, readarr); - manuf_id = readarr[0]; - model_id = (readarr[1] << 8) | readarr[2]; - printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, model_id); - if (manuf_id == flash->manufacture_id && model_id == flash->model_id) - return 1; - } - - return 0; -} - /* * Helper functions for many Winbond Super I/Os of the W836xx range. */ Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2007-10-15 21:39:48 UTC (rev 2856) +++ trunk/util/flashrom/flash.h 2007-10-15 21:44:47 UTC (rev 2857) @@ -207,7 +207,9 @@ int linuxbios_init(void); extern char *lb_part, *lb_vendor; +/* spi.c */ int probe_spi(struct flashchip *flash); +int it87xx_probe_serial_flash(const char *name); /* 82802ab.c */ int probe_82802ab(struct flashchip *flash);

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[LinuxBIOS] r2856 - trunk/LinuxBIOSv2/src/cpu/intel/model_6xx
by svn＠openbios.org 15 Oct '07

15 Oct '07

Author: stepan Date: 2007-10-15 23:39:48 +0200 (Mon, 15 Oct 2007) New Revision: 2856 Modified: trunk/LinuxBIOSv2/src/cpu/intel/model_6xx/model_6xx_init.c Log: This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA) Signed-off-by: Joseph Smith <joe(a)smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/cpu/intel/model_6xx/model_6xx_init.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/intel/model_6xx/model_6xx_init.c 2007-10-15 15:46:59 UTC (rev 2855) +++ trunk/LinuxBIOSv2/src/cpu/intel/model_6xx/model_6xx_init.c 2007-10-15 21:39:48 UTC (rev 2856) @@ -53,6 +53,7 @@ { X86_VENDOR_INTEL, 0x06A0 }, { X86_VENDOR_INTEL, 0x06A1 }, { X86_VENDOR_INTEL, 0x06A4 }, + { X86_VENDOR_INTEL, 0x06B4 }, /* Mobile Celeron FCBGA */ { 0, 0 }, };

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Re: [LinuxBIOS] LinuxBios
by Marc Jones 15 Oct '07

15 Oct '07

Hi Henry, Henry keultjes wrote: > Open BIOSes for Linux > http://www-128.ibm.com/developerworks/linux/library/l-bios.html > > Marc: > > Are you willing to provide some help/guidance getting LinuxBios > implemented on an Acer T180 with a dual core 2.1 Mhz Athlon? > Linux BIOS CPU support for the K8 ( Athlon X2) is complete and working on many systems. The problem with the AcerT180 is the support for the NVidia 6100 chipset (MCP51?). It might be close enough to the MCP55 but that is the biggest hurdle using this platform. Here is the list of supported devices: http://linuxbios.org/index.php/Supported_Chipsets_and_Devices > I am not a techy but, through my PowerPC involvement, have a > Motorola/Freescale G4 class machine that uses UBoot. I am absolutely > committed to this concept but I also remember the agony of trying to > get this machine ready to demo at Ohio Linux Fest 2005 and having to > ship it to a guy in the Philadelphia area to get it done. > > This time I posted to both the NCOLUG and the Ohio InterLUG list for > help with this Athlon system without any useful offers of help so once > again, I have to look for help elsewhere but I am also trying to turn > this into a teaching experience. > > Because I don't want to turn the T180 into a dead machine I am not > opposed to using a BIOS switch device that can supposedly leave the > original BIOS while enabling a second chip onto which to load the > LinuxBios. > You would need to examine the board and see if the ROM is socketed. Here are some details: http://linuxbios.org/index.php/FAQ#Where_can_I_buy_BIOS_chips_.28empty_or_p… > I have also offered to try to implement LinuxBIOS on two identical > older machines so that the difference between the BIOS's can be shown > at the next NCOLUG meeting on 01NOV2007. The machines I happen to > have available for that happen to have Intel CA810 motherboards in > them. Since I have great respect for people who have a prejudice for > products from the company that writes their paycheck, I have no > problem with digging up some similar machines that use AMD chips. > The 82810 chipset is listed as supported. There are several people working on Intel ports. They might have more information. Here is the list of supported motherboards. http://linuxbios.org/index.php/Supported_Motherboards > BTW, I really like AMD's DTX board concept, especially the mini-DTX > format of which I hope to have one before too long, especially if the > PS/2 ports are eliminated and displaydriving is implemented via the > newer technology of using USB or Ethernet. > Is the Opteron socket that accepts both PowerPC and Opteron chips a > (price) viable option for such a SFF system so we could come up with a > viable product that would have the most appeal in the IBM z, p and i > Series client (desktop) space? > I don't know. I am not familiar with the PowerPC socket requirements. > I look forward to hearing from you. > > Henry Keultjes http://www.linuxjournal.com/article/5009 > Microdyne Company > Mansfield Ohio USA > Direct 419-525-1111 > > Thanks for your interest in LinuxBIOS. I have copied the LinuxBIOS list so you can get the support of the entire community. The list is the best place to solicit support from people working on similar platforms and to discuss the problems you find as you transition to LinuxBIOS. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors

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[LinuxBIOS] r2855 build service
by LinuxBIOS information 15 Oct '07

15 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2855 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix stupid thinko in the Winbond detection code which prevented some of the Winbond chips from being detected (trivial fix). This is verified on real hardware and works fine now. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2855&device=khepri&vendor… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r2855 - trunk/util/superiotool
by svn＠openbios.org 15 Oct '07

15 Oct '07

Author: uwe Date: 2007-10-15 17:46:59 +0200 (Mon, 15 Oct 2007) New Revision: 2855 Modified: trunk/util/superiotool/winbond.c Log: Fix stupid thinko in the Winbond detection code which prevented some of the Winbond chips from being detected (trivial fix). This is verified on real hardware and works fine now. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/superiotool/winbond.c =================================================================== --- trunk/util/superiotool/winbond.c 2007-10-14 17:02:15 UTC (rev 2854) +++ trunk/util/superiotool/winbond.c 2007-10-15 15:46:59 UTC (rev 2855) @@ -291,7 +291,7 @@ if (devid == 0x52) id = devid; /* ID only */ - else if ((devid == 0x97) && ((rev & 0xf0) == 7)) + else if ((devid == 0x97) && ((rev & 0xf0) == 0x70)) id = (devid << 8) | rev; /* ID and rev */ else id = (devid << 4) | ((rev & 0xf0) >> 4); /* ID and rev[3..0] */

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[LinuxBIOS] LinuxBIOS simposium 2007
by tibor.osztodi＠bbraun.com 15 Oct '07

15 Oct '07

I know, the LinuxBIOS Symposium 2007 canceled, but I get information from Mr. Beck,\ in the 0sec Security Conference in Berne on 19th - 21st October, where we will have a little LinuxBIOS Hackcenter. I would like to ask, from the LinuxBIOS developers who will be participant of this Conference? Tibor ******************************************************************************** The information contained in this communication is confidential, may be attorney-client privileged, may constitute inside information, and is intended only for the use of the addressee. It is the property of the company of the sender of this e-mail. Unauthorized use, disclosure, or copying of this communication or any part thereof is strictly prohibited and may be unlawful. If you have received this communication in error, please notify us immediately by return e-mail and destroy this communication and all copies thereof, including all attachments. ********************************************************************************

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