coreboot October 2007

coreboot@coreboot.org

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481 discussions

[LinuxBIOS] [PATCH] superiotool: Fix Winbond W83697SF detection
by Uwe Hermann 16 Oct '07

16 Oct '07

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] r2861 - trunk/util/superiotool
by svn＠openbios.org 16 Oct '07

16 Oct '07

Author: uwe Date: 2007-10-16 20:15:25 +0200 (Tue, 16 Oct 2007) New Revision: 2861 Modified: trunk/util/superiotool/winbond.c Log: Fix the detection for the Winbond W83697SF. Unfortunately the revision has a slightly different format than that of the W83697UF/UG so we have to hack around it a bit. This patch has been verified to work on real hardware by Idwer Vollering <idwer_v(a)hotmail.com> on IRC (thanks!). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/util/superiotool/winbond.c =================================================================== --- trunk/util/superiotool/winbond.c 2007-10-16 00:34:03 UTC (rev 2860) +++ trunk/util/superiotool/winbond.c 2007-10-16 18:15:25 UTC (rev 2861) @@ -92,8 +92,6 @@ {EOT}}}, {0x610, "W83L517D/D-F", { {EOT}}}, - {0x681, "W83697SF/UF/UG", { - {EOT}}}, {0x708, "W83637HF/HG", { {EOT}}}, {0x828, "W83627THF/THG", { /* We assume rev is bits 3..0 of 0x21. */ @@ -295,6 +293,8 @@ {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,EOT}}, {EOT}}}, + {0x68, "W83697SF/UF/UG", { /* TODO: Add comment. */ + {EOT}}}, /* ID[3..0] */ {0xa, "W83877F", { @@ -333,7 +333,7 @@ rev = regval(port, DEVICE_REV_REG); olddevid = regval(port, DEVICE_ID_REG_OLD) & 0x0f; - if (devid == 0x52) + if (devid == 0x52 || devid == 0x68) id = devid; /* ID only */ else if ((devid == 0x97) && ((rev & 0xf0) == 0x70)) id = (devid << 8) | rev; /* ID and rev */

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Re: [LinuxBIOS] badly initialized (?) pci bridge on the M57SLI (with irq table and mptable)
by echelon＠free.fr 16 Oct '07

16 Oct '07

Hi Ward, I don't think that my little "quickie" deserves so much consideration, but I will post it, hopping that it could be usefull for someone.. Btw you have to do first a "setpci -s 00:01.1 64.l" to retrieve the base address of the SYSCTRL register table. Use this value as a parameter for my program to dump the io configuration (the gpio registers seem to start @ offset 0xc0 into this table..) Hope this helps, Florentin Quoting Ward Vandewege <ward(a)gnu.org>: > Hey Florentin, > > Fascinating! > > On Fri, Oct 05, 2007 at 03:00:15PM +0200, echelon(a)free.fr wrote: > > - 3) Btw I figured out that registers of the "IO control unit" of mcp55 > can be > > mapped into the IO space by writting into the SYSCTRL_REG of the 00:01.1 > pci > > device integrated into the SB. Indeed by using this value as a base (under > > Linux, this register holds the value 0x1400) one can access the GPIO > registers > > of MCP55 (beginning @ the 0xc0 offset? maybe..) These are 8 bit registers > > apparently.. > > - 4) After booting with the proprietary Award bios, I dumped this table > under > > Linux (with a simple custom utility that I wrote for this purpose..). I > dumped > > 256 bytes from 0x1400. > > Would you mind sharing this utility with the list? It could be a very handy > debugging tool. > > Thanks, > Ward. > > -- > Ward Vandewege <ward(a)fsf.org> > Free Software Foundation - Senior System Administrator >

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[LinuxBIOS] r2860 build service
by LinuxBIOS information 16 Oct '07

16 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2860 to the LinuxBIOS source repository and caused the following changes: Change Log: Dump support for the Winbond W83977TF. Signed-off-by: Idwer Vollering <idwer_v(a)hotmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2860&device=khepri&vendor… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r2859 build service
by LinuxBIOS information 16 Oct '07

16 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2859 to the LinuxBIOS source repository and caused the following changes: Change Log: Completely rip out / replace the ASUS P2B code (which wasn't really working), replacing it with a minimal, but working, framework which will be expanded. Drop a bunch of useless and duplicated files, add missing license headers. I'm self-acking it this time, the diff is a huge unreadable mess and the old code is broken anyway... This code is tested to build fine, and can boot a Linux kernel up to a login-prompt via FILO (IDE). This is verified on actual hardware. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2859&device=khepri&vendor… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] Superiotool dump support for Winbond W83977TF (r2855)
by Idwer Vollering 16 Oct '07

16 Oct '07

See attached patch. Signed-off-by: Idwer <idwer_v(a)hotmail.com> --- Found Winbond W83977TF (id=0x97, rev=0x73) at 0x3f0 Register dump: idx 20 21 22 23 24 25 26 28 2a 2b 2c 2d 2e 2f val 97 73 ff fe 80 00 00 00 00 00 02 00 00 ff def 97 73 ff fe NA 00 NA 00 00 00 00 RR RR RR LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0c 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 3b def 01 03 78 07 04 3f LDN 0x02 (UART A) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (UART B) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (KBC) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 00 43 def 01 00 60 00 64 01 0c 83 LDN 0x07 (GPIO 1) idx 30 60 61 62 63 64 65 70 72 e0 e1 e2 e3 e4 e5 e6 e7 f1 val 01 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 def 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 LDN 0x08 (GPIO 2) idx 30 60 61 70 72 e8 e9 ea eb ec ed ee f0 f1 f2 f3 f4 val 01 00 00 00 00 01 01 01 01 01 01 01 00 ff 00 00 02 def 00 00 00 00 00 01 01 01 01 01 01 01 00 RR 00 00 00 LDN 0x09 (GPIO 3) idx 30 60 61 62 63 64 65 70 72 e0 e1 e2 e3 e4 e5 e7 f1 val 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 00 def 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 00 LDN 0x0a (ACPI) idx 30 60 61 62 63 64 65 70 e0 e1 02 e3 e4 f0 f1 f2 f3 f4 f5 f6 f7 fe ff val 00 00 00 00 00 00 00 00 60 00 ff 00 00 80 00 0f 34 00 00 00 00 00 00 def 00 00 00 00 00 00 00 00 00 00 NA NA RR 00 00 00 00 00 00 00 00 RR RR No human-readable dump available for this Super I/O _________________________________________________________________ Live.nl: je eigen persoonlijk startpagina met nieuws en feeds die JIJ belangrijk vindt! http://www.live.com/getstarted.aspx

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[LinuxBIOS] r2860 - trunk/util/superiotool
by svn＠openbios.org 16 Oct '07

16 Oct '07

Author: uwe Date: 2007-10-16 02:34:03 +0200 (Tue, 16 Oct 2007) New Revision: 2860 Modified: trunk/util/superiotool/winbond.c Log: Dump support for the Winbond W83977TF. Signed-off-by: Idwer Vollering <idwer_v(a)hotmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/superiotool/winbond.c =================================================================== --- trunk/util/superiotool/winbond.c 2007-10-16 00:13:59 UTC (rev 2859) +++ trunk/util/superiotool/winbond.c 2007-10-16 00:34:03 UTC (rev 2860) @@ -202,6 +202,50 @@ {0x9771, "W83977F-A/G-A/AF-A/AG-A", { {EOT}}}, {0x9773, "W83977TF", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a,0x2b, + 0x2c,0x2d,0x2e,0x2f,EOT}, + {0x97,0x73,0xff,0xfe,MISC,0x00,MISC,0x00,0x00,0x00, + 0x00,RSVD,RSVD,RSVD,EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5, + EOT}, + {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00, + EOT}}, + {0x1, "Parallel port", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}}, + {0x2, "COM1", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x01,0x03,0xf8,0x04,0x00,EOT}}, + {0x3, "COM2", + {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, + {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}}, + {0x5, "Keyboard / mouse", + {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT}, + {0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}}, + {0x7, "GPIO 1", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x72,0xe0, + 0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xf1,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01, + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,EOT}}, + {0x8, "GPIO 2", + {0x30,0x60,0x61,0x70,0x72,0xe8,0xe9,0xea,0xeb,0xec, + 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01, + 0x01,0x01,0x00,RSVD,0x00,0x00,0x00,EOT}}, + {0x9, "GPIO 3", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x72,0xe0, + 0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xf1,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01, + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,EOT}}, + {0xa, "ACPI", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0xe0,0xe1, + 0x02,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6, + 0xf7,0xfe,0xff,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + NANA,MISC,RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,RSVD,RSVD,EOT}}, {EOT}}}, {0x9774, "W83977ATF", { {EOT}}},

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[LinuxBIOS] r2858 build service
by LinuxBIOS information 16 Oct '07

16 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2858 to the LinuxBIOS source repository and caused the following changes: Change Log: (forgot to add spi.c) Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2858&device=khepri&vendor… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r2859 - in trunk/LinuxBIOSv2: src/mainboard/asus/p2b targets/asus/p2b
by svn＠openbios.org 16 Oct '07

16 Oct '07

Author: uwe Date: 2007-10-16 02:13:59 +0200 (Tue, 16 Oct 2007) New Revision: 2859 Removed: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/cmos.layout trunk/LinuxBIOSv2/src/mainboard/asus/p2b/debug.c trunk/LinuxBIOSv2/src/mainboard/asus/p2b/failover.c trunk/LinuxBIOSv2/src/mainboard/asus/p2b/reset.c Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Config.lb trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Options.lb trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c trunk/LinuxBIOSv2/src/mainboard/asus/p2b/chip.h trunk/LinuxBIOSv2/src/mainboard/asus/p2b/mainboard.c trunk/LinuxBIOSv2/targets/asus/p2b/Config.lb Log: Completely rip out / replace the ASUS P2B code (which wasn't really working), replacing it with a minimal, but working, framework which will be expanded. Drop a bunch of useless and duplicated files, add missing license headers. I'm self-acking it this time, the diff is a huge unreadable mess and the old code is broken anyway... This code is tested to build fine, and can boot a Linux kernel up to a login-prompt via FILO (IDE). This is verified on actual hardware. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Config.lb 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Config.lb 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,136 +1,131 @@ ## -## Compute the location and size of where this firmware image -## (linuxBIOS plus bootloader) will live in the boot rom chip. +## This file is part of the LinuxBIOS project. ## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end - +## Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> ## -## Compute the start location and size size of -## The linuxBIOS bootloader. +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. ## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. ## -## Compute where this copy of linuxBIOS will start in the boot rom +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) -## -## Compute a range of ROM that can cached to speed up linuxBIOS, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## -## Set all of the defaults for an x86 architecture -## - +if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) +else + default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) + default ROM_SECTION_OFFSET = 0 +end +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) +default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) +default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) +default XIP_ROM_SIZE = 64 * 1024 +default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) arch i386 end - -## -## Build the objects we have code for in this directory. -## - driver mainboard.o - -#if HAVE_PIRQ_TABLE object irq_tables.o end -#object reset.o - -## -## Romcc output -## +if HAVE_PIRQ_TABLE + object irq_tables.o +end makerule ./failover.E - depends "$(MAINBOARD)/failover.c ./romcc" - action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" + depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end - makerule ./failover.inc - depends "$(MAINBOARD)/failover.c ./romcc" - action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" + depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end - -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +makerule ./auto.E + # depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + depends "$(MAINBOARD)/auto.c ./romcc" + action "./romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end -makerule ./auto.inc - depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +makerule ./auto.inc + # depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + depends "$(MAINBOARD)/auto.c ./romcc" + action "./romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end - -## -## Build our 16 bit and 32 bit linuxBIOS entry code -## mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds - -## -## Build our reset vector (This is where linuxBIOS is entered) -## -if USE_FALLBACK_IMAGE - mainboardinit cpu/x86/16bit/reset16.inc - ldscript /cpu/x86/16bit/reset16.lds +if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds else - mainboardinit cpu/x86/32bit/reset32.inc - ldscript /cpu/x86/32bit/reset32.lds + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds end - -### Should this be in the northbridge code? mainboardinit arch/i386/lib/cpu_reset.inc - -## -## Include an id string (For safe flashing) -## mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds - -### -### This is the early phase of linuxBIOS startup -### Things are delicate and we test to see if we should -### failover to another image. -### if USE_FALLBACK_IMAGE - ldscript /arch/i386/lib/failover.lds + ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end - -### -### O.k. We aren't just an intermediary anymore! -### - -## -## Setup RAM -## mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc mainboardinit cpu/x86/mmx/disable_mmx.inc -## -## Include the secondary Configuration files -## dir /pc80 config chip.h -chip northbridge/intel/i440bx - device pci_domain 0 on - end - - chip cpu/intel/socket_PGA370 - end - +chip northbridge/intel/i440bx # Northbridge + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + device pci 1.0 on end # AGP bridge + chip southbridge/intel/i82371eb # Southbridge + device pci 4.0 on # ISA + chip superio/winbond/w83977tf # Super I/O + device pnp 3f0.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 3f0.1 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 3f0.2 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 3f0.3 on # COM2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 3f0.5 on # PS/2 keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 3f0.7 on # GPIO 1 + end + device pnp 3f0.8 on # GPIO 2 + end + device pnp 3f0.9 on # GPIO 3 + end + device pnp 3f0.a on # ACPI + end + end + end + device pci 4.1 on end # IDE + device pci 4.2 on end # USB + device pci 4.3 on end # ACPI + register "ide0_enable" = "1" + register "ide1_enable" = "1" + end + end + chip cpu/intel/socket_PGA370 + end end - Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Options.lb 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/Options.lb 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,3 +1,23 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + uses HAVE_MP_TABLE uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE @@ -40,117 +60,30 @@ uses TTYS0_LCS uses CONFIG_UDELAY_TSC -## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 - -### -### Build options -### - -## -## Build code for the fallback boot -## -default HAVE_FALLBACK_BOOT=1 - -## -## no MP table -## -default HAVE_MP_TABLE=0 - -## -## Build code to reset the motherboard from linuxBIOS -## -default HAVE_HARD_RESET=0 - -## -## Build code to export a programmable irq routing table -## -default HAVE_PIRQ_TABLE=0 -default IRQ_SLOT_COUNT=4 -#object irq_tables.o - -## -## Build code to export a CMOS option table -## -default HAVE_OPTION_TABLE=0 - -### -### LinuxBIOS layout values -### - -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +default ROM_SIZE = 256 * 1024 +default HAVE_FALLBACK_BOOT = 1 +default HAVE_MP_TABLE = 0 +default HAVE_HARD_RESET = 0 +default HAVE_PIRQ_TABLE = 0 +default IRQ_SLOT_COUNT = 4 +default HAVE_OPTION_TABLE = 0 default ROM_IMAGE_SIZE = 65536 default FALLBACK_SIZE = 131072 - -## -## Use a small 8K stack -## -default STACK_SIZE=0x2000 - -## -## Use a small 16K heap -## -default HEAP_SIZE=0x4000 - -## -## Only use the option table in a normal image -## +default STACK_SIZE = 0x2000 +default HEAP_SIZE = 0x4000 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE default USE_OPTION_TABLE = 0 - default _RAMBASE = 0x00004000 +default CONFIG_ROM_PAYLOAD = 1 +default CROSS_COMPILE = "" +default CC = "$(CROSS_COMPILE)gcc -m32" +default HOSTCC = "gcc" +default CONFIG_CONSOLE_SERIAL8250 = 1 +default TTYS0_BAUD = 115200 +default TTYS0_BASE = 0x3f8 +default TTYS0_LCS = 0x3 +default DEFAULT_CONSOLE_LOGLEVEL = 9 +default MAXIMUM_CONSOLE_LOGLEVEL = 9 +default CONFIG_UDELAY_TSC = 1 -default CONFIG_ROM_PAYLOAD = 1 - -## -## The default compiler -## -default CROSS_COMPILE="" -default CC="$(CROSS_COMPILE)gcc -m32" -default HOSTCC="gcc" - -## -## The Serial Console -## - -# To Enable the Serial Console -default CONFIG_CONSOLE_SERIAL8250=1 - -## Select the serial console baud rate -default TTYS0_BAUD=115200 -#default TTYS0_BAUD=57600 -#default TTYS0_BAUD=38400 -#default TTYS0_BAUD=19200 -#default TTYS0_BAUD=9600 -#default TTYS0_BAUD=4800 -#default TTYS0_BAUD=2400 -#default TTYS0_BAUD=1200 - -# Select the serial console base port -default TTYS0_BASE=0x3f8 - -# Select the serial protocol -# This defaults to 8 data bits, 1 stop bit, and no parity -default TTYS0_LCS=0x3 - -## -### Select the linuxBIOS loglevel -## -## EMERG 1 system is unusable -## ALERT 2 action must be taken immediately -## CRIT 3 critical conditions -## ERR 4 error conditions -## WARNING 5 warning conditions -## NOTICE 6 normal but significant condition -## INFO 7 informational -## DEBUG 8 debug-level messages -## SPEW 9 Way too many details - -## Request this level of debugging output -default DEFAULT_CONSOLE_LOGLEVEL=9 -## At a maximum only compile in this level of debugging -default MAXIMUM_CONSOLE_LOGLEVEL=9 - -default CONFIG_UDELAY_TSC=1 end - Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c 2007-10-16 00:13:59 UTC (rev 2859) @@ -32,33 +32,16 @@ #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "superio/winbond/w83977tf/w83977tf_early_serial.c" #include "northbridge/intel/i440bx/raminit.h" +#include "mainboard/bitworks/ims/debug.c" /* FIXME */ +#include "pc80/udelay_io.c" +#include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void udelay(int usecs) +static inline int spd_read_byte(unsigned int device, unsigned int address) { - int i; - for(i = 0; i < usecs; i++) - outb(i&0xff, 0x80); -} - -#include "debug.c" -#include "lib/delay.c" - -static void enable_shadow_ram(void) -{ - uint8_t shadowreg; - /* dev 0 for northbridge */ - shadowreg = pci_read_config8(0, 0x59); - /* 0xf0000-0xfffff */ - shadowreg |= 0x30; - pci_write_config8(0, 0x59, shadowreg); -} - -static inline int spd_read_byte(unsigned device, unsigned address) -{ return smbus_read_byte(device, address); } @@ -70,47 +53,21 @@ { static const struct mem_controller memctrl[] = { { - .d0 = PCI_DEV(0, 0, 0), - .channel0 = { - (0xa << 3) | 0, - (0xa << 3) | 1, - (0xa << 3) | 2, - (0xa << 3) | 3, - }, - } + .d0 = PCI_DEV(0, 0, 0), + .channel0 = {0x50, 0x51, 0x52, 0x53}, + } }; - - if (bist == 0) { + + if (bist == 0) early_mtrr_init(); - } + w83977tf_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); - - enable_shadow_ram(); - enable_smbus(); - dump_spd_registers(&memctrl[0]); - sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl); - - /* Check whether RAM is working. - * - * Do _not_ check the area from 640 KB - 1 MB, as that's not really - * RAM, but rather reserved for various other things: - * - * - 640 KB - 768 KB: Video Buffer Area - * - 768 KB - 896 KB: Expansion Area - * - 896 KB - 960 KB: Extended System BIOS Area - * - 960 KB - 1 MB: Memory (BIOS Area) - System BIOS Area - * - * Trying to check these areas will fail. - */ - /* TODO: This is currently hardcoded to check 64 MB. */ - ram_check(0x00000000, 0x0009ffff); /* 0 - 640 KB */ - ram_check(0x00100000, 0x007c0000); /* 1 MB - 64 MB */ + ram_check(0, 640 * 1024); } Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/chip.h 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/chip.h 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,3 +1,23 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + extern struct chip_operations mainboard_asus_p2b_ops; struct mainboard_asus_p2b_config { Deleted: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/cmos.layout =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/cmos.layout 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/cmos.layout 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,74 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 1007 1008 - - Deleted: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/debug.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/debug.c 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/debug.c 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Deleted: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/failover.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/failover.c 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/failover.c 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,32 +0,0 @@ -#define ASSEMBLY 1 -#include <stdint.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include "arch/romcc_io.h" -#include "pc80/mc146818rtc_early.c" - -static unsigned long main(unsigned long bist) -{ - /* This is the primary cpu how should I boot? */ - if (do_normal_boot()) { - goto normal_image; - } - else { - goto fallback_image; - } - normal_image: - asm volatile ("jmp __normal_image" - : /* outputs */ - : "a" (bist) /* inputs */ - : /* clobbers */ - ); - cpu_reset: - asm volatile ("jmp __cpu_reset" - : /* outputs */ - : "a"(bist) /* inputs */ - : /* clobbers */ - ); - fallback_image: - return bist; -} Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/mainboard.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/mainboard.c 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/mainboard.c 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,3 +1,23 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <device/device.h> #include "chip.h" Deleted: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/reset.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/reset.c 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/reset.c 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Modified: trunk/LinuxBIOSv2/targets/asus/p2b/Config.lb =================================================================== --- trunk/LinuxBIOSv2/targets/asus/p2b/Config.lb 2007-10-15 21:45:29 UTC (rev 2858) +++ trunk/LinuxBIOSv2/targets/asus/p2b/Config.lb 2007-10-16 00:13:59 UTC (rev 2859) @@ -1,29 +1,40 @@ -# Config file for asus p2b board -# This will make a target directory of ./p2b +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## target p2b mainboard asus/p2b -option ROM_SIZE=256*1024 +option ROM_SIZE = 256 * 1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 - option LINUXBIOS_EXTRA_VERSION=".0Normal" -# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf -# payload ../../../../tg3--ide_disk.zelf -# payload ../../../../../lnxieepro100.ebi - payload /etc/hosts + option USE_FALLBACK_IMAGE = 0 + option ROM_IMAGE_SIZE = 64 * 1024 + option LINUXBIOS_EXTRA_VERSION = ".0Normal" + payload /tmp/filo.elf end -romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 - option LINUXBIOS_EXTRA_VERSION=".0Fallback" -# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf -# payload ../../../../tg3--ide_disk.zelf -# payload ../../../../../lnxieepro100.ebia - payload /etc/hosts +romimage "fallback" + option USE_FALLBACK_IMAGE = 1 + option ROM_IMAGE_SIZE = 64 * 1024 + option LINUXBIOS_EXTRA_VERSION = ".0Fallback" + payload /tmp/filo.elf end buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"

1 0

[LinuxBIOS] alix 1c is stuck on this problem
by ron minnich 16 Oct '07

16 Oct '07

it always turns off in 4 seconds. I have been told to look at this: 6.18.3.14 PM Fail-Safe Delay and Enable (PM_FSD) PMS I/O Offset 40h Type R/W Reset Value 00000000h Reads always return the value written, except for RSVD bits [29:20]. But I can't see that we're setting it anywhere. Any good ideas welcome :-) ron

4 6

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coreboot October 2007