coreboot September 2006

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[LinuxBIOS] r2396 - in trunk/LinuxBIOSv2/src/superio/ite: . it8671f it8673f it8712f it8716f
by svn＠openbios.org 06 Sep '06

06 Sep '06

Author: stepan Date: 2006-09-06 18:12:39 +0200 (Wed, 06 Sep 2006) New Revision: 2396 Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/ trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8716f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c Log: Patch from Uwe Hermann: * support for it8716f. * minor fixes for it8712f, it8671f, it8673f Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h 2006-09-06 15:48:48 UTC (rev 2395) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h 2006-09-06 16:12:39 UTC (rev 2396) @@ -16,6 +16,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* Datasheet: Not available online, got it from ITE per request. */ +/* Status: Com1 is tested and works. */ + #define IT8671F_FDC 0x00 /* Floppy */ #define IT8671F_SP1 0x01 /* Com1 */ #define IT8671F_SP2 0x02 /* Com2 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-09-06 15:48:48 UTC (rev 2395) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-09-06 16:12:39 UTC (rev 2396) @@ -20,9 +20,9 @@ #include "it8671f.h" /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ -#define SIO_BASE 0x3f0 -#define SIO_INDEX SIO_BASE -#define SIO_DATA SIO_BASE+1 +#define SIO_BASE 0x3f0 +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 /* Global Configuration Registers. */ #define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ @@ -31,7 +31,6 @@ #define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */ #define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */ -#define IT8671F_WRITE_DATA_PORT 0x0A79 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of * each line determine the address port, the last four are data. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h 2006-09-06 15:48:48 UTC (rev 2395) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h 2006-09-06 16:12:39 UTC (rev 2396) @@ -16,6 +16,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* Datasheet: http://www.datasheet4u.com/html/I/T/8/IT8673F_ITE.pdf.html */ +/* Status: untested on real hardware, but it compiles. */ + #define IT8673F_FDC 0x00 /* Floppy */ #define IT8673F_SP1 0x01 /* Com1 */ #define IT8673F_SP2 0x02 /* Com2 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h 2006-09-06 15:48:48 UTC (rev 2395) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h 2006-09-06 16:12:39 UTC (rev 2396) @@ -16,6 +16,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8712_2.asp */ +/* Status: untested on real hardware, but it compiles. */ + #define IT8712F_FDC 0x00 /* Floppy */ #define IT8712F_SP1 0x01 /* Com1 */ #define IT8712F_SP2 0x02 /* Com2 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-09-06 15:48:48 UTC (rev 2395) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-09-06 16:12:39 UTC (rev 2396) @@ -31,7 +31,7 @@ #define IT8712F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ #define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */ -#define IT8712F_CONFIGURATION_PORT 0x2E /* Write-only. */ +#define IT8712F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the * LDN the register belongs to, before you can access the register. */ Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb 2006-09-06 16:12:39 UTC (rev 2396) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/chip.h 2006-09-06 16:12:39 UTC (rev 2396) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8716F +#define _SUPERIO_ITE_IT8716F + +#include <pc80/keyboard.h> +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8716f_ops; + +struct superio_ITE_it8716f_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; + +#endif /* _SUPERIO_ITE_IT8716F */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h 2006-09-06 16:12:39 UTC (rev 2396) @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8716_2.asp */ +/* Status: untested on real hardware, but it compiles. */ + +#define IT8716F_FDC 0x00 /* Floppy */ +#define IT8716F_SP1 0x01 /* Com1 */ +#define IT8716F_SP2 0x02 /* Com2 */ +#define IT8716F_PP 0x03 /* Parallel port */ +#define IT8716F_EC 0x04 /* Environment controller */ +#define IT8716F_KBCK 0x05 /* Keyboard */ +#define IT8716F_KBCM 0x06 /* Mouse */ +#define IT8716F_MIDI 0x08 /* MIDI port */ +#define IT8716F_GAME 0x09 /* GAME port */ +#define IT8716F_IR 0x0a /* Consumer IR */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2006-09-06 16:12:39 UTC (rev 2396) @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8716f.h" + +/* The base address is 0x2e or 0x4e, depending on config bytes. */ +#define SIO_BASE 0x2e +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8716F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8716F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8716F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ +#define IT8716F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ +#define IT8716F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */ + +#define IT8716F_CONFIGURATION_PORT 0x2e /* Write-only. */ + +/* The content of IT8716F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8716f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8716F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8716F Super IO chip. */ +static void it8716f_enable_serial(device_t dev, unsigned iobase) +{ + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x2e. */ + /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ + /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ + outb(0x87, IT8716F_CONFIGURATION_PORT); + outb(0x01, IT8716F_CONFIGURATION_PORT); + outb(0x55, IT8716F_CONFIGURATION_PORT); + outb(0x55, IT8716F_CONFIGURATION_PORT); + + /* (2) Modify the data of configuration registers. */ + + /* Select the chip to configure (if there's more than one). + * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + * If this register is not written, both chips are configured. */ + /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CONFIGSEL, 0x00); */ + + /* Enable all devices. */ + it8716f_sio_write(IT8716F_FDC, 0x30, 0x1); /* Floppy */ + it8716f_sio_write(IT8716F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8716f_sio_write(IT8716F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8716f_sio_write(IT8716F_PP, 0x30, 0x1); /* Parallel port */ + it8716f_sio_write(IT8716F_EC, 0x30, 0x1); /* Environment controller */ + it8716f_sio_write(IT8716F_KBCK, 0x30, 0x1); /* Keyboard */ + it8716f_sio_write(IT8716F_KBCM, 0x30, 0x1); /* Mouse */ + it8716f_sio_write(IT8716F_MIDI, 0x30, 0x1); /* MIDI port */ + it8716f_sio_write(IT8716F_GAME, 0x30, 0x1); /* GAME port */ + it8716f_sio_write(IT8716F_IR, 0x30, 0x1); /* Consumer IR */ + + /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ + /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CLOCKSEL, 0x00); */ + + /* Clear software suspend mode (clear bit 0). TODO: Needed? */ + /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_SWSUSP, 0x00); */ + + /* (3) Exit the configuration state (MB PnP mode). */ + it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CC, 0x02); +} + Added: trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c 2006-09-06 16:12:39 UTC (rev 2396) @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <uart8250.h> +#include <pc80/keyboard.h> +#include "chip.h" +#include "it8716f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8716f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8716F_FDC: /* TODO. */ + break; + case IT8716F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8716F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8716F_PP: /* TODO. */ + break; + case IT8716F_EC: /* TODO. */ + break; + case IT8716F_KBCK: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + case IT8716F_KBCM: /* TODO. */ + break; + case IT8716F_MIDI: /* TODO. */ + break; + case IT8716F_GAME: /* TODO. */ + break; + case IT8716F_IR: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, EC, KBCM, MIDI, GAME, IR. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8716f_ops = { + CHIP_NAME("ITE it8716f") + .enable_dev = enable_dev, +}; +

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[LinuxBIOS] r2395 - trunk/LinuxBIOSv2/util/flashrom
by svn＠openbios.org 06 Sep '06

06 Sep '06

Author: stepan Date: 2006-09-06 17:48:48 +0200 (Wed, 06 Sep 2006) New Revision: 2395 Modified: trunk/LinuxBIOSv2/util/flashrom/flash_enable.c Log: Add patch from Uwe Hermann to support more ICH southbridges Modified: trunk/LinuxBIOSv2/util/flashrom/flash_enable.c =================================================================== --- trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-08-29 17:41:14 UTC (rev 2394) +++ trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-09-06 15:48:48 UTC (rev 2395) @@ -3,6 +3,7 @@ * * Copyright (C) 2000-2004 ??? * Copyright (C) 2005 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -76,43 +77,21 @@ return 0; } -static int enable_flash_e7500(struct pci_dev *dev, char *name) +static int enable_flash_ich(struct pci_dev *dev, char *name, int bios_cntl) { /* register 4e.b gets or'ed with one */ uint8_t old, new; + /* if it fails, it fails. There are so many variations of broken mobos * that it is hard to argue that we should quit at this point. */ - old = pci_read_byte(dev, 0x4e); + /* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but + * just treating it as 8 bit wide seems to work fine in practice. + */ - new = old | 1; - - if (new == old) - return 0; - - pci_write_byte(dev, 0x4e, new); - - if (pci_read_byte(dev, 0x4e) != new) { - printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", - 0x4e, new, name); - return -1; - } - return 0; -} - -enum { - ICH4_BIOS_CNTL = 0x4e, - /* see page 375 of "Intel ICH7 External Design Specification" - * http://download.intel.com/design/chipsets/datashts/30701302.pdf */ - ICH7_BIOS_CNTL = 0xdc, -}; -static int enable_flash_ich(struct pci_dev *dev, char *name, int bios_cntl) -{ - /* register 4e.b gets or'ed with one */ - uint8_t old, new; - /* if it fails, it fails. There are so many variations of broken mobos - * that it is hard to argue that we should quit at this point. + /* see ie. page 375 of "Intel ICH7 External Design Specification" + * http://download.intel.com/design/chipsets/datashts/30701302.pdf */ old = pci_read_byte(dev, bios_cntl); @@ -132,14 +111,14 @@ return 0; } -static int enable_flash_ich4(struct pci_dev *dev, char *name) +static int enable_flash_ich_4e(struct pci_dev *dev, char *name) { - return enable_flash_ich(dev, name, ICH4_BIOS_CNTL); + return enable_flash_ich(dev, name, 0x4e); } -static int enable_flash_ich7(struct pci_dev *dev, char *name) +static int enable_flash_ich_dc(struct pci_dev *dev, char *name) { - return enable_flash_ich(dev, name, ICH7_BIOS_CNTL); + return enable_flash_ich(dev, name, 0xdc); } static int enable_flash_vt8235(struct pci_dev *dev, char *name) @@ -382,12 +361,24 @@ } FLASH_ENABLE; static FLASH_ENABLE enables[] = { - {0x1039, 0x0630, "sis630", enable_flash_sis630}, - {0x8086, 0x2480, "E7500", enable_flash_e7500}, - {0x8086, 0x24c0, "ICH4", enable_flash_ich4}, - {0x8086, 0x24cc, "ICH4-M", enable_flash_ich4}, - {0x8086, 0x24d0, "ICH5", enable_flash_ich4}, - {0x8086, 0x27b8, "ICH7", enable_flash_ich7}, + {0x1039, 0x0630, "SIS630", enable_flash_sis630}, + {0x8086, 0x2410, "ICH", enable_flash_ich_4e}, + {0x8086, 0x2420, "ICH0", enable_flash_ich_4e}, + {0x8086, 0x2440, "ICH2", enable_flash_ich_4e}, + {0x8086, 0x244c, "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2480, "ICH3-S", enable_flash_ich_4e}, + {0x8086, 0x248c, "ICH3-M", enable_flash_ich_4e}, + {0x8086, 0x24c0, "ICH4/ICH4-L", enable_flash_ich_4e}, + {0x8086, 0x24cc, "ICH4-M", enable_flash_ich_4e}, + {0x8086, 0x24d0, "ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x2640, "ICH6/ICH6R", enable_flash_ich_dc}, + {0x8086, 0x2641, "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x27b8, "ICH7/ICH7R", enable_flash_ich_dc}, + {0x8086, 0x27b9, "ICH7M", enable_flash_ich_dc}, + {0x8086, 0x27bd, "ICH7MDH", enable_flash_ich_dc}, + {0x8086, 0x2810, "ICH8/ICH8R", enable_flash_ich_dc}, + {0x8086, 0x2812, "ICH8DH", enable_flash_ich_dc}, + {0x8086, 0x2814, "ICH8DO", enable_flash_ich_dc}, {0x1106, 0x8231, "VT8231", enable_flash_vt8231}, {0x1106, 0x3177, "VT8235", enable_flash_vt8235}, {0x1078, 0x0100, "CS5530", enable_flash_cs5530},

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[LinuxBIOS] Flashrom is not detecting 2MiB flash
by Alan Carvalho de Assis 06 Sep '06

06 Sep '06

Hi LinuxBIOS' hackers, I am trying to get a SST49LF160C (ID1=0xbf and ID2=0x4c) working on my MB (chipset VIA8237), but I get a strange error. If the flash_probe (probe_jedec) attempt to detect flash more than 512KB it don't get the flash IDs. Some time ago I see a Ron mail about MB can detect until 2MiB flash with no problem, but I don't know why it is not working them. I added these lines to flashchips.c: {"SST49LF160C", SST_ID, SST_49LF160C, NULL, 2048, 64 * 1024, probe_jedec, erase_chip_jedec, write_jedec, NULL}, Someone know why my MB doesn't detect flash it this size is more than 512MB? Look to flashrom output: diderot:/home/alan/LinuxBIOSv2/util/flashrom# ./flashrom -V Calibrating delay loop... Setting up microsecond timing loop 781M loops per second ok No LinuxBIOS table found. Enabling flash write on VT8235...OK Trying Am29F040B, 512 KB probe_29f040b: id1 0xbf, id2 0x4c Trying Am29F016D, 2048 KB probe_29f040b: id1 0xff, id2 0xff Trying At29C040A, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying AT49LH002, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying Mx29f002, 256 KB probe_29f002: id1 0xbf, id2 0x4c Trying SST29EE020A, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST28SF040A, 512 KB probe_28sf040: id1 0xbf, id2 0x4c Trying SST39SF020A, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST39VF020, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF040B, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF040, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF080A, 1024 KB probe_jedec: id1 0xff, id2 0xff Trying SST49LF160C, 2048 KB probe_jedec: id1 0xff, id2 0xff Trying SST49LF002A/B, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF003A/B, 384 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF004A/B, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying SST49LF008A, 1024 KB probe_jedec: id1 0xff, id2 0xff Trying Pm49FL004, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying W29C011, 128 KB probe_jedec: id1 0xbf, id2 0x4c Trying W29C020C, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying W49F002U, 256 KB probe_jedec: id1 0xbf, id2 0x4c Trying W39V040A, 512 KB probe_jedec: id1 0xbf, id2 0x4c Trying M29F040B, 512 KB probe_29f040b: id1 0xbf, id2 0x4c Trying M29F400BT, 512 KB probe_m29f400bt: id1 0xbf, id2 0xbf Trying 82802ab, 512 KB probe_82802ab: id1 0xbf, id2 0x4c Trying 82802ac, 1024 KB probe_82802ab: id1 0xff, id2 0xff Trying LHF00L04, 1024 KB probe_lhf00l04: id1 0xff, id2 0xff No EEPROM/flash device found. diderot:/home/alan/LinuxBIOSv2/util/flashrom# Cheers, -- ------------------------------------------------------------ | Alan Carvalho de Assis | ------------------------------------------------------------ -- Não importa o que os outros irão pensar, A cura para a infelicidade é a felicidade

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[LinuxBIOS] VGA bios and i/o access for powerpc
by jf simon 05 Sep '06

05 Sep '06

Hi, I have read the excellent paper on FreeVGA http://www.linuxbios.org/data/vgabios/ and I am thinking on using it on a powerpc design we have made based on IBM 970fx ppc64 CPU (after it runs linuxbios of course, but I am trying to plan ahead and see what is needed to have PCI graphic cards running on it). I have looked at the x86emu code, and more precisely to the X86EMU_pioFuncs function which is in charge of I/O accesses whenever the VGA BIOS makes an x86 int/out instruction to some I/O port (for example to the range of VGA control registers in the 0x3XX region). The graphic I intend to use is an ATI Radeon RV100 PCI card. So it looks like I will have to program the X86EMU_pioFuncs with a function that will redirect I/O accesses from the low 0x3XX addresses, to the ATI PCI I/O region that contains VGA registers. Here is an excerpt of an "lspci -vv" on my graphic card (see below). I am planning to re-direct all these I/O accesses to the region 1 (I/O ports at f4015000). The VGA registers have to be in there...where else? So it shouldn't be too hard. Am I overlooking things? The FreeVGA paper said he should be rather complicated to do on powerpc....so i may be to optimistic 02:01.0 VGA compatible controller: ATI Technologies Inc Radeon RV100 QY [Radeon) Subsystem: ATI Technologies Inc: Unknown device 013b Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Ste- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbor- Latency: 255 (2000ns min) Interrupt: pin A routed to IRQ 30 Region 0: Memory at 0000000080000000 (32-bit, prefetchable) Region 1: I/O ports at f4015000 [size=256] Region 2: Memory at 00000000a0000000 (32-bit, non-prefetchable) [size=6] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3ho) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Thanks a lot -jf simon ___________________________________________________________________________ Yahoo! Mail réinvente le mail ! Découvrez le nouveau Yahoo! Mail et son interface révolutionnaire. http://fr.mail.yahoo.com

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[LinuxBIOS] Why LinuxBIOS is Better <was LinuxBIOS on Laptops.>
by Bari Ari 05 Sep '06

05 Sep '06

Rogelio Serrano wrote: > On 9/3/06, Kevin Purcell <kevinpurcell(a)pobox.com> wrote: > >> (not a troll) >> >> What would be the selling point to the laptop maker of using LinuxBIOS? >> >> Why would they want LinuxBIOS rather than buying (and modifying) a >> solution from a commercial BIOS company and their CPU/chipset(s) >> suppliers? >> > > many things that go beyond the bios. you cant make an argument with > the bios alone. you have to show what an open bios would bring and > actually link that to higher sales. for example if it allows > ubiquitous computing where you would rather use your laptop instead of > pen and paper then that would be convincing. instant accessibility is > a very big thing now. <snip> ... if your pc can bootup in 3 seconds > that changes a whole lot of things. Some selling points might include: LinuxBIOS is a much lower cost solution than commercial BIOSes. LinuxBIOS has no royalty fees, no cost for source or software development tools. LinuxBIOS is technically superior to commercial BIOSes. LinuxBIOS is written almost entirely in C. LinuxBIOS operates mainly in 32 bit mode. LinuxBIOS offers faster boot times than commercial BIOSes. LinuxBIOS has lower complexity than commercial BIOSes. LinuxBIOS has lower latencies than commercial BIOSes. LinuxBIOS is far better at detecting and configuring hardware than commercial BIOSes. LinuxBIOS can load a kernel over any device, network, protocol, and file system that Linux supports. LinuxBIOS supports low level cryptographic support for strong pre-boot authentication, secure remote console support and secure configuration management. LinuxBIOS is easier to develop than commercial BIOSes. LinuxBIOS is easier to maintain than commercial BIOSes. LinuxBIOS is released under GPL. LinuxBIOS is more fun, does not cause cancer and allows you to sleep at night. (feel free for anyone else to chime in here) Commercial BIOSes have royalty fees, high costs for source and software development tools. Commercial BIOSes are mostly written in assembler, operate mostly in 16 bit mode, and provides services that few modern 32 bit operating systems require. Commercial BIOSes have long boot times. Commercial BIOSes are complex and have long latencies. The ACL team found that commercial BIOSes do a poor job of setting up a PC for modern OSes. They found: Commercial BIOSes configure memory in a suboptimal way. For example, some BIOSes were discovered to use memory capable of CAS2 speeds at a much slower CAS3 setting. Commercial BIOSes incorrectly configured PCI address spaces that opened up security holes when memory-mapped cards (e.g. Myrinet) were used. Commercial BIOSes had suboptimal assignments of interrupt requests. Some BIOSes were found to share IRQs between multiple devices when such sharing was not required. This sharing of IRQs added latency upon interrupts needlessly. Commercial BIOSes incorrectly configured BIOS tables such as the $PIR table, so that the critical information Linux needs for IRQ assignment was not available. So pervasive are some of the errors that they have impacted the Linux 2.4.19 kernel; in this version, GEODE IRQ setup was changed, incorrectly, to accommodate some broken motherboards. Commercial BIOSes had incorrect ID strings, for example the string``Mainboard vendor name here'' was in the BIOS instead of the mainboard vendor name. Commercial BIOSes had no way to upgrade the BIOS from a modern OS (some vendors shipped DOS diskettes for a BIOS upgrade; others required that you boot a Windows 3.1 CD and run an upgrade program). Commercial BIOSes had no way to preserve CMOS settings when a BIOS is upgraded (one vendor recommended we record the settings on paper and then re-enter them for each machine; a difficult task on a 960-node system with no keyboard or console). Commercial BIOSes also have structural problems that derive from therequirements for supporting DOS. One of these is the requirement that the BIOS zero memory. This requirement makes postmortem debugging virtually impossible, as a reset results in erasing the memory image of the previously running operating system. Commercial BIOSes also have problems accommodating custom built hardware, and can take considerable time to boot. Commercial BIOS bugs or errors are almost impossible to fix. (feel free for anyone else to chime in here again) Bari

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Re: [LinuxBIOS] LinuxBIOS on Laptops.
by Bari Ari 05 Sep '06

05 Sep '06

Guido Fiala wrote: > In the age of USB i wonder if we still need a keyboard/mouse controller for > other than that. > > How would a (linux) mainboard look like? Is there a parts list, e.g. one for > desktop, one for laptop that would be great? > > Look for laptops that have the firmware Flash write enable lines controlled only by the chipset and not also by the keyboard/system management controller. This will allow a developer to rewrite the Flash with LinuxBIOS. Most efforts to port LinuxBIOS on laptops in the past could not get past this hurdle. Designing and manufacturing for a laptop for mass market using LinuxBIOS is simple. The bill of material and hardware design are the same as a laptop using a closed source BIOS. Laptop mainboards are typically manufactured in high volumes in single runs (much the same as desktop/platform mainboards). The LinuxBIOS would be developed for the mainboard during the design stage of the project and then programmed into the flash before manufacture or after the flash devices are installed on the boards. There hasn't been much demand for laptops to have LinuxBIOS yet. The first major project to demand LinuxBIOS on a laptop has probably been the OLPC project. I doubt if Quanta had much experience with or knowledge of LinuxBIOS before OLPC. The keyboard scan/system management controllers also use closed source firmware. Multikey is one example. It is used for port swap and hot plug of keyboard and mouse, power management, battery charging, Flash-BIOS control, SMbus, Gate A20, Security, hotkeys, etc. Renesas is one vendor of micros that are used in laptops: http://america.renesas.com/fmwk.jsp?cnt=h8s_family_landing.jsp&fp=/products… For more Multikey info: http://www.phoenix.com/NR/rdonlyres/B9F4AEFF-EF92-4A45-B304-161FF728EFDC/0/… Bari

2 1

[LinuxBIOS] LinuxBIOS on a SIS 650 / SIS 691 laptop?
by Uwe Hermann 05 Sep '06

05 Sep '06

Hi, I have a test-laptop I'm going to try to port LinuxBIOS to. It's a SIS 650 / SIS 691 based system which is probably not so good, as SIS doesn't seem to be very cooperative when asked for datasheets, AFAIK. The good news is that the laptop has a PLCC chip in a socket. I'm currently trying to find out what parts I can get working... The Super IO (PC87393) shouldn't be a problem (yes, the laptop has a serial port, fortunately). Using flashrom doesn't work as there's no support for the SIS 650/691. I tried using the SIS 630/950 code, but that fails... Does anybody have datasheets for these parts? I'll definately bring the laptop to the LinuxBIOS summit for hacking purposes... Uwe. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

3 2

[LinuxBIOS] IT8718F support.
by Uwe Hermann 04 Sep '06

04 Sep '06

Hi, here's some code for the IT8718F. Untested, but compiles. Please also checkin my patch at http://www.linuxbios.org/pipermail/linuxbios/2006-August/015412.html I think that got overlooked (or is there a technical problem with it?). Btw, is the code for the Super IOs supposed to initialize/enable _all_ supported devices or merely COM1/COM2 and the rest gets enabled later on? U "I read ITE datasheets when I'm bored" we. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

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Re: [LinuxBIOS] Enabling USB 2.0
by Lu, Yinghai 03 Sep '06

03 Sep '06

You can not boot from sata on ck804, the reason is that the sata controller can not work on compatible mode. If you real want to boot from SATA 1. you need to porting driver from kernel to FILO_IN_ETHERBOOT to make use simple scsi interface to access the sata disk. 2. or easy way is boot one tiny kernel ( with ck804 sata support and kexec support) from IDE(FILO, Etherboot), USB(FILO_IN_ETHERBOOT), Network(Etherboot) and use kexec tools to boot the kernel on your SATA disk. Current USB IRQ setting in LinuxBIOS should be good enough to make use device working. Please make sure setting on mptable.c is right. Also you may need to set apic for kernel to enable io-apic to be used. YH ________________________________ From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Anil B G Sent: Friday, September 01, 2006 8:40 AM To: Jonathan Sturges Cc: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] Enabling USB 2.0 Thanks. I plan to boot from SATA and not from USB. Do any other boards supported by LinuxBIOS (whose source is available in the source tree) bringup USB that I could use as a reference? On 9/1/06, Jonathan Sturges <jsturges(a)speakeasy.net> wrote: Anil B G wrote: > Hi, > I am trying to enable USB on a board similar to Tyan s2892 (CK804) > chipset? > Is there anything that else that needs to be done separately other > than setting the irqs et al correctly? Specifically do we need to > write some sort of a driver to enable the USB host controller. > > Thanks > Anil Assuming you don't hope to boot from USB, all you really should need is to setup the IRQ map, AFAIK. Then the Linux kernel will detect it and be able to attach the appropriate driver. -Jonathan

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[LinuxBIOS] IT8705F (and IT8705FA) support.
by Uwe Hermann 03 Sep '06

03 Sep '06

Hi, you know the drill... patch attached. Uwe. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

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coreboot September 2006