coreboot October 2006

coreboot@coreboot.org

53 participants
208 discussions

Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804
by Lu, Yinghai 13 Oct '06

13 Oct '06

or define PAYLOAD_NORMAL and PAYLOAD_FALLBACK in all target Config.lb and abuild could use it. YH -----Original Message----- From: Stefan Reinauer [mailto:stepan@coresystems.de] Sent: Friday, October 13, 2006 4:50 PM To: Lu, Yinghai Cc: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804 * Lu, Yinghai <yinghai.lu(a)amd.com> [061014 01:23]: > That is a lot of cut and paste... Or we detect it automatically from the code. How? Non-x86 based boards only have 1 Image, all others have Normal+Fallback, unless Config-abuild.lb is specified. Now how are we going to find out which is using which..? Or should we just go Config-abuild.lb for now and do it correctly in v3 instead? You choose, but in the end we need to come out with working v2 images. > > -----Original Message----- > From: Stefan Reinauer [mailto:stepan@coresystems.de] > Sent: Friday, October 13, 2006 3:58 PM > To: Lu, Yinghai > Cc: linuxbios(a)linuxbios.org > Subject: Re: [LinuxBIOS] r2455 - > trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804 > > * Lu, Yinghai <yinghai.lu(a)amd.com> [061014 00:13]: > > Actually the s2895 need CK804_DEVN_BASE to be set for failover > building. > > > > But the Config.lb that is created by abuild doesn't failover section. > So > > that compile error slipped out. > > ouch. 3 images solution. Can we migrate all boards to use that? > > Or could you add a Config-abuild.lb for those boards that do require it? > > > > The code is in my own tree. > > sorry which code are you referring to? > > -- > coresystems GmbH * Brahmsstr. 16 * D-79104 Freiburg i. Br. > Tel.: +49 761 7668825 * Fax: +49 761 7664613 > Email: info(a)coresystems.de * http://www.coresystems.de/ > > > > > -- coresystems GmbH * Brahmsstr. 16 * D-79104 Freiburg i. Br. Tel.: +49 761 7668825 * Fax: +49 761 7664613 Email: info(a)coresystems.de * http://www.coresystems.de/

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Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804
by Lu, Yinghai 13 Oct '06

13 Oct '06

That is a lot of cut and paste... YH -----Original Message----- From: Stefan Reinauer [mailto:stepan@coresystems.de] Sent: Friday, October 13, 2006 3:58 PM To: Lu, Yinghai Cc: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804 * Lu, Yinghai <yinghai.lu(a)amd.com> [061014 00:13]: > Actually the s2895 need CK804_DEVN_BASE to be set for failover building. > > But the Config.lb that is created by abuild doesn't failover section. So > that compile error slipped out. ouch. 3 images solution. Can we migrate all boards to use that? Or could you add a Config-abuild.lb for those boards that do require it? > The code is in my own tree. sorry which code are you referring to? -- coresystems GmbH * Brahmsstr. 16 * D-79104 Freiburg i. Br. Tel.: +49 761 7668825 * Fax: +49 761 7664613 Email: info(a)coresystems.de * http://www.coresystems.de/

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Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804
by Lu, Yinghai 13 Oct '06

13 Oct '06

Actually the s2895 need CK804_DEVN_BASE to be set for failover building. But the Config.lb that is created by abuild doesn't failover section. So that compile error slipped out. The code is in my own tree. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Stefan Reinauer Sent: Friday, October 13, 2006 3:05 PM To: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804 * svn(a)openbios.org <svn(a)openbios.org> [061013 23:48]: > Author: yhlu > Date: 2006-10-13 23:48:38 +0200 (Fri, 13 Oct 2006) > New Revision: 2455 > > Modified: > trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c > Log: > s2895 failover build What is this good for? > Modified: trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c > =================================================================== > --- trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c 2006-10-13 20:10:09 UTC (rev 2454) > +++ trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c 2006-10-13 21:48:38 UTC (rev 2455) > @@ -2,8 +2,12 @@ > * Copyright 2004 Tyan Computer > * by yhlu(a)tyan.com > */ > +#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE > + #define CK804_DEVN_BASE HT_CHAIN_END_UNITID_BASE > +#else > + #define CK804_DEVN_BASE HT_CHAIN_UNITID_BASE > +#endif -- coresystems GmbH * Brahmsstr. 16 * D-79104 Freiburg i. Br. Tel.: +49 761 7668825 * Fax: +49 761 7664613 Email: info(a)coresystems.de * http://www.coresystems.de/ -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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[LinuxBIOS] r2455 - trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804
by svn＠openbios.org 13 Oct '06

13 Oct '06

Author: yhlu Date: 2006-10-13 23:48:38 +0200 (Fri, 13 Oct 2006) New Revision: 2455 Modified: trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c Log: s2895 failover build Modified: trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c 2006-10-13 20:10:09 UTC (rev 2454) +++ trunk/LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_enable_rom.c 2006-10-13 21:48:38 UTC (rev 2455) @@ -2,8 +2,12 @@ * Copyright 2004 Tyan Computer * by yhlu(a)tyan.com */ +#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE + #define CK804_DEVN_BASE HT_CHAIN_END_UNITID_BASE +#else + #define CK804_DEVN_BASE HT_CHAIN_UNITID_BASE +#endif - static void ck804_enable_rom(void) { unsigned char byte;

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Re: [LinuxBIOS] sunw ultra40
by Lu, Yinghai 13 Oct '06

13 Oct '06

Before I can released the code, I was instructed to remove these comments by management or vendor. Maybe we need to change enable_serial to enable_dev? YH -----Original Message----- From: Ronald G Minnich [mailto:rminnich@lanl.gov] Sent: Friday, October 13, 2006 2:10 PM To: Ronald G Minnich Cc: Lu, Yinghai; LinuxBIOS Subject: Re: [LinuxBIOS] sunw ultra40 ok, are the workings of this function a Deep Secret or can we add comments? static void sio_setup(void) { unsigned value; uint32_t dword; uint8_t byte; pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400); byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b); byte |= 0x20; pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte); dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0); dword |= (1<<29)|(1<<0); pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword); #if 1 lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE); value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77); value &= 0xbf; lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value); #endif } Also, in this function, this happens: lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE); but in the real main this happens: lpc47b397_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); So the sio_setup, to me, looks bogus. Why would enable_serial use the GPIO dev and BASE? What's up here? ron

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Re: [LinuxBIOS] sunw ultra40
by Lu, Yinghai 13 Oct '06

13 Oct '06

That is for extra GPIO manuipulation on SuperIO to enable FAN or disable watchdog. So you need open one window on SB, But ultra 40 donesn't need it. YH -----Original Message----- From: Ronald G Minnich [mailto:rminnich@lanl.gov] Sent: Friday, October 13, 2006 2:04 PM To: Lu, Yinghai Cc: LinuxBIOS Subject: Re: [LinuxBIOS] sunw ultra40 Lu, Yinghai wrote: > Are you sure? > > You just changed failover.c and if USE_DCACHE_RAM=1, only > cache_as_ram_auto.c is used. oops. I am still getting the hang of all this. Sorry. I still don't see how your serial setup ever worked ... you were enabling the runtime registers but then changing settings in the SP1 registers. Back to school for me! ron

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Re: [LinuxBIOS] sunw ultra40
by Lu, Yinghai 13 Oct '06

13 Oct '06

Are you sure? You just changed failover.c and if USE_DCACHE_RAM=1, only cache_as_ram_auto.c is used. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ronald G Minnich Sent: Friday, October 13, 2006 12:54 PM To: LinuxBIOS Subject: [LinuxBIOS] sunw ultra40 is here: LinuxBIOS-1.1.8_ultra40_Fallback Thu Sep 7 15:20:31 MDT 2006 starting... (0,1) link=00 (1,0) link=02 02 so, any hints welcome, I am going back to see what might be up. thanks ron -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] DK8-HTX Etherboot compile errors SOLVED
by Lu, Yinghai 13 Oct '06

13 Oct '06

Then go to try GCC 4.1 with FILO standalone. YH -----Original Message----- From: Chris Stillo [mailto:cstillo@comcast.net] Sent: Friday, October 13, 2006 1:27 PM To: Lu, Yinghai Cc: yhlu; Stefan Reinauer; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] DK8-HTX Etherboot compile errors SOLVED I did not notice a delay -- so maybe 1 sec. > It took how many second to find the IDE? 45s or 1s? > > YH > > > > >

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Re: [LinuxBIOS] Tyan s2892 the OLPC way
by Lu, Yinghai 13 Oct '06

13 Oct '06

Boot log? YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Myles Watson Sent: Friday, October 13, 2006 12:50 PM To: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] Tyan s2892 the OLPC way > > > I think the error is something different. I can mount my USB key that I > > formatted ext2, but when I try /dev/hda1 instead of /dev/sda1, it says > > Unknown error 6, which is "no such device or address". > > > > Forgive if you have done this already Just trying to cover all the > simple fixes first. Have you verified that you really have IDE > devices enabled in your kernel? No problem, I appreciate the help I have CONFIG_IDE CONFIG_BLK_DEV_IDE CONFIG_IDE_GENERIC All enabled. I couldn't find any others that made sense to me. Myles -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] DK8-HTX Etherboot compile errors SOLVED
by Lu, Yinghai 13 Oct '06

13 Oct '06

It took how many second to find the IDE? 45s or 1s? YH

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coreboot October 2006