Re: [LinuxBIOS] sunw ultra40

[Lu, Yinghai]

Are you sure?

You just changed failover.c and if USE_DCACHE_RAM=1, only
cache_as_ram_auto.c is used.

YH

-----Original Message-----
From: [e-mail]
[mailto:[e-mail]] On Behalf Of Ronald G Minnich
Sent: Friday, October 13, 2006 12:54 PM
To: LinuxBIOS
Subject: [LinuxBIOS] sunw ultra40

is here:

LinuxBIOS-1.1.8_ultra40_Fallback Thu Sep  7 15:20:31 MDT 2006
starting...
(0,1) link=00
(1,0) link=02
02

so, any hints welcome, I am going back to see what might be up.

thanks

ron

[LinuxBIOS] sunw ultra40

[Ronald G Minnich]

Lu, Yinghai wrote:
> Are you sure?
>
> You just changed failover.c and if USE_DCACHE_RAM=1, only
> cache_as_ram_auto.c is used.

oops. I am still getting the hang of all this. Sorry.

I still don't see how your serial setup ever worked ... you were 
enabling the runtime registers but then changing settings in the SP1 
registers.

Back to school for me!

ron

[LinuxBIOS] sunw ultra40

[Ronald G Minnich]

ok, are the workings of this function a Deep Secret or can we add comments?

static void sio_setup(void)
{

unsigned value;
         uint32_t dword;
         uint8_t byte;

pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 
0x047f0400);

byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b);
         byte |= 0x20;
         pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);

dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<29)|(1<<0);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);

#if  1
         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);

value =  lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77);
         value &= 0xbf;
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value);
#endif

}

Also, in this function, this happens:
         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);

but in the real main this happens:
    lpc47b397_enable_serial(SERIAL_DEV, TTYS0_BASE);
         uart_init();
         console_init();

So the sio_setup, to me, looks bogus. Why would enable_serial use the 
GPIO dev and BASE?

What's up here?

ron