coreboot March 2005

coreboot@coreboot.org

51 participants
93 discussions

[LinuxBIOS] Offtopic: Datasheet for VIA VT8237 southbridge and CLE266 northbridge
by ramesh bios 29 Mar '05

29 Mar '05

Hi guys, I've been googling for the VIA VT8237 southbridge and the CLE266 datasheets. No luck so far. About to mail their support email address. Hopefully I'll get register specs rather than a marketing brochure. Anyone happen to have this info and/or suggestions on how to get it quickly? Please feel free to mail me privately. Thanks. __________________________________ Do you Yahoo!? Yahoo! Small Business - Try our new resources site! http://smallbusiness.yahoo.com/resources/

2 1

[LinuxBIOS] Re: NSC sc1100 port
by Peter Stuge 29 Mar '05

29 Mar '05

On Tue, Mar 29, 2005 at 01:44:39PM +0800, William J Beksi wrote: > Has anyone ported or working on porting the National Semicondutor > sc1100 cpu? There has been work made in the freebios tree (often called v1) to support scx200s, check out the nano mainboard, but I'm not sure what the differences between x200 and x100 are. //Peter

1 0

[LinuxBIOS] [PATCH] amd8131 print secondary bus mode/frequency
by Tao Liu 28 Mar '05

28 Mar '05

Hello, this patch prints the secondary bus mode/frequency during amd8131 init process, maybe this can help users to configure PCI-X mode/frequency jumpers. --- freebios2-20050305-0000-orig/src/southbridge/amd/amd8131/amd8131_bridge.c 2004-10-21 18:44:04.000000000 +0800 +++ freebios2-20050305-0000/src/southbridge/amd/amd8131/amd8131_bridge.c 2005-03-29 10:18:19.000000000 +0800 @@ -76,6 +76,28 @@ dword |= (1<<1); pci_write_config32(dev, 0xc8, dword); } + + /* Print Secondary Bus frequency */ + dword = pci_read_config32(dev, 0xa0); + dword = ((dword >> 22) & 0x7); + printk_debug("Secondary bus mode: "); + switch (dword) { + case 0: + printk_debug("Conventional PCI\n"); + break; + case 1: + printk_debug("66MHz PCI-X\n"); + break; + case 2: + printk_debug("100MHz PCI-X\n"); + break; + case 3: + printk_debug("133MHz PCI-X\n"); + break; + default: + printk_debug("Unknown\n"); + break; + } return; } -- Liu Tao

1 0

[LinuxBIOS] Re: Error in compiling STPC Consumer
by Kevin O'Connor 28 Mar '05

28 Mar '05

On Thu, Mar 24, 2005 at 08:54:18AM -0700, Eric W. Biederman wrote: > All you have to do is not tell romcc it has mmx or sse registers. > For a modern memory controller that gets awfully tight but for a > simpler memory controller it should be doable, to make everything > fit. I almost had the Opteron memory controller working in just 8 > registers. Just out of curiosity, would getting romcc to work in 64bit mode be worthwhile? It would give the compiler access to eight additional 64 bit registers.. -Kevin

2 1

[LinuxBIOS] Any MB with smsc DME1737?
by yhlu 28 Mar '05

28 Mar '05

I hope someone can test my code about that. YH

1 0

[LinuxBIOS] Happy Easter
by ebiederman＠lnxi.com 27 Mar '05

27 Mar '05

1 0

[LinuxBIOS] testing
by Ronald G. Minnich 25 Mar '05

25 Mar '05

ron

1 0

[LinuxBIOS] cutting over
by Ronald G. Minnich 24 Mar '05

24 Mar '05

I'm now cut over :-) ron

1 0

[LinuxBIOS] Re: .bin final size [was: Error in compiling STPC Consumer]
by Peter Stuge 24 Mar '05

24 Mar '05

(Is @clustermatic.org still working?) On Thu, Mar 24, 2005 at 08:01:09AM -0700, Ronald G. Minnich wrote: > On Thu, 24 Mar 2005, Richard Smith wrote: > > On Thu, 24 Mar 2005 05:54:17 +0000 (GMT), Ramesh Chhaba > > <ourlinuxid(a)yahoo.co.in> wrote: > > > But I want to make my romimage within 256KB > > > > > > So what options I acn change to do that > > > currently my image is 356 (approx) KB > > > > PAY_LOAD_SIZE is not a maximum size. its the blocksize option > > thats used in the 'dd' statemnet that copies the payload into a > > file. So 64k is the minimum it will be but it could be 128k, > > 192k, 256k, etc. > > > > Make your ROM_SIZE be the size you want the image - payload size. > > You can see all the magic for this in the makefile that the > > config tool generates. I remember I had to tweak with my numbers > > till I got to to come out the right size. > > this is a clear FAQ entry. I wish I understood it better, I guess I should take a look at the Makefile.. //Peter

3 3

[LinuxBIOS] Re: Notebook 340s2 (sis630) 256k Flash
by Peter Stuge 24 Mar '05

24 Mar '05

On Thu, Mar 24, 2005 at 08:55:57AM -0600, Richard Smith wrote: > It means that the 87570 may have control of the write enable line > on the flash. If its not asserted no writes to the flash will be > possible unless you pull the chip. I got the impression that he tested the first flash with an external programmer, although it would certainly be nice to add support for the system to flash_rom. //Peter

1 0

← Newer
1
2
3
4
5
6
7
8
9
10
Older →

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot March 2005