Hi all ,
I want any simulator that i can use as virtual machine to test my romimage without burning it in to actual chip.
I there is any such software or alternative .
Thank you
Ramesh Chander
Yahoo! India Matrimony: Find your life partneronline.
I noticed that, unlike, some of the other
northbridge/southbridge code, the cs5530 code doesn't
do an rtc_init(0). I added that and that now allows me
to set the date. But... I still have weirdness going
on:
RTC Init
RTC: Checksum invalid zeroing cmos
Invalid CMOS LB checksum
So now I'm in the process of reading the rtc_init
code, looking at the board (I know now that my
w83977AF is connected to a 32.768kHz oscillator) and
then figuring out what all the settings mean. That is,
stuff like below. I'm not sure whether the defaults
are good for any board or if they need to be
customized. I guess I'll be finding this out
iteratively.
/* control registers - Moto names
*/
#define RTC_REG_A 10
#define RTC_REG_B 11
#define RTC_REG_C 12
#define RTC_REG_D 13
#define RTC_FREQ_SELECT RTC_REG_A
#define RTC_CONTROL RTC_REG_B
#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ |
RTC_RATE_1024HZ)
--- Peter Stuge <stuge-linuxbios(a)cdy.org> wrote:
> On Tue, Mar 29, 2005 at 07:28:00PM -0800, ramesh
> bios wrote:
> > I'm using the freebios v1 tree on a geode
> > gx1/cs5530a/w83977 with 2.6.11. I noticed that
> there
> > appears to be problem with writing to the RTC
> using
> > hwclock. I seem to be able to use hwclock to set
> the
> > time but not the date. That is:
>
> There are a few bits in the 5530 at page 107 in the
> data sheet
> regarding the RTC, but I doubt the RTC would be
> reachable at all if
> they weren't ok.
>
> I just went over the RTC part of the W83977F data
> sheet too and it
> seems to have a couple of control bits that may have
> to be tweaked
> to get proper operation. I don't remember if anyone
> else has had
> similar problems with that superio.
>
> Besides timing, the only other explanation I can
> think of is that
> since time is stored in RTC registers 00h, 02h and
> 04h, date of month
> in 07h and month/year in 08h-09h, if address bit 3
> wasn't connected
> properly then the date registers would be
> unreachable, but then you
> should see some connection between time and date, so
> lack of proper
> initialization or possibly a timing issue is my
> guess..
>
>
> //Peter
>
> _______________________________________________
> LinuxBIOS mailing list
> LinuxBIOS(a)openbios.org
> http://www.openbios.org/mailman/listinfo/linuxbios
>
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Eric,
the code in raminit.c is_opteron will treat my athlon 64 (939) as Opteron
too.
YH
static int is_opteron(const struct mem_controller *ctrl)
{
/* Test to see if I am an Opteron.
* FIXME Testing dual channel capability is correct for now
* but a beter test is probably required.
*/
#warning "FIXME implement a better test for opterons"
uint32_t nbcap;
nbcap = pci_read_config32(ctrl->f3, NORTHBRIDGE_CAP);
return !!(nbcap & NBCAP_128Bit);
}
I'm using the freebios v1 tree on a geode
gx1/cs5530a/w83977 with 2.6.11. I noticed that there
appears to be problem with writing to the RTC using
hwclock. I seem to be able to use hwclock to set the
time but not the date. That is:
# date
Wed Mar 30 09:16:11 IST 2005
# hwclock
Mon Jan 10 08:56:16 2005 0.000000 seconds
# hwclock -w
# hwclock
Tue Jan 11 09:16:21 2005 0.000000 seconds
I noticed that the date went to Jan 11 while the time
was updated correctly. When I switch back to the
vendor BIOS, this issue goes away. I'm not yet sure
what to suspect. I'll go look at the kernel's rtc code
for writing to the CMOS since it would appear that it
can set the time but not the date for some reason. If
anyone has any suggestions, please let me know.
Thanks.
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Hi All ,
I am trying to understand the boot sequence of PC BIOS
I have got an rough idea it is as follows
1. system power up and fetch up first from ffffff0 addr.
2. there is a near jump to code to get system in to flat or protected mode
3. then we can jump to further secod stage bootloader after neccessary HW init.
Plz Somebody correct it and explain it in detail .
Second thing
My BIOS image is ok abt 10 KB (suppose)
and i have chip of 256KB So my image is like this
------------------------- lower most address(00000)
Second stage bootloader :
Protected mode init code :
Basic HW init Code :
..ffff0 jmp instruction to Basic HW init code( at bottom )
--------------------------- uppermost address(ffff...)
(Fig is reversed as per normal figures in books for memory )
And I want to know where to place this small code in BIG chip
---------------------Chip start addr
where to place my code in it ???
----------------------chip end addr
I think start and end of both will be in same direction so it may be like this
--------------------------lowest address for chip
(free space with ff ff)
------------------------- lower most address(00000)
Second stage bootloader :
Protected mode init code :
Basic HW init Code :
..ffff0 jmp instruction to Basic HW init code( at bottom )
--------------------------- uppermost address(ffff...) both for chip and code
Plz comment and correct above information .
Thank you
Ramesh Chander
Yahoo! India Matrimony: Find your life partneronline.
* Peter.VanEchaute(a)bench.com <Peter.VanEchaute(a)bench.com> [050329 23:20]:
> I am not a guru on the topic of ACIP or APIC. I am attempting to make a stab
> at it and had a question about the file
>
> src/mainboard/island/aruma/dsdt.c
>
> My question is how was it created?
Using iasl, intel's aml compiler.
Stefan
>
> I'm assuming then that the linuxbios->freebios->devel-2.0 is the most up
> to date, and that I should use that one as the official one.
>
> Is this correct?
Yes. freebios--devel--2.0 freebios2 is where your tree should come from.
It may not necessarly be the most up to date. But its headed that
way. One of the reasons to move to tla was because every one has
thier own tree and tla makes syncing and managing those individual
trees easier. There are one or 2 tree syncs in progress. I don't
think any of them affect the emulator itself just how it may be
called.
Its the official tree now and if you fix that one then everyone else
can diff and come into line.
--
Richard A. Smith