coreboot January 2005

coreboot@coreboot.org

43 participants
155 discussions

RE: Enable apic ext id to use 256 apic id for AMD64
by YhLu 10 Jan '05

10 Jan '05

I changed that for all tyan, amd, and arima MB. YH -----Original Message----- From: YhLu Sent: Monday, January 10, 2005 2:28 PM To: Li-Ta Lo Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen; discuss(a)x86-64.org; jamesclv(a)us.ibm.com; suresh.b.siddha(a)intel.com; Matt Domsch Subject: RE: Enable apic ext id to use 256 apic id for AMD64 OK. -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Monday, January 10, 2005 2:16 PM To: YhLu Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen; discuss(a)x86-64.org; jamesclv(a)us.ibm.com; suresh.b.siddha(a)intel.com; Matt Domsch Subject: RE: Enable apic ext id to use 256 apic id for AMD64 On Mon, 2005-01-10 at 15:18, YhLu wrote: > Please refer s4882 to change the MB that you support. > > nodeid = lapicid() & 0xf; > > orm with initial apic id > nodeid = (cpuid_ebx(1) >> 24) & 0xf; > > Can you do that to the s2885 for me? I am busy working on the VGABIOS support and have to brain for that. Ollie _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: Enable apic ext id to use 256 apic id for AMD64
by YhLu 10 Jan '05

10 Jan '05

OK. -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Monday, January 10, 2005 2:16 PM To: YhLu Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen; discuss(a)x86-64.org; jamesclv(a)us.ibm.com; suresh.b.siddha(a)intel.com; Matt Domsch Subject: RE: Enable apic ext id to use 256 apic id for AMD64 On Mon, 2005-01-10 at 15:18, YhLu wrote: > Please refer s4882 to change the MB that you support. > > nodeid = lapicid() & 0xf; > > orm with initial apic id > nodeid = (cpuid_ebx(1) >> 24) & 0xf; > > Can you do that to the s2885 for me? I am busy working on the VGABIOS support and have to brain for that. Ollie

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RE: Enable apic ext id to use 256 apic id for AMD64
by YhLu 10 Jan '05

10 Jan '05

Please refer s4882 to change the MB that you support. nodeid = lapicid() & 0xf; orm with initial apic id nodeid = (cpuid_ebx(1) >> 24) & 0xf; YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Monday, January 10, 2005 1:24 PM To: YhLu Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen; discuss(a)x86-64.org; jamesclv(a)us.ibm.com; suresh.b.siddha(a)intel.com; Matt Domsch Subject: Re: Enable apic ext id to use 256 apic id for AMD64 On Fri, 2005-01-07 at 14:35, YhLu wrote: > Stefan, > > Please check out the code from the CVS code. > > After LinuxBIOS keeps the bsp to still use apicid 0. Kernel (2.6.10) x86-64 > can work well. > > Andi suggest that. But I wonder why the normal BIOS (kernel with acpi > enabled) can lift that to 0x10. --- normal BIOS (kernel with acpi disabled) > will fail too. > YhLU, You change the cpu_init_detected(void) to cpu_init_detected(nodeid), what should I put in the nodeid? You break EVERY K8 mainboard we have. Ollie

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Enable apic ext id to use 256 apic id for AMD64
by YhLu 10 Jan '05

10 Jan '05

Stefan, Please check out the code from the CVS code. After LinuxBIOS keeps the bsp to still use apicid 0. Kernel (2.6.10) x86-64 can work well. Andi suggest that. But I wonder why the normal BIOS (kernel with acpi enabled) can lift that to 0x10. --- normal BIOS (kernel with acpi disabled) will fail too. I also CC the kernel guys relating to this. YH -----Original Message----- From: YhLu Sent: Wednesday, January 05, 2005 12:43 PM To: Ronald G. Minnich; Stefan Reinauer Cc: linuxbios(a)clustermatic.org Subject: RE: mptable.c Enable apic ext id committed. Changes Auto.c nodeid = lapicid() & 0xf; #if ENABLE_APIC_EXT_ID == 1 enable_apic_ext_id(nodeid); lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID) | (APIC_ID_OFFSET<<24) ) ); // CPU apicid is from 0x10 #endif if (cpu_init_detected(nodeid)) { asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(nodeid); also reset_test.c change cpu_init_detected and distinguish_cpu_resets to take node id. YH

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work linuxbios with openbios
by zhu shi song 10 Jan '05

10 Jan '05

How to use linuxbios together with openbios? Is there any clear howto doc? What's the main purpose of openbios? What's the main difference between openbios and filo? Now I'm using filo to boot my linux kernel. tks zhu __________________________________ Do you Yahoo!? The all-new My Yahoo! - Get yours free! http://my.yahoo.com

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LinuxBIOS on the Intel 9IGLM motherboard
by Csányi Pál 10 Jan '05

10 Jan '05

Hi! I have the motherboard 9IGLM with Intel 845GL chipset. I know that this motherboard is not supported by LinuxBIOS (am I right?) but I ask you: what would be happen, if I would update the flash EPROM with LinuxBIOS? I run on my PC the MS Win2000 and Debian GNU/Linux Woody. And I have one more question: memtest86 v3.1 says: Unexpected Interrupt - Halting Errors: 261 905 Type: Gen_Prot I configured the memtest: Cache Mode: Always On Test Selection: All Tests Address Range: Test All Memory Memory Sizing: BIOS - All If in the configuration the Memory Sizing: BIOS - is not All, then the memtest not reports errors. Is my BIOS then defective or not? -- Thanks, and sorry for my English Paul -- No virus found in this outgoing message. Checked by AVG Anti-Virus. Version: 7.0.298 / Virus Database: 265.6.9 - Release Date: 6.1.2005

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flash rom utility
by Gin 10 Jan '05

10 Jan '05

Is there a flash rom utility I can use to flash linuxbios to my EEPROM? Currently I am WICE to do it. But I can't depend on a hardware device to update bios. gin

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RE: Enable apic ext id to use 256 apic id for AMD64
by YhLu 07 Jan '05

07 Jan '05

Yes. #ifndef ENABLE_APIC_EXT_ID #define ENABLE_APIC_EXT_ID 0 #endif static void enable_apic_ext_id(u8 node) { #if ENABLE_APIC_EXT_ID==1 #warning "FIXME Is the right place to enable apic ext id here?" u32 val; val = pci_read_config32(NODE_HT(node), 0x68); val |= (HTTC_APIC_EXT_SPUR | HTTC_APIC_EXT_ID | HTTC_APIC_EXT_BRD_CST); pci_write_config32(NODE_HT(node), 0x68, val); #endif } -----Original Message----- From: Andi Kleen [mailto:ak@muc.de] Sent: Friday, January 07, 2005 1:29 PM To: YhLu Cc: Stefan Reinauer; Ronald G. Minnich; linuxbios(a)clustermatic.org; discuss(a)x86-64.org; jamesclv(a)us.ibm.com; suresh.b.siddha(a)intel.com; Matt Domsch Subject: Re: Enable apic ext id to use 256 apic id for AMD64 > nodeid = lapicid() & 0xf; > #if ENABLE_APIC_EXT_ID == 1 > enable_apic_ext_id(nodeid); > lapic_write(LAPIC_ID, ( lapic_read(LAPIC_ID) | > (APIC_ID_OFFSET<<24) ) ); // CPU apicid is from 0x10 Surely you should at least enable ApicExtBrd too. Otherwise 0xf will send to all CPUs. -Andi

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Directory structure for x86emu
by Li-Ta Lo 07 Jan '05

07 Jan '05

Hello, It turns out that the VGABIOS support can be made pretty generic for all kinds of PCI expansion ROM. So I have the emulator the .init method of default_pci_ops_dev. I am going to add the following directories, if there is no objection, I will commit it next week. src/include/x86emu -- public header file of x86emu src/devices/pci_rom.c -- expansion ROM loading and execution src/devices/emulator -- the emulator and supporting functions src/devices/emulator/x86emu -- the emulator itself src/devices/emulator/pcbios -- legacy PC BIOS handler for the emulator src/devices/emulator/biosemu.c -- glue between pci_rom.c and the emulator Any comments ? Ollie

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low level shell
by Bryan E. Chafy 07 Jan '05

07 Jan '05

Apologies if this is a redundant contribution. None of my pc motherboards have JTAG or HW debug capabilites. And constantly (hot)flashing, changing ram init code, then (hot)flashing again gets old really fast. Looking around, I couldnt find any debug tools that would operate at basically the reset vector level. I thought this was the goal of openbios, but I got lost in all the jibberish about 4th and firmware standards. So I set out to make a small interactive low level shell with the goal of providing at least some tools to aid in board/memory bringup and debugging. This was nontrivial given the system limitations, however I got a few things to work. Attached is llshell.inc (for linuxbios1, Ive not tried any of the new stuff yet) and llshell_linux (for running/testing inside of linux). It's written entirely in asm and can run in a memoryless early stage (say at the beginning of ram_set_registers or points afterword). List of commands: beep -- pc speaker beep rst (or RST) -- reset out(b,w,l) <val> <port> -- raw out val at port in(b,w,l) <port> -- show raw port value jmp <address> -- jmp to address (llshell addr is in eax) call <address> -- funcion call (assumes a working stack) cli -- clear interrupts sti -- enable interrupts push <value> -- push value onto stack pop -- pop from stack and display wm(b,w,l) <addr> <val> -- write mem dm <addr> <lines> -- dump mem mcp <src> <dst> <size> -- mem copy mpat <pat> <dst> <size> -- mem pattern memt <begin> <end> -- memory test pcir(b,w,l) <loc> -- pci read config pciw(b,w,l) <loc> <val> -- pci write config dl <addr> <size> -- memory download (display xor cheksum at completion) cram <addr> <size> -- enable cache to be ram (experimental) baud <val> -- change baudrate (not yet implemented) exit -- exit shell All values in hex (0x prefixing ok)

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coreboot January 2005