coreboot January 2005

coreboot@coreboot.org

43 participants
155 discussions

IO conflict in 440bx V1
by Richard Smith 13 Jan '05

13 Jan '05

I just remembered.. During my e-mail blackout I discovered that the 440bx code sets up the smbus base address at 0x1000. Which is also the IO address that the PCI code starts allocating from. Causes all manner of subtle problems. I changed my version to allocate smb at 0x500 but the right solution may be to reserve a range for chipset IO that the PCI allocator will not use. -- Richard A. Smith

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Gigabit GA6-BXC
by publicitexp＠free.fr 13 Jan '05

13 Jan '05

Hello, I try to compil linuxbios for GA6-BXC but i have an error when i execute "make". Can you help me please. I use: -red hat 6.2$ -GNU assembler version 2.9.5 (i386-redhat-linux) using BFD version 2.9.5.0.22 GCC -x assembler-with-cpp -DASSEMBLY -E ... crt0.S>crt0.s gcc ... -o crt0.o crt0.s crt0.s:assembler messages: crt0.s:1631:warning: using '%al' instead of '%eax' due to b suffix crt0.s:2220:Error: suffix or operands invalid for "JMP" make:***[crt0.o] error1 Thanks for help

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RE: Running with VGA
by YhLu 13 Jan '05

13 Jan '05

Works now. please check it. YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Thursday, January 13, 2005 11:12 AM To: YhLu Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA On Thu, 2005-01-13 at 10:49, YhLu wrote: > PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff7ffff] rom > > It seems it can not be processed by pci_set_resource properly. > > YH > Is 0xffff8000 written to register 0x30? That resource is dummy so it should not be process by the resource allocator. Anyway, probably we should give up (ab)using the allocator. I made another version to use dev->rom_address in pci_rom_probe(). Ollie

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RE: Running with VGA
by YhLu 13 Jan '05

13 Jan '05

Works not. I happen to delete in pci_read_config(dev, PCI_ROM_ADDRESS) -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 10:20 AM To: YhLu; 'Li-Ta Lo' Cc: 'Sagiv Yefet'; 'LinuxBIOS' Subject: RE: Running with VGA Move /* for on board device with embedded ROM image, the ROM image is at * fixed address specified in the Config.lb, the dev->rom_address is * inited by driver_pci_onboard_ops::enable_dev() */ if ((dev->on_mainboard) && (dev->rom_address != 0)) { resource->base = dev->rom_address; resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; return; } To get_pci_rom_resource end. PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff9ffff] rom But PCI: 02:06.0 init pci_rom_probe, rom address for PCI: 02:06.0 = 1d300 pci_rom_probe, Incorrect Expansion ROM Header Signature 1fe8 I wonder if we can not store that value into PCI_ROM_ADDRESS YH -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 10:06 AM To: YhLu; Li-Ta Lo Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA I guess it can not get size correctly. So you need to change the pci_get_rom_resource to get the size for it. And then assign the base to it. YH -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 9:49 AM To: Li-Ta Lo Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff7ffff] rom It seems it can not be processed by pci_set_resource properly. YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Wednesday, January 12, 2005 10:10 PM To: YhLu Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA On Wed, 2005-01-12 at 23:07, YhLu wrote: > You assign the value to the new resource. > > I wonder if it will confuse the resource allocator. Because the range is out > of touch of allocator. > I don't think so but I am not sure neither. The resource is flagged as FIXED and ASSIGNED. The resource allocator should leave that resource as is. If it does not work, we can just write dev->rom_address to PCI_ROM_ADDRESS directly in pci_get_rom_resource() and the pci_rom_probe() can still be unchanged. Could you try the code? Ollie > YH > > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Wednesday, January 12, 2005 9:48 PM > To: YhLu > Cc: Sagiv Yefet; LinuxBIOS > Subject: RE: Running with VGA > > On Wed, 2005-01-12 at 21:02, YhLu wrote: > > Committed. > > > > Also I added readme in /drivers/pci/onboard/onboard.c > > > > > > YH > > > > I made some modification which should utilize the resource allocation > code and minimize the impact of the embedded ROM image. I was doing > it blindly, please test it on your platform. > > Ollie > _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: Running with VGA
by YhLu 13 Jan '05

13 Jan '05

PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff7ffff] rom It seems it can not be processed by pci_set_resource properly. YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Wednesday, January 12, 2005 10:10 PM To: YhLu Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA On Wed, 2005-01-12 at 23:07, YhLu wrote: > You assign the value to the new resource. > > I wonder if it will confuse the resource allocator. Because the range is out > of touch of allocator. > I don't think so but I am not sure neither. The resource is flagged as FIXED and ASSIGNED. The resource allocator should leave that resource as is. If it does not work, we can just write dev->rom_address to PCI_ROM_ADDRESS directly in pci_get_rom_resource() and the pci_rom_probe() can still be unchanged. Could you try the code? Ollie > YH > > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Wednesday, January 12, 2005 9:48 PM > To: YhLu > Cc: Sagiv Yefet; LinuxBIOS > Subject: RE: Running with VGA > > On Wed, 2005-01-12 at 21:02, YhLu wrote: > > Committed. > > > > Also I added readme in /drivers/pci/onboard/onboard.c > > > > > > YH > > > > I made some modification which should utilize the resource allocation > code and minimize the impact of the embedded ROM image. I was doing > it blindly, please test it on your platform. > > Ollie >

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RE: Running with VGA
by YhLu 12 Jan '05

12 Jan '05

Move /* for on board device with embedded ROM image, the ROM image is at * fixed address specified in the Config.lb, the dev->rom_address is * inited by driver_pci_onboard_ops::enable_dev() */ if ((dev->on_mainboard) && (dev->rom_address != 0)) { resource->base = dev->rom_address; resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; return; } To get_pci_rom_resource end. PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff9ffff] rom But PCI: 02:06.0 init pci_rom_probe, rom address for PCI: 02:06.0 = 1d300 pci_rom_probe, Incorrect Expansion ROM Header Signature 1fe8 I wonder if we can not store that value into PCI_ROM_ADDRESS YH -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 10:06 AM To: YhLu; Li-Ta Lo Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA I guess it can not get size correctly. So you need to change the pci_get_rom_resource to get the size for it. And then assign the base to it. YH -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 9:49 AM To: Li-Ta Lo Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff7ffff] rom It seems it can not be processed by pci_set_resource properly. YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Wednesday, January 12, 2005 10:10 PM To: YhLu Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA On Wed, 2005-01-12 at 23:07, YhLu wrote: > You assign the value to the new resource. > > I wonder if it will confuse the resource allocator. Because the range is out > of touch of allocator. > I don't think so but I am not sure neither. The resource is flagged as FIXED and ASSIGNED. The resource allocator should leave that resource as is. If it does not work, we can just write dev->rom_address to PCI_ROM_ADDRESS directly in pci_get_rom_resource() and the pci_rom_probe() can still be unchanged. Could you try the code? Ollie > YH > > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Wednesday, January 12, 2005 9:48 PM > To: YhLu > Cc: Sagiv Yefet; LinuxBIOS > Subject: RE: Running with VGA > > On Wed, 2005-01-12 at 21:02, YhLu wrote: > > Committed. > > > > Also I added readme in /drivers/pci/onboard/onboard.c > > > > > > YH > > > > I made some modification which should utilize the resource allocation > code and minimize the impact of the embedded ROM image. I was doing > it blindly, please test it on your platform. > > Ollie > _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: Running with VGA
by YhLu 12 Jan '05

12 Jan '05

I guess it can not get size correctly. So you need to change the pci_get_rom_resource to get the size for it. And then assign the base to it. YH -----Original Message----- From: YhLu Sent: Thursday, January 13, 2005 9:49 AM To: Li-Ta Lo Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA PCI: 02:06.0 30 <- [0x00fff80000 - 0x00fff7ffff] rom It seems it can not be processed by pci_set_resource properly. YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Wednesday, January 12, 2005 10:10 PM To: YhLu Cc: Sagiv Yefet; LinuxBIOS Subject: RE: Running with VGA On Wed, 2005-01-12 at 23:07, YhLu wrote: > You assign the value to the new resource. > > I wonder if it will confuse the resource allocator. Because the range is out > of touch of allocator. > I don't think so but I am not sure neither. The resource is flagged as FIXED and ASSIGNED. The resource allocator should leave that resource as is. If it does not work, we can just write dev->rom_address to PCI_ROM_ADDRESS directly in pci_get_rom_resource() and the pci_rom_probe() can still be unchanged. Could you try the code? Ollie > YH > > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Wednesday, January 12, 2005 9:48 PM > To: YhLu > Cc: Sagiv Yefet; LinuxBIOS > Subject: RE: Running with VGA > > On Wed, 2005-01-12 at 21:02, YhLu wrote: > > Committed. > > > > Also I added readme in /drivers/pci/onboard/onboard.c > > > > > > YH > > > > I made some modification which should utilize the resource allocation > code and minimize the impact of the embedded ROM image. I was doing > it blindly, please test it on your platform. > > Ollie > _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Configuration for motherboard
by Andreas Bach Aaen (AH/TED) 12 Jan '05

12 Jan '05

Hi linuxbios developers, I am new to this list and BIOS concepts in general. However I have worked with Linux for over 10 years, but I am sure you can learn me something new anyhow:-) I have a motherboard which gives me the following output from lspci: ------- 0000:00:00.0 Host bridge: Intel Corp. E7501 Memory Controller Hub (rev 01) 0000:00:00.1 Class ff00: Intel Corp. E7000 Series Host RASUM Controller (rev 01) 0000:00:02.0 PCI bridge: Intel Corp. E7000 Series Hub Interface B PCI-to-PCI Bridge (rev 01) 0000:00:02.1 Class ff00: Intel Corp. E7000 Series Hub Interface B RASUM Controller (rev 01) 0000:00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to PCI Bridge (rev 82) 0000:00:1f.0 ISA bridge: Intel Corp. 82801DB/DBL (ICH4/ICH4-L) LPC Bridge (rev 02) 0000:00:1f.1 IDE interface: Intel Corp. 82801DB/DBL (ICH4/ICH4-L) UltraATA-100 IDE Controller (rev 02) 0000:00:1f.3 SMBus: Intel Corp. 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller (rev 02) 0000:02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) 0000:02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) 0000:02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) 0000:02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) 0000:03:02.0 Ethernet controller: Intel Corp. 82546GB Gigabit Ethernet Controller (rev 03) 0000:03:02.1 Ethernet controller: Intel Corp. 82546GB Gigabit Ethernet Controller (rev 03) 0000:03:03.0 Ethernet controller: Intel Corp. 82546GB Gigabit Ethernet Controller (rev 03) 0000:03:03.1 Ethernet controller: Intel Corp. 82546GB Gigabit Ethernet Controller (rev 03) 0000:03:04.0 SCSI storage controller: LSI Logic / Symbios Logic 53c1010 66MHz Ultra3 SCSI Adapter (rev 01) -------- The superIO chip is NSC PC87417 which don't seen to be supported, but I only need access to one of the serial ports in BIOS. Is this possible? I can see that my base should be freebios2 and not freebios. Which motherboard/configuration would be my best starting point? I would like to flash a linux kernel 2.4.x in BIOS which later on could boot a linux 2.6.x from either harddisk or net. How does the one kernel hand over the control to the other? Regards, -- Andreas Bach Aaen System Developer, M. Sc. Ericsson Telebit A/S tel: +45 89 38 51 00 Skanderborgvej 232 fax: +45 89 38 51 01 8260 Viby J Denmark andreas.bach.aaen(a)ericsson.com

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RE: problem with booting SMP linux kernel
by YhLu 12 Jan '05

12 Jan '05

Every MB's mptable.c is different. YH -----Original Message----- From: Gin [mailto:ginlin@nexcom.com.tw] Sent: Wednesday, January 12, 2005 6:55 PM To: 'Ronald G. Minnich' Cc: linuxbios(a)clustermatic.org Subject: RE: problem with booting SMP linux kernel >bad mp table would be my guess. I think the I/O APICs are incorrectly assigned to buses. From the kernel messages, devices on bus 0 are transformed to high IRQs. Can anyone one confirm that the mptable.c under src/tyan/s2735 is a good one to boot SMP linux kernel? I might need to manually construct the MP table for my board according to a good one. Thanks, gin _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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[OT] Tyan dual opteron motherboards
by Amaury Jacquot 12 Jan '05

12 Jan '05

considering how AMD64 is NUMA based, is it possible to use processors with a different operating frequency ?

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coreboot January 2005