coreboot December 2004

coreboot@coreboot.org

33 participants
95 discussions

RE: 4G 4 Rank memory module
by YhLu 14 Dec '04

14 Dec '04

Eric, Currently, duplicate ram in auto.c make the 4 ranks works. ( the MB that I'm using is EVT version. The HW engineer just did some rework to meet the production version). Also I want to mix the 2 ranks and 4 ranks memory by change raminit.c, but it does not work. Please check the diff, maybe I miss sth. YH

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Epia-M 10k
by Ben Sommer 13 Dec '04

13 Dec '04

Hi is here someone with a working bios for the epia-m board? I need the config file or the bios for 256MB and filo boot. Thx Ben -)

1 0

RE: booting slow
by Gin 13 Dec '04

13 Dec '04

This is our proprietary mobo. In case you want a quick glance, http://www.nexcom.com/product/nex/nex7220/ North Bridge: E7501 South Bridge: ICH3 - S SuperIO: SMSC(LPC47B27x) I base on the code for tyan/s2735. If it was the serial interrupt, why didn't it happen earlier? It starts getting slow at certain point in the linux kernel. gin

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collapsing devices.
by Stefan Reinauer 13 Dec '04

13 Dec '04

Hi, I am desperate, still getting: LinuxBIOS-1.1.7.0-fallback Sat Dec 11 20:30:55 CET 2004 starting... setting up resource map....done. 04 nodes initialized. udev=(0,0x18,0) 0xb4=00030000 Pretending to collapse device 74501022 on bus 00000000 udev=(0,0x19,0) 0xd4=000a0400 Pretending to collapse device 74501022 on bus 00000004 * Why would only bus 0 and 4 be collapsed, but not bus 1,2,3? Stefan

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Linux kernel hangs
by Gin 13 Dec '04

13 Dec '04

Linuxbios writes to the beginning of the Memory for MP tables. Shouldn't those addresses be interrupt vector table? It doesn't look it contains any pointers to an interrupt handler. Who is the table for? Will Linux kernel reference it? Linuxbios successfully loads the payload FILO which brings up Linux kernel. But the kernel hangs while waiting for a timer interrupt. See below. I guess the interrupt table is not correct. ========================================================== Linux version 2.4.20-8 (bhcompile(a)porky.devel.redhat.com) (gcc version 3.2.2 200 30222 (Red Hat Linux 3.2.2-5)) #1 Thu Mar 13 17:54:28 EST 2003 BIOS-provided physical RAM map: BIOS-e820: 0000000000000c88 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000040000000 (usable) 128MB HIGHMEM available. 896MB LOWMEM available. hm, page 00000000 reserved twice. On node 0 totalpages: 262144 zone(0): 4096 pages. zone(1): 225280 pages. zone(2): 32768 pages. Kernel command line: ro root=/dev/hda2 console=ttyS0,57600 Initializing CPU#0 Detected 1597.358 MHz processor. Console: colour dummy device 80x25 Calibrating delay loop... ==================================================================== The MP table is specific to Tyan/s2735 not my board. I should change it. We use intel E7501/ICHs-3. But s2735 is ICH5. Don't know if it matters. gin

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Running with VGA
by Sagiv Yefet 12 Dec '04

12 Dec '04

Hello, I am using Linux Bios on Tyan 2850. The machine is running with console. I add to the command line: "console=ttyS0,115200" and I have linux which runs with console. How can I run with VGA? Should I add some code to the bios? The VGA driver is: ATI Rage XL. Sagiv

2 1

BIOS shadowing
by Felix Radensky 12 Dec '04

12 Dec '04

Hi, folks I'm trying to implement BIOS shadowing for Intel 440bx chipset in freebios v1 code. Shadowing of 0xf0000-0xfffff is controlled by PAM0 register in the north bridge. Here's the code. #define PAM0 0x59 #define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | (devfn << 8) | (where & ~3)) extern void cache_disable(void); extern void cache_enable(void); extern unsigned long _text, _erodata; unsigned long *bios_start = &_text; unsigned long *bios_end = &_erodata; /* Shadow BIOS text and rodata into RAM */ static inline void bios_shadow(void) { cache_disable(); /* Set attributes for 0xf0000-0xfffff to write only */ outl(CONFIG_CMD(0, PCI_DEVFN(0, 0), PAM0), PCI_CONF_REG_INDEX); outb(0x20, PCI_CONF_REG_DATA + (PAM0 & 3)); while (bios_start <= bios_end) { volatile unsigned long tmp; tmp = *bios_start; *bios_start++ = tmp; } /* Set attributes for 0xf0000-0xfffff to read only */ outl(CONFIG_CMD(0, PCI_DEVFN(0, 0), PAM0), PCI_CONF_REG_INDEX); outb(0x10, PCI_CONF_REG_DATA + (PAM0 & 3)); cache_enable(); } This code works for me, however I have a question. When this code is executed, 0xf0000-0xfffff is configured as uncacheable via the corresponding MTRRs. However disabling of caching is essential for this code to work, and I don't understand why. Can someone please shed a light on this ? Thanks a lot. Felix.

1 0

romcc does not like simple code?
by Stefan Reinauer 11 Dec '04

11 Dec '04

Hi, I tried to remove ht_collapse_previous_enumeration from incoherent_ht.c ht_setup_chainx() for testing. I would have thought that removing the call to a function of an inner loop would not cause problems with romcc, but when removing this call romcc runs out of registers. If I put the call back in, everything compiles fine. Stefan

1 0

amd k8: setup_remote_node()?
by Stefan Reinauer 11 Dec '04

11 Dec '04

Hi, Looking at northbridge/amd/amdk8/coherent_ht.c: setup_remote_node() copies the routing table and the resource map to the "remote"/freshly setup cpu. This function is called for cpu1, but never for cpu2 and cpu3. This implies we should either drop it for cpu1 as well or add it to the cpu2/3 setup.. Stefan

1 1

RFC: linuxbios table fix
by ebiederman＠lnxi.com 10 Dec '04

10 Dec '04

Stefan I believe I have a better fix for the LinuxBIOS table bug then __attribute__((packed)). How does this look? I am still worried about ppc, and big endian architectures in general. But I don't think we currently have any users there. I don't know what is the best long term strategy for handling 64bit numbers but for this instance where we need a better definition for the current structure simply using a structure with 2 32bit ints looks like a sane way to go. Eric --- checkin/freebios2/src/include/boot/linuxbios_tables.h Tue Apr 22 13:01:45 2003 +++ linuxbios/freebios2/src/include/boot/linuxbios_tables.h Thu Dec 9 16:55:18 2004 @@ -57,14 +57,17 @@ #define LB_TAG_MEMORY 0x0001 +struct lb_uint64 { + uint32_t lo; + uint32_t hi; +}; struct lb_memory_range { - uint64_t start; - uint64_t size; + struct lb_uint64 start; + struct lb_uint64 size; uint32_t type; #define LB_MEM_RAM 1 /* Memory anyone can use */ #define LB_MEM_RESERVED 2 /* Don't use this memory region */ #define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ - }; struct lb_memory {

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coreboot December 2004