coreboot November 2003

coreboot@coreboot.org

44 participants
133 discussions

[announce] LinuxBIOS on AMD64
by Stefan Reinauer 22 Nov '03

22 Nov '03

Hi, I wrote a paper on LinuxBIOS on the AMD64 platform that covers some aspects on the following topics: * image configuration * porting LinuxBIOS to new AMD64 motherboards * debugging and tweaking hints * some internals The document is available at http://www.openbios.org/docs/LinuxBIOS-AMD64.pdf I am very glad to announce that this document is released under the GPL, so please go ahead and use it, spread it, change it. But please do submit your changes back so everybody can benefit. I suggest putting the document in the freebios2 documentation subdirectory, if nobody objects. (What is the preferred file format for that? TeX? The document was initially created using OpenOffice 1.1 8) Don't hesitate to make suggestions on improvement, report typos, badly written english, or whatever comes to your mind when reading the paper. Stefan -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development

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V2 epia-m link to tarball
by Dave Ashley 21 Nov '03

21 Nov '03

I got the interrupts working as per Ron's advice, also pulled the irq fixup stuff out of the vt8235 source and stuck it in with mainboard.c. I made a tarball of the changes, it can be downloaded here: http://www.xdr.com/dash/linuxbios I'll update that directory as I make changes. I think the vt8623 code is pretty much finished except I need to turn on VGA. The vt8235 tree is basically a clone of the vt8231 tree with all occurances of 8231 changed to 8235, and the PCI ID's changed. This probably needs some major rework (trying to initialize devices that aren't there + not initializing devices that are there. However I'm at a state where I can boot the system on the bios and get into linux. DDR init is the same as V1 for now. I'm planning on getting vga up and hopefully the vga bios. Once that is functional I'll be pretty close to where I was on V1. Then I'll try to get the smbus going to access the spd registers. Then hopefully someone else can take it from there and do the actual ddr configuration from spd (I hope). -Dave

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Re: v2 epia-m progress
by Dave Ashley 21 Nov '03

21 Nov '03

>use the v2 epia port as a model on how to set up interrupts. Can you point me in the right direction? What I've done so far is go into src/mainboard/via/epiam (cloned from epia) I regenerated irq_tables.c by flashing with award bios, booting up the board, then running the getpir.c utility from version1 (note this utility isn't present in version 2). It is still calling the 8231 code. Is the interrupt stuff in with the southbridge? Or is it the northbridge? -Dave

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v2 epia-m progress
by Dave Ashley 21 Nov '03

21 Nov '03

I did a quick hack to enable the DDR memory just like v1's epia-m hack. The northbridge.c just has a single function sizeram() which I implemented to just return as if there is 64M of memory. I commented out the attempts to init the smbus + sdram, and let everything proceed. It got to the etherboot payload, requested a bootfile, loaded it, launched linux, and initialized linux quite well, then crapped out trying to do network activity. It is obviously an interrupt problem, packets are coming out of the box but it can't receive them. This is very encouraging after about 3 hours or so. I haven't really done any initialization of either the north or south bridge, just the hack to initialize the DDR memory. I converted the asm code to 'C' but it is still hardcoded as opposed to reading the SPD contents. This was actually a surprise, I was expecting it to fail further along in linuxbios and suddenly all these linux messages were coming out. -Dave

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V2 epia-m support
by Dave Ashley 21 Nov '03

21 Nov '03

I've embarked on adding epia-m support to v2 of linuxbios. I am at the point where I have debug messages coming out the serial port. My plan of attack is to clone the epia code but rename everything epiam, and add support for the proper north + south bridges and mainboard init code. Which means porting these components from v1: vt8623 northbridge vt8235 southbridge vt1211 superio device Currently to get serial output working I grabbed the vt1211 serial init code and just shoved it into the auto.c of the epiam for now, calling it enable_vt1211_serial... Modified the default 19200 baud to 115200 baud (but I actually get 57600 baud). If anyone can offer any warnings or advice it would be helpful. I may get called off this project at any time though... -Dave

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EPIA-M 600 Cannot start
by Dmitry Borisov 21 Nov '03

21 Nov '03

My respect to all. I've got problem trying to burn linuxbios into EPIA-M 600. Config file attached if it could help. When I burn image and restart mb, it does not say anything to the serial. Even single character. Here is the output from flash_rom utility: SST39SF020A found at physical address: 0xfffc0000 Part is SST39SF020A Programming Page: 0063 at address: 0x0003f000 Sorry, that's pretty much I have from linuxbios to share. I wonder if anyone having EPIA-M 600 could send me the correct config file and correct romimage as well or let me know when I'm wrong. Appreciate your help, Dmitry/

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Re: V1 trouble with gcc 3.2.3 SOLUTION!!!
by Dave Ashley 21 Nov '03

21 Nov '03

Aside from the = vs == bug which probably wasn't too damaging, the problem was caused because the newer compiler doesn't use as many registers in its code, specifically the EBX register. So at the start of the do_vgabios() function it doesn't bother to push EBX on the stack to preserve it. However code higher up that calls this function had stored something in EBX, which the call to the vgabios happily trashes. The fix is to push ebx within the real_mode_switch_call_vga function: /* save the stack */ "push %ebx\n" "mov %esp, __stack\n" ... " mov %ax, %ss \n" " mov __stack, %esp\n" "pop %ebx\n" ); It won't hurt to push other registers like %esi for example. In fact why not push all the registers just to be safe... This is a pretty subtle bug, people should understand what was wrong and how the fix works. -Dave

3 2

LinuxBIOS and 4G+ memory
by Stefan Reinauer 20 Nov '03

20 Nov '03

Hi, does LinuxBIOS on Opteron cleanly handle 4+G of memory? I have a machine with 4G here for the first time, but I seem to end up with some of the memory missing. [..] totalram: 3840M How would Linux clear ECC memory >4G in this case? using PAE? Long mode is not available yet.. Stefan -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development

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AMD64: LDTSTOP vs hard reset
by Stefan Reinauer 20 Nov '03

20 Nov '03

Hi, In addition to lowering the number of resets it would also be possible to use an LDTSTOP (as I implemented it in older versions of the CVS) at least when doing the hypertransport link changes. I know that this does not work with some preproduction CPUs, but I don't think that would really matter. BUT: Could we get rid of all CPU resets when doing an LDTSTOP assertion (It's a lot quicker than a hard reset) or would we still need to reset the CPU for some other reasons? Stefan -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development

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Re: V1 trouble with gcc 3.2.3
by Dave Ashley 20 Nov '03

20 Nov '03

I found one minor bug but this isn't the cause of the problem. In that vgabios.c file there is a typo, = instead of ==: if ((buf[0] == 0x55) && (buf[1] = 0xaa)) { should be if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { This is present in version2 as well. Someone ought to fix that... -Dave

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coreboot November 2003