September 2018 Archives by author
Starting: Sat Sep 1 20:11:39 CEST 2018
Ending: Sun Sep 30 20:01:12 CEST 2018
Messages: 213
- [coreboot] T450S + Coreboot
Youness Alaoui
- [coreboot] SPI controller and Lock bits
Youness Alaoui
- [coreboot] SPI controller and Lock bits
Youness Alaoui
- [coreboot] SPI controller and Lock bits
Youness Alaoui
- [coreboot] Flashing Coreboot on Lenovo G505s
Anac
- [coreboot] Flashing Coreboot on Lenovo G505s
Anac
- [coreboot] Flashing Coreboot on Lenovo G505s
Anac
- [coreboot] Lenovo G505S - spkmodem console sound, is correct? Please listen and tell
Anac
- [coreboot] Flashing Coreboot on Lenovo G505s
Matt B
- [coreboot] Flashing Coreboot on Lenovo G505s
Matt B
- [coreboot] Flashing Coreboot on Lenovo G505s
Matt B
- [coreboot] 8GB graphics cards work on coreboot - in case anyone is wondering
Matt B
- [coreboot] 8GB graphics cards work on coreboot - in case anyone is wondering
Mike Banon
- [coreboot] Microcode Updates PSA (New users please read)
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] Flashing Coreboot on Lenovo G505s
Mike Banon
- [coreboot] UEFI Payload update
Alberto Bursi
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
Iru Cai
- [coreboot] Cannot commit code because of "Verify that the word 'coreboot' is lowercase" from an unrelated file
Josh Cofreros
- [coreboot] how users can control additional features?
Alexander Couzens
- [coreboot] MRC in coreboot
Aaron Durbin
- [coreboot] Loading Linux payloads on RISC-V
Aaron Durbin
- [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
Evgeny
- [coreboot] Porting Qotom Q355G4 SBC (similar to Librem 13)
Lil Evil
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Alex Feinman
- [coreboot] Downloading an archive of the coreboot wiki
Patrick Georgi
- [coreboot] UEFI Payload update
Patrick Georgi
- [coreboot] Downloading an archive of the coreboot wiki
Patrick Georgi
- [coreboot] SPI controller and Lock bits
Prasun Gera
- [coreboot] Wired problems with Intel skylake based board
Christian Gmeiner
- [coreboot] flashrom and 256 MiB S256FL256S
Carl-Daniel Hailfinger
- [coreboot] Coffee Lake FSP Released
Krystian Hebel
- [coreboot] Coreboot for Apollolake
David Hendricks
- [coreboot] SAR in Coreboot
David Hendricks
- [coreboot] Lenovo X230 + 32GB RAM ?
Nico Huber
- [coreboot] APIC and lspci
Nico Huber
- [coreboot] Intel G41 - Asrock G41M-GS: no coreboot screen output from Intel GPU on VGA
Nico Huber
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Nico Huber
- [coreboot] Coreboot for Apollolake
Nico Huber
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Nico Huber
- [coreboot] how users can control additional features?
Nico Huber
- [coreboot] Flashing Coreboot on Lenovo G505s
Nico Huber
- [coreboot] compile coreboot for xeon 5570
Nico Huber
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Nico Huber
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Nico Huber
- [coreboot] how users can control additional features?
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] SPI controller and Lock bits
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] flashrom and 256 MiB S256FL256S
Nico Huber
- [coreboot] USB 2.0 EHCI debug dongle doesn't print logs (at Lenovo G505S)
Nico Huber
- [coreboot] Loading Linux payloads on RISC-V
Philipp Hug
- [coreboot] Loading Linux payloads on RISC-V
Philipp Hug
- [coreboot] UEFI Payload update
Ivan Ivanov
- [coreboot] Lenovo G505S - spkmodem console sound, is correct? Please listen and tell
Ivan Ivanov
- [coreboot] USB 2.0 EHCI debug dongle doesn't print logs (at Lenovo G505S)
Ivan Ivanov
- [coreboot] USB 2.0 EHCI debug dongle doesn't print logs (at Lenovo G505S)
Ivan Ivanov
- [coreboot] KCMA-D8 /D16 and xen+bsd
Jo
- [coreboot] Porting Qotom Q355G4 SBC (similar to Librem 13)
John Keates
- [coreboot] Intel ME what is it? And when did this dangerous thing get installed?
John Keates
- [coreboot] Intel ME what is it? And when did this dangerous thing get installed?
John Keates
- [coreboot] Recovery
John Keates
- [coreboot] SPI controller and Lock bits
Sam Kuper
- [coreboot] SPI controller and Lock bits
Sam Kuper
- [coreboot] SPI controller and Lock bits
Sam Kuper
- [coreboot] SPI controller and Lock bits
Sam Kuper
- [coreboot] Intel ME what is it? And when did this dangerous thing get installed?
Gregg Levine
- [coreboot] RISC-V HiFive Unleashed board added to coreboot - has PCI-e slots via exp board
Rudolf Marek
- [coreboot] Divide Error in Tianocore payload
Jorge Fernandez Monteagudo
- [coreboot] Divide Error in Tianocore payload
Jorge Fernandez Monteagudo
- [coreboot] Initializing the VBIOS in coreboot does not currently work. VBIOS initialized in SeaBios works correctly
Jorge Fernandez Monteagudo
- [coreboot] Initializing the VBIOS in coreboot does not currently work. VBIOS initialized in SeaBios works correctly
Jorge Fernandez Monteagudo
- [coreboot] Divide Error in Tianocore payload
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Tianocore and TPM
Jorge Fernandez Monteagudo
- [coreboot] Coreboot, TPMs and Payloads
Jorge Fernandez Monteagudo
- [coreboot] Questions about using coreboot riscv with qemu
Liam Naddell
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
Kinky Nekoboi
- [coreboot] Questions about using coreboot riscv with qemu
Jonathan Neuschäfer
- [coreboot] SAR in Coreboot
Jonathan Neuschäfer
- [coreboot] Loading Linux payloads on RISC-V
Jonathan Neuschäfer
- [coreboot] Loading Linux payloads on RISC-V
Jonathan Neuschäfer
- [coreboot] Loading Linux payloads on RISC-V
Jonathan Neuschäfer
- [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
Angel Pons
- [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
Angel Pons
- [coreboot] Intel G41 - Asrock G41M-GS: no coreboot screen output from Intel GPU on VGA
Angel Pons
- [coreboot] Questions about using coreboot riscv with qemu
Angel Pons
- [coreboot] Coreboot for Apollolake
Angel Pons
- [coreboot] flashrom and 256 MiB S256FL256S
Angel Pons
- [coreboot] Lenovo X230 + 32GB RAM ?
David Potocnik
- [coreboot] Lenovo X230 + 32GB RAM ?
David Potocnik
- [coreboot] Thinkpad H8 EC Registers
Nathaniel Roach
- [coreboot] Initializing the VBIOS in coreboot does not currently work. VBIOS initialized in SeaBios works correctly
Martin Roth
- [coreboot] how users can control additional features?
Patrick Rudolph
- [coreboot] Loading Linux payloads on RISC-V
Patrick Rudolph
- [coreboot] SPI controller and Lock bits
Patrick Rudolph
- [coreboot] Loading Linux payloads on RISC-V
Patrick Rudolph
- [coreboot] Recovery
Sebastian
- [coreboot] 8GB graphics cards work on coreboot - in case anyone is wondering
Jonathan Seefelder
- [coreboot] SPI controller and Lock bits
Dhaval Sharma
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Naresh G. Solanki
- [coreboot] Kabylake unable to boot with post code 0x71
Naresh G. Solanki
- [coreboot] Kabylake unable to boot with post code 0x71
Naresh G. Solanki
- [coreboot] Kabylake unable to boot with post code 0x71
Naresh G. Solanki
- [coreboot] Kabylake unable to boot with post code 0x71
Naresh G. Solanki
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Naresh G. Solanki
- [coreboot] Intel ME what is it? And when did this dangerous thing get installed?
Philipp Stanner
- [coreboot] Porting Qotom Q355G4 SBC (similar to Librem 13)
Peter Stuge
- [coreboot] Intel ME what is it? And when did this dangerous thing get installed?
Peter Stuge
- [coreboot] T450S + Coreboot
Peter Stuge
- [coreboot] Wired problems with Intel skylake based board
Peter Stuge
- [coreboot] Lenovo G505S - spkmodem console sound, is correct? Please listen and tell
Peter Stuge
- [coreboot] flashrom and 256 MiB S256FL256S
Peter Stuge
- [coreboot] SPI controller and Lock bits
Peter Stuge
- [coreboot] SPI controller and Lock bits
Peter Stuge
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Kabylake unable to boot with post code 0x71 "SGX: pre-conditions not met"
Jose Trujillo
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Jose Trujillo
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Jose Trujillo
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Jose Trujillo
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Jose Trujillo
- [coreboot] how to change PCI device's PFA
Hilbert Tu(杜睿哲_Pegatron)
- [coreboot] APIC and lspci
Hilbert Tu(杜睿哲_Pegatron)
- [coreboot] APIC and lspci
Hilbert Tu(杜睿哲_Pegatron)
- [coreboot] MRC in coreboot
Antony AbeePrakash X V
- [coreboot] MRC saving for apollolake
Antony AbeePrakash X V
- [coreboot] Coreboot for Apollolake
Antony AbeePrakash X V
- [coreboot] Coreboot for Apollolake
Antony AbeePrakash X V
- [coreboot] (no subject)
Zvi Vered
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Zvi Vered
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Zvi Vered
- [coreboot] Burn 2MB coreboot.rom on 8MB flash chip
Zvi Vered
- [coreboot] Porting coreboot to another Intel's bay-trail
Zvi Vered
- [coreboot] how users can control additional features?
Julius Werner
- [coreboot] UEFI Payload update
You, Benjamin
- [coreboot] Tianocore and TPM
You, Benjamin
- [coreboot] Tianocore and TPM
You, Benjamin
- [coreboot] Tianocore and TPM
You, Benjamin
- [coreboot] Tianocore and TPM
You, Benjamin
- [coreboot] Tianocore and TPM
You, Benjamin
- [coreboot] Recovery
Lance Zhao
- [coreboot] SPI controller and Lock bits
Lance Zhao
- [coreboot] SPI controller and Lock bits
Lance Zhao
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
Evgeny Zinoviev
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
Evgeny Zinoviev
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
Evgeny Zinoviev
- [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
Sacripan averti
- [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
Sacripan averti
- [coreboot] T450S + Coreboot
awokd
- [coreboot] Flashing Coreboot on Lenovo G505s
awokd
- [coreboot] Flashing Coreboot on Lenovo G505s
awokd
- [coreboot] New Defects reported by Coverity Scan for coreboot
scan-admin at coverity.com
- [coreboot] New Defects reported by Coverity Scan for coreboot
scan-admin at coverity.com
- [coreboot] New Defects reported by Coverity Scan for coreboot
scan-admin at coverity.com
- [coreboot] RISC-V HiFive Unleashed board added to coreboot - has PCI-e slots via exp board
Taiidan at gmx.com
- [coreboot] RISC-V HiFive Unleashed board added to coreboot - has PCI-e slots via exp board
Taiidan at gmx.com
- [coreboot] Downloading an archive of the coreboot wiki
Taiidan at gmx.com
- [coreboot] KCMA-D8 /D16 and xen+bsd
Taiidan at gmx.com
- [coreboot] Downloading an archive of the coreboot wiki
Taiidan at gmx.com
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
kinky_nekoboi
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
kinky_nekoboi
- [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU
kinky_nekoboi
- [coreboot] Intel G41 - Asrock G41M-GS: no coreboot screen output from Intel GPU on VGA
h42 at memeware.net
- [coreboot] Intel G41 - Asrock G41M-GS: no coreboot screen output from Intel GPU on VGA
h42 at memeware.net
- [coreboot] Questions about using coreboot riscv with qemu
ron minnich
- [coreboot] Loading Linux payloads on RISC-V
ron minnich
- [coreboot] Loading Linux payloads on RISC-V
ron minnich
- [coreboot] Loading Linux payloads on RISC-V
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] flashrom and 256 MiB S256FL256S
ron minnich
- [coreboot] SPI controller and Lock bits
ron minnich
- [coreboot] SPI controller and Lock bits
ron minnich
- [coreboot] Questions about using coreboot riscv with qemu
zahra rahimkhani
- [coreboot] compile coreboot for xeon 5570
zahra rahimkhani
- [coreboot] SAR in Coreboot
galla rao
- [coreboot] microcode blob or ascii
galla rao
- [coreboot] microcode blob or ascii
galla rao
- [coreboot] Loading Linux payloads on RISC-V
王翔
- [coreboot] Loading Linux payloads on RISC-V
王翔
Last message date:
Sun Sep 30 20:01:12 CEST 2018
Archived on: Sun Sep 30 20:38:03 CEST 2018
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