Author: hailfinger Date: 2008-09-04 02:38:54 +0200 (Thu, 04 Sep 2008) New Revision: 856
Modified: coreboot-v3/arch/x86/pci_ops_conf1.c coreboot-v3/lib/lar.c Log: Improve debugging printks for LAR and PCI access.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Modified: coreboot-v3/arch/x86/pci_ops_conf1.c =================================================================== --- coreboot-v3/arch/x86/pci_ops_conf1.c 2008-09-02 15:25:06 UTC (rev 855) +++ coreboot-v3/arch/x86/pci_ops_conf1.c 2008-09-04 00:38:54 UTC (rev 856) @@ -144,8 +144,10 @@ * things are set up (which we have to be able to do * in stage 0 */ - if (! busses) + if (!busses) { + printk(BIOS_WARNING, "pci_conf1_find_on_bus: busses is 0!\n"); continue; + } if (pci_conf1_find_on_bus((busses >> 8) & 0xFF, vid, did, busdevfn)) return 1; }
Modified: coreboot-v3/lib/lar.c =================================================================== --- coreboot-v3/lib/lar.c 2008-09-02 15:25:06 UTC (rev 855) +++ coreboot-v3/lib/lar.c 2008-09-04 00:38:54 UTC (rev 856) @@ -120,8 +120,8 @@ header = (struct lar_header *)walk; fullname = walk + sizeof(struct lar_header);
- printk(BIOS_SPEW, "LAR: %s@%p, size %d\n", fullname, - header, ntohl(header->len)); + printk(BIOS_SPEW, "LAR: seen member %s@%p, size %d\n", + fullname, header, ntohl(header->len)); // FIXME: check checksum
if (strcmp(fullname, filename) == 0) {