How to convert a v2 board to CBFS?

[Uwe Hermann]

Hi,

I tried converting the MSI MS-6178 (i810 chipset) to CBFS by looking
at the recent CBFS patches which went in and blindly guessing what I
have to do :) It _seemed_ to work (builds fine), but doesn't boot then.

I see 0x0E on the POST card, no serial output at all.

Here's my current patch:

Signed-off-by: Uwe Hermann

Index: src/mainboard/msi/ms6178/Options.lb
===================================================================
--- src/mainboard/msi/ms6178/Options.lb (Revision 4350)
+++ src/mainboard/msi/ms6178/Options.lb (Arbeitskopie)
@@ -64,6 +64,7 @@
 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
+uses HAVE_HIGH_TABLES

default ROM_SIZE = 512 * 1024
 default HAVE_FALLBACK_BOOT = 1
@@ -74,7 +75,7 @@
 default MAINBOARD_VENDOR = "N/A"       # Override this in targets/*/Config.lb.
 default MAINBOARD_PART_NUMBER = "N/A"  # Override this in targets/*/Config.lb.
 default ROM_IMAGE_SIZE = 64 * 1024
-default FALLBACK_SIZE = 128 * 1024
+default FALLBACK_SIZE = ROM_IMAGE_SIZE
 default STACK_SIZE = 8 * 1024
 default HEAP_SIZE = 16 * 1024
 default HAVE_OPTION_TABLE = 0
@@ -95,10 +96,5 @@
 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
 default CONFIG_CONSOLE_VGA = 1
 default CONFIG_PCI_ROM_RUN = 1
-
-#
-# CBFS
-#
-#
-default CONFIG_CBFS=0
+default CONFIG_CBFS = 1
 end
Index: targets/msi/ms6178/Config.lb
===================================================================
--- targets/msi/ms6178/Config.lb        (Revision 4350)
+++ targets/msi/ms6178/Config.lb        (Arbeitskopie)
@@ -24,6 +24,9 @@
 option ROM_SIZE = 512 * 1024
 # option ROM_SIZE = (512 * 1024) - (32 * 1024)

+option HAVE_HIGH_TABLES = 0
+option CONFIG_CBFS = 1
+
 option MAINBOARD_VENDOR = "MSI"
 option MAINBOARD_PART_NUMBER = "MS-6178"

@@ -44,7 +47,7 @@
 romimage "fallback"
        option USE_FALLBACK_IMAGE = 1
        option COREBOOT_EXTRA_VERSION = ".0Fallback"
-       payload /tmp/filo.elf
+       payload ../payload.elf
 end

-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+buildrom ./coreboot.rom ROM_SIZE "fallback"

Am I doing something wrong, or missing some code changes?

(I'm additionally killing the 'normal' image for more space
in the ROM, but that's an unrelated change)

Thanks, Uwe.

[Myles Watson]

On Mon, Jun 8, 2009 at 9:13 AM, Uwe Hermann  wrote:
> Hi,
>
> I tried converting the MSI MS-6178 (i810 chipset) to CBFS by looking
> at the recent CBFS patches which went in and blindly guessing what I
> have to do :) It _seemed_ to work (builds fine), but doesn't boot then.

I don't have the board, but I tried to see if there was anything
obviously wrong.

I built images with and without CBFS, and looked at the coreboot.map
and the hexdumps of the files.  It looked fine to me.
> I see 0x0E on the POST card, no serial output at all.

I ran both images in qemu, and they both fail at the same point, but
after printing a banner:

coreboot-2.0.0-r4352M.0Fallback Mon Jun  8 10:27:52 MDT 2009 starting...
Device not found, Corey probably screwed up!

I wanted to see if the jumps were set up correctly.  That makes me
wonder why you get no serial output.  XIP settings?  They seem right,
though.
> Am I doing something wrong, or missing some code changes?

I don't see anything.  Sorry I couldn't help more.

Thanks,
Myles

[Patrick Georgi]

Am 08.06.2009 17:13, schrieb Uwe Hermann:
> Hi,
>
> I tried converting the MSI MS-6178 (i810 chipset) to CBFS by looking
> at the recent CBFS patches which went in and blindly guessing what I
> have to do :) It _seemed_ to work (builds fine), but doesn't boot then.
>
> I see 0x0E on the POST card, no serial output at all.

The only issue I see is that the HEAP_SIZE in your mainboard's config is 
quite small when lzma is involved, which uses a table of nearly 16kb. 
Try raising the heap size to 32kb.
Other than that, where's the 0x0E POST code used for that chipset (ie. 
where does it hang)?

Patrick

[ron minnich]

OK, you can do what I do. Put careful loops like this in .S:

1: movb $0x30, %al
   movb $0x3f8, %dx
   outb %al, %dx
   jmp 1b

(or something; my memory is not that great)

the idea is to lock the cpu up but have output.

Then you move that loop further along in the .S until you find the problem.

I'm surprised at no serial out. It makes me think the initial assembly
startup is quite wrong. The cbfs doesn't get involved until long after
ram is up and working.

double check the jmp at fffffff0.

ron

[Myles Watson]

> I'm surprised at no serial out. It makes me think the initial assembly
> startup is quite wrong. The cbfs doesn't get involved until long after
> ram is up and working.
>
> double check the jmp at fffffff0.

Since the image I built worked on qemu, I think the jumps should be there
and correct.  Uwe, have you tried running the image you built on qemu?  I
know it fails soon, but at least there's serial output.

Thanks,
Myles