[commit] r6236 - in trunk/src: mainboard/amd/bimini_fam10 southbridge/amd/cimx_wrapper/sb800
Author: uwe Date: Sun Jan 2 00:30:37 2011 New Revision: 6236 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6236
Log: AMD SB800: Drop component prefix from filenames.
We did the same with other chipsets in r6150.
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Uwe Hermann uwe@hermann-uwe.de
Added: trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.c - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.h - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h trunk/src/southbridge/amd/cimx_wrapper/sb800/early.c - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.c - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.h - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.c - copied, changed from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.h - copied unchanged from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h Deleted: trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h Modified: trunk/src/mainboard/amd/bimini_fam10/romstage.c trunk/src/southbridge/amd/cimx_wrapper/sb800/Amd.h trunk/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h trunk/src/southbridge/amd/cimx_wrapper/sb800/Kconfig trunk/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h trunk/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h trunk/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c trunk/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c
Modified: trunk/src/mainboard/amd/bimini_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/bimini_fam10/romstage.c Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/mainboard/amd/bimini_fam10/romstage.c Sun Jan 2 00:30:37 2011 (r6236) @@ -47,7 +47,7 @@ #include "southbridge/amd/rs780/early_setup.c" #include <SbEarly.h> #include <SBPLATFORM.h> /* SB OEM constants */ -#include <sb800_smbus.h> +#include <southbridge/amd/cimx_wrapper/sb800/smbus.h> #include "northbridge/amd/amdfam10/debug.c"
static void activate_spd_rom(const struct mem_controller *ctrl) @@ -193,7 +193,7 @@ /* show final fid and vid */ msr=rdmsr(0xc0010071); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); - #endif +#endif
rs780_htinit();
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/Amd.h ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/Amd.h Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/Amd.h Sun Jan 2 00:30:37 2011 (r6236) @@ -35,20 +35,15 @@ * */
- #ifndef _AMD_H_ #define _AMD_H_
-// -// // AGESA Types and Definitions -// -// + #ifndef NULL #define NULL 0 #endif
- #define LAST_ENTRY 0xFFFFFFFF #define IOCF8 0xCF8 #define IOCFC 0xCFC @@ -58,7 +53,6 @@
typedef UINTN AGESA_STATUS;
- #define AGESA_SUCCESS ((AGESA_STATUS) 0x0) #define AGESA_ALERT ((AGESA_STATUS) 0x40000000) #define AGESA_WARNING ((AGESA_STATUS) 0x40000001) @@ -131,7 +125,6 @@ IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link } AMD_MODULE_HEADER;
- #define FUNC_0 0 // bit-placed for PCI address creation #define FUNC_1 1 #define FUNC_2 2 @@ -378,4 +371,5 @@ #ifndef BIT63 #define BIT63 0x8000000000000000ull #endif + #endif
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h Sun Jan 2 00:30:37 2011 (r6236) @@ -36,7 +36,6 @@ #define va_arg(ap, t) ( *(t *) ((ap += _INTSIZEOF (t)) - _INTSIZEOF (t)) ) #define va_end(ap) ( ap = (va_list)0 )
- #pragma pack (push, 1)
#define IMAGE_ALIGN 32*1024
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/Kconfig ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/Kconfig Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/Kconfig Sun Jan 2 00:30:37 2011 (r6236) @@ -17,10 +17,11 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
- if SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" -endif #SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + string + default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" + +endif
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc Sun Jan 2 00:30:37 2011 (r6236) @@ -23,13 +23,13 @@
# SB800 Platform Files
-romstage-y += sb800_cfg.c -romstage-y += sb800_early.c -romstage-y += sb800_smbus.c +romstage-y += cfg.c +romstage-y += early.c +romstage-y += smbus.c
-ramstage-y += sb800_cfg.c -ramstage-y += sb800_late.c +ramstage-y += cfg.c +ramstage-y += late.c
-driver-y += sb800_smbus.c -driver-y += sb800_lpc.c +driver-y += smbus.c +driver-y += lpc.c
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h Sun Jan 2 00:30:37 2011 (r6236) @@ -24,18 +24,18 @@ #ifndef _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_
-#include "cbtypes.h" +#include <southbridge/amd/cimx_wrapper/sb800/cbtypes.h> typedef UINT64 PLACEHOLDER; -#include "Amdlib.h" -#include "Amd.h" -#include "amdlib32.h"//TODO merge with agesa wrapper -#include "SB800.h" -#include "SBTYPE.h" -#include "ACPILIB.h" -#include "SBDEF.h" -#include "AMDSBLIB.h" -#include "SBSUBFUN.h" -#include "OEM.h" +#include <southbridge/amd/cimx_wrapper/sb800/Amdlib.h> +#include <southbridge/amd/cimx_wrapper/sb800/Amd.h> +#include <vendorcode/amd/cimx/lib/amdlib32.h> //TODO merge with agesa wrapper +#include <vendorcode/amd/cimx/sb800/SB800.h> +#include <vendorcode/amd/cimx/sb800/SBTYPE.h> +#include <vendorcode/amd/cimx/sb800/ACPILIB.h> +#include <vendorcode/amd/cimx/sb800/SBDEF.h> +#include <vendorcode/amd/cimx/sb800/AMDSBLIB.h> +#include <vendorcode/amd/cimx/sb800/SBSUBFUN.h> +#include <vendorcode/amd/cimx/sb800/OEM.h>
#ifdef NULL #undef NULL @@ -66,9 +66,6 @@
#define FIXUP_PTR(ptr) ptr
- - - //------------------------------------------------------------------------------------------------------------------------// /** * SB_CIMx_PARAMETER 0 1 2 Defult Value When CIMx Take over
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h Sun Jan 2 00:30:37 2011 (r6236) @@ -17,7 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- #ifndef _CIMX_SB_EARLY_H_ #define _CIMX_SB_EARLY_H_
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c Sun Jan 2 00:30:37 2011 (r6236) @@ -17,11 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- #include <arch/io.h> #include <arch/romcc_io.h>
- #if CONFIG_SERIAL_POST == 1
/* Data */ @@ -53,7 +51,6 @@
#endif // CONFIG_SERIAL_POST == 1
- static void sb800_enable_rom(void) { u32 word; @@ -90,7 +87,6 @@ pci_io_write_config16(dev, 0x6c, word); }
- static void uart_init(void) { #if CONFIG_SERIAL_POST == 1 @@ -106,7 +102,6 @@ #endif // CONFIG_SERIAL_POST == 1 }
- static void bootblock_southbridge_init(void) { /* Setup the rom access for 2M */
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.c (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.c Sun Jan 2 00:30:37 2011 (r6236) @@ -17,10 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- -#include "SBPLATFORM.h" -#include "sb800_cfg.h" - +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h>
/** * @brief South Bridge CIMx configuration @@ -124,4 +122,3 @@ //sb_config-> #endif //!__PRE_RAM__ } -
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.h (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/cfg.h Sun Jan 2 00:30:37 2011 (r6236) @@ -17,13 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- #ifndef _SB800_CFG_H_ #define _SB800_CFG_H_
#include <stdint.h>
- /** * @def BIOS_SIZE_1M * @def BIOS_SIZE_2M @@ -150,7 +148,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. @@ -218,10 +215,8 @@ #define GPP_CFGMODE GPP_CFGMODE_X1111 #endif
- /** * @brief South Bridge CIMx configuration - * */ void sb800_cimx_config(AMDSBCFG *sb_cfg);
@@ -233,7 +228,6 @@ * @param[in] func Southbridge CIMx Function ID. * @param[in] data Southbridge Input Data. * @param[in] sb_cfg Southbridge configuration structure pointer. - * */ u32 sb800_callout_entry(u32 func, u32 data, void* sb_cfg);
Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c Sat Jan 1 23:05:57 2011 (r6235) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c Sun Jan 2 00:30:37 2011 (r6236) @@ -21,5 +21,5 @@ #include "chip.h"
struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops = { - CHIP_NAME("AMD South Bridge SB800") + CHIP_NAME("AMD SB800 Southbridge") };
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/early.c (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/early.c Sun Jan 2 00:30:37 2011 (r6236) @@ -17,16 +17,14 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- //#include <config.h> #include <stdint.h> #include <device/pci_ids.h> -#include <arch/io.h> /* inl, outl */ -#include <arch/romcc_io.h> /* device_t */ -#include "SBPLATFORM.h" -#include "SbEarly.h" -#include "sb800_cfg.h" /*sb800_cimx_config*/ - +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/SbEarly.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h>
/** * @brief Get SouthBridge device number @@ -45,7 +43,6 @@ return (dev >> 15) & 0x1f; }
- /** * @brief South Bridge CIMx romstage entry, * wrapper of sbPowerOnInit entry point.
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c Sun Jan 2 00:30:37 2011 (r6236) @@ -17,17 +17,15 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- -#include <device/device.h> /* device_t */ -#include <device/pci.h> /* device_operations */ +#include <device/device.h> +#include <device/pci.h> #include <device/pci_ids.h> -#include <device/smbus.h> /* smbus_bus_operations */ -#include <console/console.h> /* printk */ -#include "sb800_lpc.h" /* lpc_read_resources */ -#include "SBPLATFORM.h" /* Platfrom Specific Definitions */ -#include "sb800_cfg.h" /* sb800 Cimx configuration */ -#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */ - +#include <device/smbus.h> +#include <console/console.h> +#include <southbridge/amd/cimx_wrapper/sb800/lpc.h> +#include <southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h> +#include <southbridge/amd/cimx_wrapper/sb800/cfg.h> +#include "chip.h"
/*implement in mainboard.c*/ //void set_pcie_assert(void); @@ -35,14 +33,13 @@ void set_pcie_reset(void); void set_pcie_dereset(void);
- #ifndef _RAMSTAGE_ #define _RAMSTAGE_ #endif + static AMDSBCFG sb_late_cfg; //global, init in sb800_cimx_config static AMDSBCFG *sb_config = &sb_late_cfg;
- /** * @brief Entry point of Southbridge CIMx callout * @@ -78,14 +75,12 @@ return ret; }
- static struct pci_operations lops_pci = { .set_subsystem = 0, };
static void lpc_enable_resources(device_t dev) { - pci_dev_enable_resources(dev); //lpc_enable_childrens_resources(dev); } @@ -111,7 +106,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_LPC, };
- static void sata_enable_resources(struct device *dev) { sataInitAfterPciEnum(sb_config); @@ -141,7 +135,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_SATA, //SATA IDE Mode 4390 };
- #if CONFIG_USBDEBUG static void usb_set_resources(struct device *dev) { @@ -225,7 +218,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_HDA, };
- static void gec_init(struct device *dev) { gecInitAfterPciEnum(sb_config); @@ -248,7 +240,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_GEC, };
- static void pcie_init(device_t dev) { sbPcieGppLateInit(sb_config); @@ -270,7 +261,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_PCI, };
- struct device_operations bridge_ops = { .read_resources = pci_bus_read_resources, .set_resources = pci_dev_set_resources, @@ -310,7 +300,6 @@ .device = PCI_DEVICE_ID_ATI_SB800_PCIED, };
- /** * @brief SB Cimx entry point sbBeforePciInit wrapper */
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.c (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.c Sun Jan 2 00:30:37 2011 (r6236) @@ -18,8 +18,7 @@ */
#include <device/pci.h> -#include "sb800_lpc.h" - +#include <southbridge/amd/cimx_wrapper/sb800/lpc.h>
void lpc_read_resources(device_t dev) { @@ -60,7 +59,6 @@ /* Specical case. SPI Base Address. The SpiRomEnable should be set. */ res = find_resource(dev, SPIROM_BASE_ADDRESS); pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1); - }
/**
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.h (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/lpc.h Sun Jan 2 00:30:37 2011 (r6236) @@ -20,7 +20,6 @@ #ifndef _SB800_LPC_H_ #define _SB800_LPC_H_
- #define SPIROM_BASE_ADDRESS 0xA0 /* SPI ROM base address */
void lpc_read_resources(device_t dev);
Copied and modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.c (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c) ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c Sat Jan 1 18:52:34 2011 (r6230, copy source) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.c Sun Jan 2 00:30:37 2011 (r6236) @@ -17,9 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
- #include <arch/io.h> -#include "sb800_smbus.h" +#include <southbridge/amd/cimx_wrapper/sb800/smbus.h>
static inline void smbus_delay(void) { @@ -248,4 +247,3 @@ outl(tmp, AB_DATA); outl(0, AB_INDX); } -
Copied: trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.h (from r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/smbus.h Sun Jan 2 00:30:37 2011 (r6236, copy of r6230, trunk/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h) @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SB800_SMBUS_H_ +#define _SB800_SMBUS_H_ + +//#include <stdint.h> + +#define SMBUS_IO_BASE SMBUS0_BASE_ADDRESS + +#define SMBHSTSTAT 0x0 +#define SMBSLVSTAT 0x1 +#define SMBHSTCTRL 0x2 +#define SMBHSTCMD 0x3 +#define SMBHSTADDR 0x4 +#define SMBHSTDAT0 0x5 +#define SMBHSTDAT1 0x6 +#define SMBHSTBLKDAT 0x7 + +#define SMBSLVCTRL 0x8 +#define SMBSLVCMD_SHADOW 0x9 +#define SMBSLVEVT 0xa +#define SMBSLVDAT 0xc + +/*//SB00.H +#define AX_INDXC 0 +#define AX_INDXP 2 +#define AXCFG 4 +#define ABCFG 6 +#define RC_INDXC 1 +#define RC_INDXP 3 +*/ + +#define AB_INDX 0xCD8 +#define AB_DATA (AB_INDX+4) + +/* Between 1-10 seconds, We should never timeout normally + * Longer than this is just painful when a timeout condition occurs. + */ +#define SMBUS_TIMEOUT (100*1000*10) + +#define abcfg_reg(reg, mask, val) \ + alink_ab_indx((ABCFG), (reg), (mask), (val)) +#define axcfg_reg(reg, mask, val) \ + alink_ab_indx((AXCFG), (reg), (mask), (val)) +#define axindxc_reg(reg, mask, val) \ + alink_ax_indx((AX_INDXC), (reg), (mask), (val)) +#define axindxp_reg(reg, mask, val) \ + alink_ax_indx((AX_INDXP), (reg), (mask), (val)) +#define rcindxc_reg(reg, port, mask, val) \ + alink_rc_indx((RC_INDXC), (reg), (port), (mask), (val)) +#define rcindxp_reg(reg, port, mask, val) \ + alink_rc_indx((RC_INDXP), (reg), (port), (mask), (val)) + +int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); +int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); +int do_smbus_recv_byte(u32 smbus_io_base, u32 device); +int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val); +void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val); +void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val); +void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val); + +#endif
-
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