New Defects reported by Coverity Scan for coreboot

Hi,

Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan.

1 new defect(s) introduced to coreboot found with Coverity Scan.

New defect(s) Reported-by: Coverity Scan
Showing 1 of 1 defect(s)

** CID 1489880:  Control flow issues  (DEADCODE)
/src/mainboard/intel/adlrvp/romstage_fsp_params.c: 42 in configure_external_clksrc()

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*** CID 1489880:  Control flow issues  (DEADCODE)
/src/mainboard/intel/adlrvp/romstage_fsp_params.c: 42 in configure_external_clksrc()
36      * CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER provides the CLKSRC that feed clock to discrete
37      * buffer for further distribution to platform.
38      */
39     static void configure_external_clksrc(FSP_M_CONFIG *m_cfg)
40     {
41     	for (unsigned int i = CONFIG_MAX_PCIE_CLOCK_SRC; i < CONFIG_MAX_PCIE_CLOCK_REQ; i++)
> > > CID 1489880:  Control flow issues  (DEADCODE)
> > > Execution cannot reach this statement: "m_cfg->PcieClkSrcUsage[i] = 6;".

42     		m_cfg->PcieClkSrcUsage[i] = CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER;
43     }
44     
45     void mainboard_memory_init_params(FSPM_UPD *memupd)
46     {
47     	FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;

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