Hi,
Sometimes, I got "Invalid OPCODE 0x06" while running flashrom with -V (verbose) on Supermicro X7DCL-3 / ICH9R / SST25VF016B.
After checking the codes, I found that OPCODE 0x06 (Write Enable) is not available in OPMENU - Opcode Menu Configuration Register, but available in PREOP - Prefix Opcode Configuration Register.
I think it's a bug of Write Enable. Is there someone who can fix it?
spi.h: #define JEDEC_WREN 0x06
spi.c: void spi_write_enable() { const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN};
/* Send WREN (Write Enable) */ spi_command(sizeof(cmd), 0, cmd, NULL); }
ichspi.c: OPCODES O_ST_M25P = { { JEDEC_WREN, 0}, { {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Write Byte {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Erase Sector {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device Status Reg {JEDEC_RES, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Resume Deep Power-Down {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Write Status Register {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Bulk erase } };
int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { ... if (opcode_index == -1) { printf_debug("Invalid OPCODE 0x%02x\n", cmd); return 1; } ... }
Thank you. Water Chen