New patch to review for coreboot: 7e96950 armv7: Place reset vector + CBFS header + bootblock dynamically

[David Hendricks]

David Hendricks ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2148

-gerrit

commit 7e969509ff6ba95f8c30d03c178558078da901f8
Author: David Hendricks 
Date:   Mon Jan 14 20:58:50 2013 -0800

armv7: Place reset vector + CBFS header + bootblock dynamically

This replaces hard-coded bootblock offsets using the new scheme.
    The assembler will place the initial branch instruction after BL1,
    skip 2 aligned chunks, and place the remaining bootblock code after.

It will also leave an anchor string, currently 0xdeadbeef which
    cbfstool will find. Once found, cbfstool will place the master CBFS
    header at the next aligned offset.

Here is how it looks:

0x0000 |--------------|
                        |     BL1      |
                 0x2000 |--------------|
                        |    branch    |
        0x2000 + align  |--------------|
                        |  CBFS header |
    0x2000 + align * 2  |--------------|
                        |   bootblock  |
                        |--------------|

TODO: The option for alignment passed into cbfstool has always been
    64. Can we set it to 16 instead?

Change-Id: Icbe817cbd8a37f11990aaf060aab77d2dc113cb1
    Signed-off-by: David Hendricks 
---
 src/arch/armv7/Makefile.inc        |  3 +--
 src/arch/armv7/bootblock.inc       |  4 ++--
 src/cpu/samsung/exynos5250/Kconfig |  9 ---------
 util/cbfstool/common.c             | 37 +++++++++++++++++++++++--------------
 4 files changed, 26 insertions(+), 27 deletions(-)

diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index b783ac6..cc30633 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -48,8 +48,7 @@ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))

$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL)
    $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
-		-B $(objcbfs)/bootblock.bin -a 64 \
-		-o $(CONFIG_BOOTBLOCK_OFFSET)
+		-B $(objcbfs)/bootblock.bin -a 64
    $(prebuild-files) true
    mv $@.tmp $@
 else
diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc
index 90850d6..461b6c6 100644
--- a/src/arch/armv7/bootblock.inc
+++ b/src/arch/armv7/bootblock.inc
@@ -43,11 +43,11 @@ _start: b	reset
    .balignl 16,0xdeadbeef

_cbfs_master_header:
-	/* The CBFS master header is inserted here by cbfstool
+	/* The CBFS master header is inserted at the first aligned
     * when coreboot.rom is being created. Hence, we leave
     * some space for it.
     */
-	.skip 64
+	.skip 128			@ Assumes 64-byte alignment

reset:
    /*
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index cd20153..3d66c77 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -1,12 +1,3 @@
-# FIXME: shouldn't this be 0x3400? Or maybe the bootblock in ROM needs
-# to follow the BL1 image, but in SRAM it needs to be at 0x3400? Hm...
-config BOOTBLOCK_OFFSET
-	hex "Bootblock offset"
-	default 0x2000
-	help
-	  This is where the Coreboot bootblock resides. For Exynos5250,
-	  this value is pre-determined by the vendor-provided BL1.
-
 config BOOTBLOCK_CPU_INIT
    string
    default "cpu/samsung/exynos5250/bootblock.c"
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index 195cda1..448b273 100644
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -565,23 +565,32 @@ int create_cbfs_image(const char *romfile, uint32_t _romsize,
    	/* Set up physical/virtual mapping */
    	offset = romarea;

-		// should be aligned to align
-		uint32_t *arm_vec = (uint32_t *)(romarea + offs);
-		master_header = (struct cbfs_header *)(romarea + offs + 0x20);
-		loadfile(bootblock, &bootblocksize, romarea + offs + 0x20 +
-				sizeof(struct cbfs_header), SEEK_SET);
-
    	/*
-		 * Encoding for this branch instruction is:
-		 * 31:28 - condition (0xe for always/unconditional)
-		 * 27:24 - Branch (0xa, encoding A1)
-		 * 23: 0 - sign-extended offset (in multiples of 4)
+		 * The initial jump instruction and bootblock will be placed
+		 * before and after the master header, respectively. The
+		 * bootblock image must contain a blank, aligned region large
+		 * enough for the master header to fit.
    	 *
-		 * When executing the branch, the PC will read as the address
-		 * of current instruction + 8.
+		 * An anchor string must be left such that when cbfstool is run
+		 * we can find it and insert the master header at the next
+		 * aligned boundary.
    	 */
-		uint32_t imm = ((0x20 + sizeof(struct cbfs_header)) - 8) / 4;
-		arm_vec[0] = imm | (0xa << 24) | (0xe << 28);
+		loadfile(bootblock, &bootblocksize, romarea + offs, SEEK_SET);
+
+		unsigned char *p = romarea + offs;
+		while (1) {
+			/* FIXME: assumes little endian... */
+			if (*(uint32_t *)p == 0xdeadbeef)
+				break;
+			if (p >= (romarea + _romsize)) {
+				fprintf(stderr, "E: Could not determine CBFS header "
+					"location.\n", bootblock);
+				return 1;
+			}
+			p += (sizeof(unsigned int));
+		}
+		unsigned int u = (unsigned int)(p - romarea);
+		master_header = (struct cbfs_header *)(romarea + ALIGN(u, align));

master_header->magic = ntohl(CBFS_HEADER_MAGIC);
    	master_header->version = ntohl(CBFS_HEADER_VERSION);