Steven Sherk (steven.sherk@se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2248
-gerrit
commit 744bd8e3717e4291ec146abf5542a9458368f990 Author: Steven Sherk steven.sherk@se-eng.com Date: Wed Jan 30 16:02:14 2013 -0700
Add MMCONF resource to AMD fam15 PCI_DOMAIN
This is a port of the following: commit d5c998be99709c92f200b3b08aed2ca3fee2d519
The coreboot resource allocator doesn't respect resources claimed in the APIC_CLUSTER. Move the MMCONF resource to the PCI_DOMAIN to prevent overlap with PCI devices.
original-Change-Id: I8541795f69bbdd9041b390103fb901d37e07eeb9 Signed-off-by: Marc Jones marc.jones@se-eng.com URL - http://review.coreboot.org/#/c/2167/
Change-Id: I6e585d5cf0d46bd58337a6801fb0690ab2dd000c Signed-off-by: Steven Sherk steven.sherk@se-eng.com --- src/northbridge/amd/agesa/family15/northbridge.c | 32 +++++++++++++++--------- 1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 2ab0e3e..6fb3105 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -341,6 +341,20 @@ static void nb_read_resources(device_t dev) amdfam15_link_read_bases(dev, nodeid, link->link_num); } } + + /* + * This MMCONF resource must be reserved in the PCI_DOMAIN. + * It is not honored by the coreboot resource allocator if it is in + * the APIC_CLUSTER. + */ +#if CONFIG_MMCONF_SUPPORT + struct resource *resource = new_resource(dev, 0xc0010058); + resource->base = CONFIG_MMCONF_BASE_ADDRESS; + resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; + resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +#endif + }
@@ -448,6 +462,12 @@ static void nb_set_resources(device_t dev) assign_resources(bus); } } + + /* Print the MMCONF region if it has been reserved. */ + res = find_resource(dev, 0xc0010058); + if (res) { + report_resource_stored(dev, res, " <mmconfig>"); + } }
static void northbridge_init(struct device *dev) @@ -1095,22 +1115,10 @@ static void cpu_bus_noop(device_t dev)
static void cpu_bus_read_resources(device_t dev) { -#if CONFIG_MMCONF_SUPPORT - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -#endif }
static void cpu_bus_set_resources(device_t dev) { - struct resource *resource = find_resource(dev, 0xc0010058); - if (resource) { - report_resource_stored(dev, resource, " <mmconfig>"); - } - pci_dev_set_resources(dev); }
static struct device_operations cpu_bus_ops = {