[LinuxBIOS] New guy in LinuxBios

[Vincente Tsou]

Hello LinuxBios elders,

I'm sorry to bother you.

I'm begining to study LinuxBios and I have some problem in it.
Hope you can give me some idea.

My target board is an AMD Opteron (chipset: K8 / 8111 / 8131) mainboard,
it is similar to Tyan s2880 / s2881 / s2882.

So I base on Tyan s2880 to change some config file to compile a
linuxbios.rom,
but it doesn't work.

Following is what do I changed in s2880:
1. I changed the payload path in targets/tyan/s2880/Config.lb.
2. modify src/mainboard/tyan/s2880/Config.lb as 42812-pci.txt. ( as
attachment )
    I don't know is it correct that I modified. If you have interest you can
refer to Attachment.
3. generated irq_tables.c by getpir.c and replaced the original one.

compile and burn it in rom.

After I boot up the target board, it always alert emergency beep.

Then, I unmark some debug message in 'src/northbridge/amd/amdk8/raminit.c'
to see where is it hang.
The last step is hang on setup_default_resource_map() in
'src/mainboard/tyan/s2880/cache_as_ram_auto.c',
I can see it from serial console ( as attachment again. )

Is there any configuration I should change, and I didn't do ?
How can I debug it ?

Thanks a lot.

[Stefan Reinauer]

* Vincente Tsou  [060511 11:30]:
> My target board is an AMD Opteron (chipset: K8 / 8111 / 8131) mainboard,
> it is similar to Tyan s2880 / s2881 / s2882.
>
> So I base on Tyan s2880 to change some config file to compile a linuxbios.rom,
> but it doesn't work.
>
> Following is what do I changed in s2880:
> 3. generated irq_tables.c by getpir.c and replaced the original one.

getpir doesnt work for opteron boards. you should change an existing one
> compile and burn it in rom.
>
> After I boot up the target board, it always alert emergency beep.

Some onboard watchdog? this one should probably be disabled until it is
set up correctly.
> Then, I unmark some debug message in 'src/northbridge/amd/amdk8/raminit.c' to
> see where is it hang.
> The last step is hang on setup_default_resource_map() in 'src/mainboard/tyan/
> s2880/cache_as_ram_auto.c',

You need to change the board target to use your own resourcemap.c file. 
The southbridge is probably not connected to Link0 of CPU0.

i.e. 
-       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00,
+       PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff10, // Link 1 CPU 0

-       PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
+       PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff010, // CPU0 LDT1
> I can see it from serial console ( as attachment again. )

See mainboard/agami/aruma/resourcemap.c for an example

Stefan