Hi,
I am working on the Asus M2N32-SLI Deluxe and I started out with the Gigabyte target as base.
I had to disable ht optimization in the CAR code, or the machine would not survive the reset.
It gets to device enumeration now, but it seems it keeps looping on the devices on bus 0 until it runs out of heap:
LinuxBIOS-2.0.0_m57sli_Fallback Tue Jul 31 11:11:26 EDT 2007 starting... *sysinfo range: [000cf000,000cf730) bsp_apicid=00 core0 started: started ap apicid: 01 SBLink=00 NC node|link=00 begin msr fid, vid 3106121206100202 end msr fid, vid 3106121206100202 mcp55_num:01 ht reset - ignoring Ram1.00 Ram2.00 Unbuffered 400Mhz Interleaved RAM: 0x00200000 KB Ram3 dimm_mask = 00000011 x4_mask = 00000000 x16_mask = 00000000 single_rank_mask = 00000000 ODC = 00113222 Addr Timing= 00202520 Initializing memory: done Setting variable MTRR 2, base: 0MB, range: 2048MB, type WB set DQS timing:RcvrEn:Pass1: 00 CTLRMaxDelay=11 done set DQS timing:DQSPos: 00 done set DQS timing:RcvrEn:Pass2: 00 CTLRMaxDelay=42 done Total DQS Training : tsc [00]=000000003307610e Total DQS Training : tsc [01]=0000000033e8c69a Total DQS Training : tsc [02]=0000000068f5bcda Total DQS Training : tsc [03]=000000006ac2555a Ram4 v_esp=000ceeb8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Copying LinuxBIOS to RAM. src=fffdf000 dst=00100000 linxbios_ram.nrv2b length = 0000d704 linxbios_ram.bin length = 00022550 Jumping to LinuxBIOS. LinuxBIOS-2.0.0_m57sli_Fallback Tue Jul 31 11:11:26 EDT 2007 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.0 Hypertransport link capability not foundPCI: pci_scan_bus for bus 00 PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled Disabling static device: PCI: 00:01.0 Disabling static device: PCI: 00:01.1 PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled Disabling static device: PCI: 00:05.0 Disabling static device: PCI: 00:05.1 Disabling static device: PCI: 00:05.2 PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] disabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled Disabling static device: PCI: 00:0e.0 PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] enabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] enabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled Error! malloc: free_mem_ptr >= free_mem_end_ptr
Factory bios comes up with these devices:
00:00.0 0500: 10de:02f4 (rev a2) 00:00.1 0500: 10de:02fa (rev a2) 00:00.2 0500: 10de:02fe (rev a2) 00:00.3 0500: 10de:02f8 (rev a2) 00:00.4 0500: 10de:02f9 (rev a2) 00:00.5 0500: 10de:02ff (rev a2) 00:00.6 0500: 10de:027f (rev a2) 00:00.7 0500: 10de:027e (rev a2) 00:03.0 0604: 10de:02fd (rev a1) 00:04.0 0604: 10de:02fb (rev a1) 00:08.0 0500: 10de:0369 (rev a1) 00:09.0 0601: 10de:0360 (rev a2) 00:09.1 0c05: 10de:0368 (rev a2) 00:09.2 0500: 10de:036a (rev a2) 00:0a.0 0c03: 10de:036c (rev a1) 00:0a.1 0c03: 10de:036d (rev a2) 00:0c.0 0101: 10de:036e (rev a1) 00:0d.0 0101: 10de:037f (rev a2) 00:0d.1 0101: 10de:037f (rev a2) 00:0d.2 0101: 10de:037f (rev a2) 00:0e.0 0604: 10de:0370 (rev a2) 00:0e.1 0403: 10de:0371 (rev a2) 00:10.0 0680: 10de:0373 (rev a2) 00:11.0 0680: 10de:0373 (rev a2) 00:12.0 0604: 10de:0376 (rev a2) 00:14.0 0604: 10de:0374 (rev a2) 00:16.0 0604: 10de:0375 (rev a2) 00:17.0 0604: 10de:0377 (rev a2) 00:18.0 0600: 1022:1100 00:18.1 0600: 1022:1101 00:18.2 0600: 1022:1102 00:18.3 0600: 1022:1103 02:00.0 0300: 10de:0392 (rev a1) 03:0b.0 0c00: 104c:8023 06:00.0 0180: 1095:3132 (rev 01)
00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) 00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2) 00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2) 00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2) 00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2) 00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) 00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2) 00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2) 00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) 00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) 00:08.0 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a1) 00:09.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2) 00:09.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2) 00:09.2 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a2) 00:0a.0 USB Controller: nVidia Corporation MCP55 USB Controller (rev a1) 00:0a.1 USB Controller: nVidia Corporation MCP55 USB Controller (rev a2) 00:0c.0 IDE interface: nVidia Corporation MCP55 IDE (rev a1) 00:0d.0 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0d.1 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0d.2 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0e.0 PCI bridge: nVidia Corporation MCP55 PCI bridge (rev a2) 00:0e.1 Audio device: nVidia Corporation MCP55 High Definition Audio (rev a2) 00:10.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2) 00:11.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2) 00:12.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:14.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:16.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:17.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 02:00.0 VGA compatible controller: nVidia Corporation G70 [GeForce 7600 GS] (rev a1) 03:0b.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) 06:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01)
Any ideas what could go wrong?
Stefan Reinauer wrote:
Hi,
I am working on the Asus M2N32-SLI Deluxe and I started out with the Gigabyte target as base.
I had to disable ht optimization in the CAR code, or the machine would not survive the reset.
It gets to device enumeration now, but it seems it keeps looping on the devices on bus 0 until it runs out of heap:
Any ideas what could go wrong?
Stefan, I have only just begun to look at this code myself but I suspect the problem starts in the HT optimization. I think that the optimization code will setup the pcibus numbers to scan. I don't know why it would loop but it seems like some bad logic check first and last bus.
Sorry I don't have more ideas for you right now.
Marc
some months ago, i sent out about one patch about it, but wonder if it is checked in...you may dig out from list.
or let me find some time to compare the my local tree with public tree.
YH
yhlu wrote:
some months ago, i sent out about one patch about it, but wonder if it is checked in...you may dig out from list.
or let me find some time to compare the my local tree with public tree.
YH
What was the patch about? I can try to find and merge it...
Stefan
On 9/11/07, Stefan Reinauer stepan@coresystems.de wrote:
yhlu wrote:
some months ago, i sent out about one patch about it, but wonder if it is checked in...you may dig out from list.
or let me find some time to compare the my local tree with public tree.
YH
What was the patch about? I can try to find and merge it...
about uinitid setting when c51+mcp51 or c51+mcp55... maybe Ed is on the receiver list too..
or Marc could send you the diff, becase he got my latest tree...
YH
* yhlu yinghailu@gmail.com [070911 19:57]:
about uinitid setting when c51+mcp51 or c51+mcp55... maybe Ed is on the receiver list too..
or Marc could send you the diff, becase he got my latest tree...
This seems to be it:
http://linuxbios.org/pipermail/linuxbios/2007-January/018045.html
I tested it and it gets me quite a bit further.
-
Marc Jones -
Stefan Reinauer -
yhlu