答复: 答复: ????: coherent_ht_mainboard()

[YhLu]

Eric,

CPU0 Link0 is connected to CPU1, and CPU0 Link1 is connected to amd8131.

Before        needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80);

The link is 16x800,

After that it change to 16x600,

What's the 0x80 for? Do need to change that 0xa0, because CPU0 link1 is to
amd8131.

Regards

YH

-----邮件原件-----
发件人: [e-mail] [mailto:[e-mail]] 
发送时间: 2004年3月24日 11:28
收件人: YhLu
抄送: Stefan Reinauer; [e-mail]
主题: Re: 答复: ????: coherent_ht_mainboard()

YhLu  writes:
> The optimize_link make 
> The link CPU0 to CPU1:  in CPU0 side(link0) is 16x800 and CPU1 side(link0)
> is 16x800

I don't know if 1Ghz is actually supported between cpus.  AMD never
mentions it, at least I had not seen that it was supported when I
wrote that code.  So I erred on the side of caution and limited things
to what is documented as supported.
> but the scan_ht_chain change CPU0 side(link0) is 16x600

An 8131 does not operate reliably at over 600Mhz.  Read the errata.
The 8131 does advertise that it can go at 800Mhz though.
> it must think it is connected to 8111 or something.

I believe these cap come from ht_read_freq_cap.  And they
are explicitly set:

Here is the general version in devices/hypertransport.c.
The amdk8 versions are a little more abbreviated.

static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
{
    /* Handle bugs in valid hypertransport frequency reporting */
    unsigned freq_cap;

freq_cap = pci_read_config16(dev, pos);
    freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies
*/

/* AMD 8131 Errata 48 */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
    	(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
    	freq_cap &= ~(1 << HT_FREQ_800Mhz);
    }
    /* AMD 8151 Errata 23 */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
    	(dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
    	freq_cap &= ~(1 << HT_FREQ_800Mhz);
    }
    /* AMD K8 Unsupported 1Ghz? */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
    	freq_cap &= ~(1 << HT_FREQ_1000Mhz);
    }
    return freq_cap;
}

I hope this helps,

Eric

????: ????: ????: coherent_ht_mainboard()

[Stefan Reinauer]

* YhLu  [040324 21:00]:
> What's the 0x80 for? Do need to change that 0xa0, because CPU0 link1 is to
> amd8131.

This looks like another hard code. In a perfect world, we look at each
link of each CPU, check and remember what is connected to it, deciding
on the information we get from the northbridge, like whether the link is
coherent or non-coherent.
Currently we grab the information from the hypertransport graph that we
need for the next action, but we don't seem to be able to fully describe
the graph and optimally traverse it.

Stefan