r3868 - in trunk/coreboot-v2/src/mainboard/amd: dbm690t pistachio

Author: hailfinger
Date: 2009-01-16 13:44:41 +0100 (Fri, 16 Jan 2009)
New Revision: 3868

Modified:
   trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
   trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c
Log:
The DBM90T code sets bit 10 in _PSS as part of the control value, but
bit 10 is part of NewVID. That means the resulting VID is wrong and
causes the processor to crash.
The Pistachio code has the same bug.

This patch fixes the wrong setting and changes control from a magic and
incorrect unexplained value (0xE8202C00) to a combination of explained
values and shifts which has the right value (0xE8202800).

It is tested on my machine and it survived 200 changes from minimum to
maximum frequency every 100 ms under heavy load and under no load.

In the long term we want to consolidate all AMD FIDVID code into one
generic library file.

Signed-off-by: Carl-Daniel Hailfinger

Maggie Li has tested it on her DBM690T board. It is ok.
Acked-by: Maggie li

Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-01-16 03:44:41 UTC (rev 3867)
+++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-01-16 12:44:41 UTC (rev 3868)
@@ -260,7 +260,7 @@

/* Get the multipier of the fid frequency */
    /*
-	 * Fid multiplier is always 100 revF and revG.
+	 * Fid multiplier is always 100 revF and revG.
     */
    fid_multiplier = 100;

@@ -400,10 +400,10 @@
    	Pstate_num++;
    }

-	/* Print Pstate feq,vid,volt,power */
+	/* Print Pstate freq,vid,volt,power */

for (index = 0; index < Pstate_num; index++) {
-		printk_info("Pstate_feq[%d] = %dMHz\t", index,
+		printk_info("Pstate_freq[%d] = %dMHz\t", index,
    		    Pstate_feq[index]);
    	printk_info("Pstate_vid[%d] = %d\t", index, Pstate_vid[index]);
    	printk_info("Pstate_volt[%d] = %dmv\t", index,
@@ -414,8 +414,11 @@

/*
     * Modify the DSDT Table to put the actural _PSS package
-	 * corefeq-->Pstate_feq[index] power-->Pstate_power[index] transitionlatency-->0x64 busmasterlatency-->0x7,
-	 * control-->0xE8202C00| Pstate_vid[index]<<6 | Pstate_fid[index]
+	 * corefeq-->Pstate_feq[index]
+	 * power-->Pstate_power[index]
+	 * transitionlatency-->0x64
+	 * busmasterlatency-->0x7,
+	 * control--> 0xE8202800| Pstate_vid[index]<<6 | Pstate_fid[index]
     * status --> Pstate_vid[index]<<6 | Pstate_fid[index]
     * Get the _PSS control method Sig.
     */
@@ -461,7 +464,13 @@
    			transitionlatency = 0x64;
    			busmasterlatency = 0x7;
    			control =
-				    0xE8202C00 | (Pstate_vid[index] << 6) |
+				    (0x3 << 30) | /* IRT */
+				    (0x2 << 28) | /* RVO */
+				    (0x1 << 27) | /* ExtType */
+				    (0x2 << 20) | /* PLL_LOCK_TIME */
+				    (0x0 << 18) | /* MVS */
+				    (0x5 << 11) | /* VST */
+				    (Pstate_vid[index] << 6) |
    			    Pstate_fid[index];
    			status =
    			    (Pstate_vid[index] << 6) |

Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c	2009-01-16 03:44:41 UTC (rev 3867)
+++ trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c	2009-01-16 12:44:41 UTC (rev 3868)
@@ -400,10 +400,10 @@
    	Pstate_num++;
    }

-	/* Print Pstate feq,vid,volt,power */
+	/* Print Pstate freq,vid,volt,power */

for (index = 0; index < Pstate_num; index++) {
-		printk_info("Pstate_feq[%d] = %dMHz\t", index,
+		printk_info("Pstate_freq[%d] = %dMHz\t", index,
    		    Pstate_feq[index]);
    	printk_info("Pstate_vid[%d] = %d\t", index, Pstate_vid[index]);
    	printk_info("Pstate_volt[%d] = %dmv\t", index,
@@ -414,8 +414,11 @@

/*
     * Modify the DSDT Table to put the actural _PSS package
-	 * corefeq-->Pstate_feq[index] power-->Pstate_power[index] transitionlatency-->0x64 busmasterlatency-->0x7,
-	 * control-->0xE8202C00| Pstate_vid[index]<<6 | Pstate_fid[index]
+	 * corefeq-->Pstate_feq[index]
+	 * power-->Pstate_power[index]
+	 * transitionlatency-->0x64
+	 * busmasterlatency-->0x7,
+	 * control--> 0xE8202800| Pstate_vid[index]<<6 | Pstate_fid[index]
     * status --> Pstate_vid[index]<<6 | Pstate_fid[index]
     * Get the _PSS control method Sig.
     */
@@ -461,7 +464,13 @@
    			transitionlatency = 0x64;
    			busmasterlatency = 0x7;
    			control =
-				    0xE8202C00 | (Pstate_vid[index] << 6) |
+				    (0x3 << 30) | /* IRT */
+				    (0x2 << 28) | /* RVO */
+				    (0x1 << 27) | /* ExtType */
+				    (0x2 << 20) | /* PLL_LOCK_TIME */
+				    (0x0 << 18) | /* MVS */
+				    (0x5 << 11) | /* VST */
+				    (Pstate_vid[index] << 6) |
    			    Pstate_fid[index];
    			status =
    			    (Pstate_vid[index] << 6) |