Hi all,
I'm porting coreboot to custom hardware (Geode LX-based). The system is equipped with on-board DDR chips (no DIMMs). Since OLPC platform has similar SDRAM configuration, I was thinking about using the mainboard/olpc/btest/auto.c file as a starting point. However this file includes GX2 stuff #include "northbridge/amd/gx2/raminit.c" so it seems it refers to old version of hardware.
Which LX-based platform do you suggest to use as starting point instead?
TIA, llandre
DAVE Electronics System House - R&D Department web: http://www.dave.eu email: r&d2@dave-tech.it
first recommendation -- use v3, not v2. Second, do you have a PCI bus? Either way, start with dbe62 or alix1c, which both had soldered-on parts, not socketed memory.
Why v3? I continue to prefer it, because it's just a lot better code base and it gets better every week. Jordan and Marc will probably disagree with me; if so, trust them, not me :-)
For v2, others can tell you the best port, but it's probably the dbe62.
Ignore the olpc stuff, it's old and musty.
thanks
ron
llandre wrote:
Hi all,
I'm porting coreboot to custom hardware (Geode LX-based). The system is equipped with on-board DDR chips (no DIMMs). Since OLPC platform has similar SDRAM configuration, I was thinking about using the mainboard/olpc/btest/auto.c file as a starting point. However this file includes GX2 stuff #include "northbridge/amd/gx2/raminit.c" so it seems it refers to old version of hardware.
Which LX-based platform do you suggest to use as starting point instead?
TIA, llandre
DAVE Electronics System House - R&D Department web: http://www.dave.eu email: r&d2@dave-tech.it
I recommend that you look at the way it was done in the dbe61 mainboard inv2 or the dbe62 in v3. You will need to make adjustments based on the memory configuration and speed. You need to make a virtual spd for the memory init code to use. If you need to reverse engineer the settings the MSRs to look at are the following:
0x20000018 0x20000019 0x2000001a 0x2000001f 0x2000001d 0x20000020 0x4c000014
Marc