Hello everyone,
I am trying to port coreboot to the Asus P5G41T-M LX motherboard but I got stuck.
This motherboard has: - Northbridge: Intel G41 - Southbridge: ICH7 - Super IO: w83627dhg
I used the Gigabye GA-G41M-ES2L code as base since I think it has the same north- and southbridge. That motherboard has a different Super IO chip though.
I tried to make the devicetree.cb file valid and I replaced the superio code in romstage.c with code for the superIO chip on my board. I also tried to set the correct values in the init code for the superio chip (irq routing etc).
In romstage.c I added some post codes. The motherboard gets to postcode 0xA6 and then stops.
Serial output is not working (cable / connection has been tested from within Linux). Terminal is connected at 115200 baud. No data is received.
What I have so far: https://github.com/rnplus/test-coreboot-for-asus-p5g41t-m-lx
Logs / info about the board (generated by autoport): https://github.com/rnplus/test-coreboot-for-asus-p5g41t-m-lx/tree/maste r/autoport_logs
It would be nice if someone could point me in the right direction as to what to do next.
Thank you!
Greetings, Renze Nicolai
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Renze Nicolai