2007/10/1, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net:
On 30.09.2007 22:03, Alan Carvalho de Assis wrote:
Hi Carl-Daniel,
2007/9/28, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net: sic
Yes, looking for testers.
Currently I'm off finishing my master degree thesis but I still reading LB posts and I want to know if exist some memory size limitation on LPC-to-SPI?
Yes, but it depends on the translation chip. For the IT8176F, we get exactly 1152kBytes if we can trust the datasheet. I prefer not to trust it, but so far nodoby has done experiments.
So it needs more some experiments.
Today we are limited at 2MB BIOS LPC flash but SPI flash can have too many mega bytes. Is possible to use bigger SPI flash using this LPC-to-SPI convertion?
Yes and no. You can still read chips up to 16MBytes by hand, but it is CPU-intensive. I might write a driver for that in the future, though. Please note that more than 16MBytes can't be addressed with the SPI flash protocol because of its limitation to 24bit addresses.
Sure. At SST web site the max. flash size I found is 4MBytes (32Mbits).
If you ever find a SPI flash chip with more than 16MBytes, please tell me. I'd like to take a look at its data sheet.
I never work with SPI flash. But I think an option is to use 2 chips and select them using chip selects (it needs some hacks).
Carl-Daniel
Cheers,
Alan
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Alan Carvalho de Assis