Patch merged into coreboot/master: 3316cf2 Claim the SPI bus before writes if the IMC ROM is present

the following patch was just integrated into master:
commit 3316cf2ff80f379b609115f375f73ef4b9e7d8f4
Author: Martin Roth 
Date:   Wed Dec 5 16:22:54 2012 -0700

Claim the SPI bus before writes if the IMC ROM is present

The SB800 and Hudson now support adding the IMC ROM which runs from the same
    chip as coreboot.  When the IMC is running, write or erase commands sent to
    the spi bus will fail, and the IMC will die.  To fix this, we send a request
    to the IMC to stop fetching from the SPI rom while we write to it. This
    process (in one form or another) is required for writes to the SPI bus while
    the IMC is running.

Because the IMC can take up to 500ms to respond every time we claim the
    bus, this patch tries to keep the number of times we need to do that to a
    minimum.  We only need to claim the bus on writes, and using a counter for
    the semaphore allows us to call in once to claim the bus at the beginning
    of a number of transactions and it will stay claimed until we release it
    at the end of the transactions.

Claim() - takes up to 500ms hit
        claim() - no delay
            erase()
        release()
        claim() - no delay
            write()
        release()
    Release()

Change-Id: I4e003c5122a2ed47abce57ab8b92dee6aa4713ed
    Signed-off-by: Martin Roth 
    Reviewed-on: http://review.coreboot.org/1976
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi

Reviewed-By: Patrick Georgi  at Tue Dec 11 14:14:15 2012, giving +2
Build-Tested: build bot (Jenkins) at Tue Dec 11 03:19:33 2012, giving +1
See http://review.coreboot.org/1976 for details.

-gerrit