Hello. Sorry to bother you all with a BIOS problem ...
I have a large number of old HP DL145 G1 servers with two Opteron 248 each (single core). I want to upgrade the CPU's to Opteron 280 (dualcore).
I have tried to simply install two 280 CPU's and boot up. The BIOS bootup process first seems to work fine detecting the harddrive, USB, management processor, memory etc. Then there is a warning text "Warning: Unknown processor. Please contact your BIOS vendor for appropriate updates". After that it detects the BMC
I already have the last BIOS available from HP (from 21/7 2005) installed.
Would it be possible to tweak coreboot to make these servers work with dualcore CPU's?
The DL145 G1 Mobo is a re-branded Celestica A2210.
Thanks! /Oskar
Here follows output from lcpci, lspci -tvnn and dmidecode on one of the servers.
[root@cl001 coreboot]# lspci 00:01.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12) 00:01.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC (rev 01) 00:02.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12) 00:02.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC (rev 01) 00:06.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8111 PCI (rev 07) 00:07.0 ISA bridge: Advanced Micro Devices [AMD] AMD-8111 LPC (rev 05) 00:07.1 IDE interface: Advanced Micro Devices [AMD] AMD-8111 IDE (rev 03) 00:07.3 Bridge: Advanced Micro Devices [AMD] AMD-8111 ACPI (rev 05) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 00:19.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:19.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:19.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:19.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 01:00.0 USB Controller: Advanced Micro Devices [AMD] AMD-8111 USB (rev 0b) 01:00.1 USB Controller: Advanced Micro Devices [AMD] AMD-8111 USB (rev 0b) 01:04.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) 02:03.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet (rev 03) 02:03.1 Ethernet controller: Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet (rev 03) 03:01.0 Network controller: MYRICOM Inc. Myrinet 2000 Scalable Cluster Interconnect (rev 04)
bash-3.2$ lspci -tvnn -[0000:00]-+-01.0-[0000:03]----01.0 14c1:8043 +-01.1 1022:7451 +-02.0-[0000:02]--+-03.0 14e4:1648 | -03.1 14e4:1648 +-02.1 1022:7451 +-06.0-[0000:01]--+-00.0 1022:7464 | +-00.1 1022:7464 | -04.0 1002:4752 +-07.0 1022:7468 +-07.1 1022:7469 +-07.3 1022:746b +-18.0 1022:1100 +-18.1 1022:1101 +-18.2 1022:1102 +-18.3 1022:1103 +-19.0 1022:1100 +-19.1 1022:1101 +-19.2 1022:1102 -19.3 1022:1103
# dmidecode 2.10 SMBIOS 2.3 present. 64 structures occupying 2400 bytes. Table at 0x000F85B0.
Handle 0x0000, DMI type 0, 20 bytes BIOS Information Vendor: American Megatrends Inc. Version: 080008 Release Date: 07/21/2005 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 512 kB Characteristics: ISA is supported PCI is supported PNP is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 kB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Function key-initiated network boot is supported
Handle 0x0001, DMI type 1, 25 bytes System Information Manufacturer: HP Product Name: ProLiant DL145 G1 Version: Serial Number: 8022MNMZ49 UUID: 91FAEE80-5664-11D9-8000-00001A1A5F86 Wake-up Type: Power Switch
Handle 0x0002, DMI type 2, 8 bytes Base Board Information Manufacturer: HP Product Name: PCBA Serenade-3 V0100219-300 Version: Serial Number:
Handle 0x0003, DMI type 3, 17 bytes Chassis Information Manufacturer: HP Type: Rack Mount Chassis Lock: Not Present Version: Serial Number: Asset Tag: ................ Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000000
Handle 0x0004, DMI type 4, 35 bytes Processor Information Socket Designation: H0 Type: Central Processor Family: Opteron Manufacturer: AMD ID: 5A 0F 00 00 FF FB 8B 07 Signature: Family 15, Model 5, Stepping 10 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) MMX (MMX technology supported) FXSR (Fast floating-point save and restore) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) Version: AMD Opteron(tm) Processor 248 Voltage: 3.3 V 2.9 V External Clock: 200 MHz Max Speed: 2200 MHz Current Speed: 2200 MHz Status: Populated, Enabled Upgrade: Socket 940 L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: 0x0007 Serial Number: Not Implemented Asset Tag: Not Implemented Part Number: Not Implemented
Handle 0x0005, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 64 kB Maximum Size: 64 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Data Associativity: 4-way Set-associative
Handle 0x0006, DMI type 7, 19 bytes Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 1024 kB Maximum Size: 1024 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Unified Associativity: 4-way Set-associative
Handle 0x0007, DMI type 7, 19 bytes Cache Information Socket Designation: L3-Cache Configuration: Disabled, Not Socketed, Level 3 Operational Mode: Unknown Location: Internal Installed Size: 0 kB Maximum Size: 0 kB Supported SRAM Types: Unknown Installed SRAM Type: Unknown Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown
Handle 0x0008, DMI type 4, 35 bytes Processor Information Socket Designation: H1 Type: Central Processor Family: Opteron Manufacturer: AMD ID: 5A 0F 00 00 FF FB 8B 07 Signature: Family 15, Model 5, Stepping 10 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) MMX (MMX technology supported) FXSR (Fast floating-point save and restore) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) Version: AMD Opteron(tm) Processor 248 Voltage: 3.3 V 2.9 V External Clock: 200 MHz Max Speed: 2200 MHz Current Speed: 2200 MHz Status: Populated, Enabled Upgrade: Socket 940 L1 Cache Handle: 0x0009 L2 Cache Handle: 0x000A L3 Cache Handle: 0x000B Serial Number: Not Implemented Asset Tag: Not Implemented Part Number: Not Implemented
Handle 0x0009, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 64 kB Maximum Size: 64 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Data Associativity: 4-way Set-associative
Handle 0x000A, DMI type 7, 19 bytes Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 1024 kB Maximum Size: 1024 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Unified Associativity: 4-way Set-associative
Handle 0x000B, DMI type 7, 19 bytes Cache Information Socket Designation: L3-Cache Configuration: Disabled, Not Socketed, Level 3 Operational Mode: Unknown Location: Internal Installed Size: 0 kB Maximum Size: 0 kB Supported SRAM Types: Unknown Installed SRAM Type: Unknown Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown
Handle 0x000C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1A1 Internal Connector Type: None External Reference Designator: PS2Mouse External Connector Type: PS/2 Port Type: Mouse Port
Handle 0x000D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1A1 Internal Connector Type: None External Reference Designator: Keyboard External Connector Type: PS/2 Port Type: Keyboard Port
Handle 0x000E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A2 Internal Connector Type: None External Reference Designator: USB1 External Connector Type: Access Bus (USB) Port Type: USB
Handle 0x000F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A2 Internal Connector Type: None External Reference Designator: USB2 External Connector Type: Access Bus (USB) Port Type: USB
Handle 0x0010, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A1 Internal Connector Type: None External Reference Designator: COM A External Connector Type: DB-9 male Port Type: Serial Port 16550A Compatible
Handle 0x0011, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6A1 Internal Connector Type: None External Reference Designator: Audio Mic In External Connector Type: Mini Jack (headphones) Port Type: Audio Port
Handle 0x0012, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6A1 Internal Connector Type: None External Reference Designator: Audio Line In External Connector Type: Mini Jack (headphones) Port Type: Audio Port
Handle 0x0013, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6B1 - AUX IN Internal Connector Type: On Board Sound Input From CD-ROM External Reference Designator: Not Specified External Connector Type: None Port Type: Audio Port
Handle 0x0014, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6B2 - CDIN Internal Connector Type: On Board Sound Input From CD-ROM External Reference Designator: Not Specified External Connector Type: None Port Type: Audio Port
Handle 0x0015, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6J2 - PRI IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0016, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6J1 - SEC IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0017, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J4J1 - FLOPPY Internal Connector Type: On Board Floppy External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0018, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9H1 - FRONT PNL Internal Connector Type: 9 Pin Dual Inline (pin 10 cut) External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0019, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1B1 - CHASSIS REAR FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2F1 - CPU FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J8B4 - FRONT FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9G2 - FNT USB Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6C3 - FP AUD Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9G1 - CONFIG Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x001F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J8C1 - SCSI LED Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0020, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9J2 - INTRUDER Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0021, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9G4 - ITP Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0022, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2H1 - MAIN POWER Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other
Handle 0x0023, DMI type 9, 13 bytes System Slot Information Designation: AGP Type: 32-bit AGP 4x Current Usage: Available Length: Short ID: 0 Characteristics: 3.3 V is provided Opening is shared PME signal is supported
Handle 0x0024, DMI type 9, 13 bytes System Slot Information Designation: PCI1 Type: 32-bit PCI Current Usage: In Use Length: Short ID: 1 Characteristics: 3.3 V is provided Opening is shared PME signal is supported
Handle 0x0025, DMI type 126, 6 bytes Inactive
Handle 0x0026, DMI type 10, 6 bytes On Board Device Information Type: Ethernet Status: Enabled Description: Broadcom LAN
Handle 0x0027, DMI type 10, 6 bytes On Board Device Information Type: Other Status: Enabled Description: QLogic BMC
Handle 0x0028, DMI type 13, 22 bytes BIOS Language Information Installable Languages: 1 en|US|iso8859-1 Currently Installed Language: en|US|iso8859-1
Handle 0x0029, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: Single-bit ECC Maximum Capacity: 8 GB Error Information Handle: Not Provided Number Of Devices: 4
Handle 0x002A, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000F9FFFFFF Range Size: 4000 MB Physical Array Handle: 0x0029 Partition Width: 0
Handle 0x002B, DMI type 17, 27 bytes Memory Device Array Handle: 0x0029 Error Information Handle: Not Provided Total Width: 72 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: H0_DIMM0 Bank Locator: BANK0 Type: DDR Type Detail: Synchronous Speed: 333 MHz Manufacturer: Manufacturer1 Serial Number: SerNum1 Asset Tag: AssetTagNum1 Part Number: PartNum1
Handle 0x002C, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Device Handle: 0x002B Memory Array Mapped Address Handle: 0x002A Partition Row Position: 1
Handle 0x002D, DMI type 17, 27 bytes Memory Device Array Handle: 0x0029 Error Information Handle: Not Provided Total Width: 72 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: H0_DIMM1 Bank Locator: BANK1 Type: DDR Type Detail: Synchronous Speed: 333 MHz Manufacturer: Manufacturer2 Serial Number: SerNum2 Asset Tag: AssetTagNum2 Part Number: PartNum2
Handle 0x002E, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00040000000 Ending Address: 0x0007FFFFFFF Range Size: 1 GB Physical Device Handle: 0x002D Memory Array Mapped Address Handle: 0x002A Partition Row Position: 1
Handle 0x002F, DMI type 17, 27 bytes Memory Device Array Handle: 0x0029 Error Information Handle: Not Provided Total Width: 64 bits Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: H0_DIMM2 Bank Locator: BANK2 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer3 Serial Number: SerNum3 Asset Tag: AssetTagNum3 Part Number: PartNum3
Handle 0x0030, DMI type 126, 19 bytes Inactive
Handle 0x0031, DMI type 17, 27 bytes Memory Device Array Handle: 0x0029 Error Information Handle: Not Provided Total Width: 64 bits Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: H0_DIMM3 Bank Locator: BANK3 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer4 Serial Number: SerNum4 Asset Tag: AssetTagNum4 Part Number: PartNum4
Handle 0x0032, DMI type 126, 19 bytes Inactive
Handle 0x0033, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: Single-bit ECC Maximum Capacity: 8 GB Error Information Handle: Not Provided Number Of Devices: 4
Handle 0x0034, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000F9FFFFFF Range Size: 4000 MB Physical Array Handle: 0x0033 Partition Width: 0
Handle 0x0035, DMI type 17, 27 bytes Memory Device Array Handle: 0x0033 Error Information Handle: Not Provided Total Width: 72 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: H1_DIMM0 Bank Locator: BANK4 Type: DDR Type Detail: Synchronous Speed: 333 MHz Manufacturer: Manufacturer5 Serial Number: SerNum5 Asset Tag: AssetTagNum5 Part Number: PartNum5
Handle 0x0036, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00080000000 Ending Address: 0x000BFFFFFFF Range Size: 1 GB Physical Device Handle: 0x0035 Memory Array Mapped Address Handle: 0x0034 Partition Row Position: 1
Handle 0x0037, DMI type 17, 27 bytes Memory Device Array Handle: 0x0033 Error Information Handle: Not Provided Total Width: 72 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: H1_DIMM1 Bank Locator: BANK5 Type: DDR Type Detail: Synchronous Speed: 333 MHz Manufacturer: Manufacturer6 Serial Number: SerNum6 Asset Tag: AssetTagNum6 Part Number: PartNum6
Handle 0x0038, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x000C0000000 Ending Address: 0x000FFFFFFFF Range Size: 1 GB Physical Device Handle: 0x0037 Memory Array Mapped Address Handle: 0x0034 Partition Row Position: 1
Handle 0x0039, DMI type 17, 27 bytes Memory Device Array Handle: 0x0033 Error Information Handle: Not Provided Total Width: 64 bits Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: H1_DIMM2 Bank Locator: BANK6 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer7 Serial Number: SerNum7 Asset Tag: AssetTagNum7 Part Number: PartNum7
Handle 0x003A, DMI type 126, 19 bytes Inactive
Handle 0x003B, DMI type 17, 27 bytes Memory Device Array Handle: 0x0033 Error Information Handle: Not Provided Total Width: 64 bits Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: H1_DIMM3 Bank Locator: BANK7 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer8 Serial Number: SerNum8 Asset Tag: AssetTagNum8 Part Number: PartNum8
Handle 0x003C, DMI type 126, 19 bytes Inactive
Handle 0x003D, DMI type 32, 20 bytes System Boot Information Status: No errors detected
Handle 0x003E, DMI type 38, 16 bytes IPMI Device Information Interface Type: KCS (Keyboard Control Style) Specification Version: 1.5 I2C Slave Address: 0x00 NV Storage Device: Not Present Base Address: 0x0000000000000CA2 (Memory-mapped)
Handle 0x003F, DMI type 127, 4 bytes End Of Table
On Thu, Aug 5, 2010 at 9:59 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Hello. Sorry to bother you all with a BIOS problem ...
I have a large number of old HP DL145 G1 servers with two Opteron 248 each (single core). I want to upgrade the CPU's to Opteron 280 (dualcore).
I have tried to simply install two 280 CPU's and boot up. The BIOS bootup process first seems to work fine detecting the harddrive, USB, management processor, memory etc. Then there is a warning text "Warning: Unknown processor. Please contact your BIOS vendor for appropriate updates". After that it detects the BMC
I already have the last BIOS available from HP (from 21/7 2005) installed.
Would it be possible to tweak coreboot to make these servers work with dualcore CPU's?
Definitely possible. Probably pretty easy. It's very similar to the amd serengeti_cheetah. If you want to support it, you could start by running superiotool to find out what superio you have. If it is the same as serengeti_cheetah there should be very little work required to support it.
The wiki has useful information about superiotool and getting started.
Thanks, Myles
On 08/05/2010 08:03 PM, Myles Watson wrote:
On Thu, Aug 5, 2010 at 9:59 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Hello. Sorry to bother you all with a BIOS problem ...
I have a large number of old HP DL145 G1 servers with two Opteron 248 each (single core). I want to upgrade the CPU's to Opteron 280 (dualcore).
I have tried to simply install two 280 CPU's and boot up. The BIOS bootup process first seems to work fine detecting the harddrive, USB, management processor, memory etc. Then there is a warning text "Warning: Unknown processor. Please contact your BIOS vendor for appropriate updates". After that it detects the BMC
I already have the last BIOS available from HP (from 21/7 2005) installed.
Would it be possible to tweak coreboot to make these servers work with dualcore CPU's?
Definitely possible. Probably pretty easy. It's very similar to the amd serengeti_cheetah. If you want to support it, you could start by running superiotool to find out what superio you have. If it is the same as serengeti_cheetah there should be very little work required to support it.
The wiki has useful information about superiotool and getting started.
Thanks, Myles
Thanks for responding!
I compiled superiotool from coreboot trunk, and flashrom from the latest release 0.9.2. The output from "superiotool", "superiotool -dV" and "flashrom -V" follows. I hope someone can make something out of it. As for Serengeti Cheetah compared to Serenade I see the numbers 8111, 8151 and 8132 listed for Serengeti, but my lspci only mentions 8111 and 8131. How significant is that?
[root@cl001 superiotool]# ./superiotool superiotool r Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e [root@cl001 superiotool]# ./superiotool -dV superiotool r Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x80fe, id=0x3a52 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0x0000, id=0x0035 Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x523a, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0x3500, rev=0x0 Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0x3500, rev=0x0 Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0x3500, rev=0x0 Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0x3500, rev=0x0 Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0x3500, rev=0x0 Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: sid=0x35, srid=0x03 Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0x00, rev=0x00 Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0x35, rev=0x00 Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f val ff 52 3a ff fe 80 00 00 00 00 7c 01 ff 00 ff def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 03 78 07 03 3f def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 00 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 42 def 01 00 60 00 64 01 0c 80 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, MIDI port, GPIO 1) idx 30 60 61 62 63 70 f0 f1 f2 val 00 02 01 03 30 09 ff ff ff def 00 02 01 03 30 09 ff 00 00 LDN 0x08 (GPIO 2, watchdog timer) idx 30 f0 f1 f2 f3 f5 f6 f6 f7 val 00 ff ff ff 00 40 00 00 00 def 00 ff 00 00 00 00 00 00 00 LDN 0x09 (GPIO 3) idx 30 f0 f1 f2 f3 val 00 ff ff ff 00 def 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 01 00 00 00 10 00 a0 00 00 00 00 8f 10 00 00 20 05 00 00 def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 val 01 02 90 00 00 def 00 00 00 00 00 Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0x35/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0x35/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0x35/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0x35/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found.
[root@cl001 flashrom-0.9.2]# ./flashrom -V flashrom v0.9.2-r1001 on Linux 2.6.33.7-dl145 (x86_64), built with libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-46)
flashrom is free software, get the source code at http://www.flashrom.org
Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "HP" DMI string system-product-name: "ProLiant DL145 G1" DMI string system-version: " " DMI string baseboard-manufacturer: "HP" DMI string baseboard-product-name: "PCBA Serenade-3 V0100219-300" DMI string baseboard-version: " " DMI string chassis-type: "Rack Mount Chassis" Found chipset "AMD AMD8111", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 1089M loops per second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 1008 us, 10000 myus = 10011 us, OK. Probing for AMD Am29F010A/B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F080B, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV081B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT29C010A, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT29C020, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT29C040A, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT49F002(N), 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A29002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A29002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A29040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for EMST F49B002UA, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Intel 28F001BX-T, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Intel 28F004S5, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004BV/BE-B, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004BV/BE-T, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/CV/CE-B, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/CV/CE-T, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX29LV040, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm39LV010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST29LE010, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST29EE020A, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST29LE020, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39SF512, 64 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39SF010A, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39SF020A, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39SF040, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39VF512, 64 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39VF010, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39VF020, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39VF040, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST39VF080, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF004C, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Found chip "SST SST49LF040" (512 KB, LPC) at physical address 0xfff80000. Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 KB: probe_jedec_common: id1 0x51, id2 0x53, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SyncMOS S29C51001T, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SyncMOS S29C51002T, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for SyncMOS S29C51004T, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for TI TMS29F002RB, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 KB: probe_jedec_common: id1 0x43, id2 0x48, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W29C020C, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W29C040P, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xbf, id2 0x51 Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x51 Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for EON unknown EON SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified.
On Thu, Aug 5, 2010 at 1:58 PM, Oskar Enoksson enok@lysator.liu.se wrote:
On 08/05/2010 08:03 PM, Myles Watson wrote:
On Thu, Aug 5, 2010 at 9:59 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Hello. Sorry to bother you all with a BIOS problem ...
I have a large number of old HP DL145 G1 servers with two Opteron 248 each (single core). I want to upgrade the CPU's to Opteron 280 (dualcore).
I have tried to simply install two 280 CPU's and boot up. The BIOS bootup process first seems to work fine detecting the harddrive, USB, management processor, memory etc. Then there is a warning text "Warning: Unknown processor. Please contact your BIOS vendor for appropriate updates". After that it detects the BMC
I already have the last BIOS available from HP (from 21/7 2005) installed.
Would it be possible to tweak coreboot to make these servers work with dualcore CPU's?
Definitely possible. Probably pretty easy. It's very similar to the amd serengeti_cheetah. If you want to support it, you could start by running superiotool to find out what superio you have. If it is the same as serengeti_cheetah there should be very little work required to support it.
The wiki has useful information about superiotool and getting started.
Thanks, Myles
Thanks for responding!
I compiled superiotool from coreboot trunk, and flashrom from the latest release 0.9.2. The output from "superiotool", "superiotool -dV" and "flashrom -V" follows. I hope someone can make something out of it. As for Serengeti Cheetah compared to Serenade I see the numbers 8111, 8151 and 8132 listed for Serengeti, but my lspci only mentions 8111 and 8131. How significant is that?
Significant. Try the tyan/s2880, tyan/s2882, or another similar one. They have the same superio too.
I think you'd get some debug output right away if you just flashed a s2880 image to your board and watched the serial port.
You may need to modify src/mainboard/tyan/s2880/devicetree.cb
There's no ACPI support for that board, so if you need that you'll have to implement it.
[root@cl001 superiotool]# ./superiotool superiotool r Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e [root@cl001 superiotool]# ./superiotool -dV superiotool r
Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x3a) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f val ff 52 3a ff fe 80 00 00 00 00 7c 01 ff 00 ff def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 03 78 07 03 3f def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 00 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 42 def 01 00 60 00 64 01 0c 80 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, MIDI port, GPIO 1) idx 30 60 61 62 63 70 f0 f1 f2 val 00 02 01 03 30 09 ff ff ff def 00 02 01 03 30 09 ff 00 00 LDN 0x08 (GPIO 2, watchdog timer) idx 30 f0 f1 f2 f3 f5 f6 f6 f7 val 00 ff ff ff 00 40 00 00 00 def 00 ff 00 00 00 00 00 00 00 LDN 0x09 (GPIO 3) idx 30 f0 f1 f2 f3 val 00 ff ff ff 00 def 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 01 00 00 00 10 00 a0 00 00 00 00 8f 10 00 00 20 05 00 00 def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 val 01 02 90 00 00 def 00 00 00 00 00
[root@cl001 flashrom-0.9.2]# ./flashrom -V flashrom v0.9.2-r1001 on Linux 2.6.33.7-dl145 (x86_64), built with libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-46)
flashrom is free software, get the source code at http://www.flashrom.org
Found chip "SST SST49LF040" (512 KB, LPC) at physical address 0xfff80000.
If you get stuck, the Wiki is your friend. You can also send your serial logs to the mailing list with questions.
Good luck, Myles
Myles Watson wrote:
On Thu, Aug 5, 2010 at 1:58 PM, Oskar Enoksson enok@lysator.liu.se wrote:
On 08/05/2010 08:03 PM, Myles Watson wrote:
Thanks for responding!
I compiled superiotool from coreboot trunk, and flashrom from the latest release 0.9.2. The output from "superiotool", "superiotool -dV" and "flashrom -V" follows. I hope someone can make something out of it. As for Serengeti Cheetah compared to Serenade I see the numbers 8111, 8151 and 8132 listed for Serengeti, but my lspci only mentions 8111 and 8131. How significant is that?
Significant. Try the tyan/s2880, tyan/s2882, or another similar one. They have the same superio too.
I think you'd get some debug output right away if you just flashed a s2880 image to your board and watched the serial port.
You may need to modify src/mainboard/tyan/s2880/devicetree.cb
There's no ACPI support for that board, so if you need that you'll have to implement it.
Ok. I think the Tyan S2881 looks like the most similar candidate for the Dl145G1 / A2210 motherboard, so I'm using that as template.
Ant I'm able to read the existing BIOS from the 512k Flash ROM "SST49LF040" to a file using "flashrom -r" so now I have a backup. And I'm able to compile a new image from the S2881 template in coreboot. But do I dare to write the new image using flashrom? What happens if I can't boot? Do I have to buy some hardware flash programming dongle?
I can see a 2x10-pin connector on the motherboard marked "LPC". Is that where the flash programmer should be connected?
Or is it possible to program the flash even without a working BIOS through the superio chip using the RS232 port somehow? Is that what the "-p serprog" option in flashrom is for?
Sorry for all the questions ...
06.08.2010 12:52, Oskar Enoksson пишет:
What happens if I can't boot? Do I have to buy some hardware flash programming dongle?
Yes, of course. But it'll be better to buy (or ask in some PC service) spare 4Mbit LPC flash
Am Freitag, den 06.08.2010, 12:58 +0300 schrieb Andrew:
06.08.2010 12:52, Oskar Enoksson пишет:
What happens if I can't boot? Do I have to buy some hardware flash programming dongle?
Yes, of course. But it'll be better to buy (or ask in some PC service) spare 4Mbit LPC flash
Oskar, did not you write in your original message, that you have several of these boards? So you already have spare chips. If something goes wrong with A, just boot one of the working boards (B), hot swap the chips (A in B) and reprogram A again and try again. (Works also the other way around.) Just be careful to always have a working board.
Thanks,
Paul
you did the flashrom -r. First step.
Take a second chip. Burn the factory bios onto that chip with flashrom -w.
Try to boot it. Make sure that works.
Then burn a third chip with factory bios.
Then take the original and a backup and put them somewhere safe. If you only have ONE factory bios part, you will at some point make a mistake and burn it with a bad bios image: that's a guarantee. So make sure you have two factory BIOS chips and label them well, and put one where it is impossible to pick it up by mistake and burn it.
If you can set up one machine as a "burner" and one as a "development" that's the best.
Then it's time to start trying to get coreboot going with the third chip.
ron
Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without stopping the "development server" , then moving it to the target server and power it up (although it takes some effort to avoid bending the pins)
However I'm not getting any output whatsoever from the target server. Nothing on the serial port, nothing on the VGA output.
If I restore the original BIOS content using "flashrom" the target server BIOS starts again as before, so I know that the erase/write process works. It's the coreboot image file that is somehow wrong.
What to do? Any hints? I've put my mainboard/hp/dl145_g1 directory contents at http://www.lysator.liu.se/~enok/dl145_g1/
I don't fully understand the structure of devicetree.cb and how it should correlate to the output of "lspci -tv". Below is my lspci. What should devicetree.cb look like?
Thanks!
bash% /sbin/lspci -tv -[0000:00]-+-01.0-[0000:03]-- +-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-02.0-[0000:02]--+-03.0 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet | -03.1 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet +-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-06.0-[0000:01]--+-00.0 Advanced Micro Devices [AMD] AMD-8111 USB | +-00.1 Advanced Micro Devices [AMD] AMD-8111 USB | -04.0 ATI Technologies Inc Rage XL +-07.0 Advanced Micro Devices [AMD] AMD-8111 LPC +-07.1 Advanced Micro Devices [AMD] AMD-8111 IDE +-07.3 Advanced Micro Devices [AMD] AMD-8111 ACPI +-18.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-18.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-18.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller +-18.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control +-19.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-19.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-19.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller -19.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
ron minnich wrote:
you did the flashrom -r. First step.
Take a second chip. Burn the factory bios onto that chip with flashrom -w.
Try to boot it. Make sure that works.
Then burn a third chip with factory bios.
Then take the original and a backup and put them somewhere safe. If you only have ONE factory bios part, you will at some point make a mistake and burn it with a bad bios image: that's a guarantee. So make sure you have two factory BIOS chips and label them well, and put one where it is impossible to pick it up by mistake and burn it.
If you can set up one machine as a "burner" and one as a "development" that's the best.
Then it's time to start trying to get coreboot going with the third chip.
ron
On Sat, Aug 7, 2010 at 9:57 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without stopping the "development server" , then moving it to the target server and power it up (although it takes some effort to avoid bending the pins)
Great.
However I'm not getting any output whatsoever from the target server. Nothing on the serial port, nothing on the VGA output.
Have you tested the serial port under Linux? I'm surprised that you don't see anything since the board is so similar.
If I restore the original BIOS content using "flashrom" the target server BIOS starts again as before, so I know that the erase/write process works. It's the coreboot image file that is somehow wrong.
Good.
What to do? Any hints? I've put my mainboard/hp/dl145_g1 directory contents at http://www.lysator.liu.se/~enok/dl145_g1/
Do you have a POST (power on self test) card? That could help.
Have you tried hot swapping the BIOS? Boot the factory BIOS into Linux, replace with the coreboot BIOS, and restart. I don't think that should matter, but I'm really surprised that you don't see any serial port output.
I don't fully understand the structure of devicetree.cb and how it should correlate to the output of "lspci -tv". Below is my lspci. What should devicetree.cb look like?
Unfortunately you can't tell from the lspci which link the HyperTransport devices are connected to (You can tell from lspci -vvvxxxx -s 0:18.0.) There is a lot of serial port output before the device tree gets used, though, so we can put off worrying about that until later. The way to change which link the devices are on is to reorder the device pci 18.0 statements.
Right now the devices are on link 2:
device pci 18.0 on end # LDT0 device pci 18.0 on end # LDT1 device pci 18.0 on # LDT2 # devices on link 2, link 2 == LDT 2 chip southbridge/amd/amd8131 ... end
To put them on link 1:
device pci 18.0 on end # LDT0 device pci 18.0 on # LDT1 # devices on link 1, link 1 == LDT 1 chip southbridge/amd/amd8131 ... end device pci 18.0 on end # LDT2
To put them on link 0:
device pci 18.0 on # LDT0 # devices on link 0, link 0 == LDT 0 chip southbridge/amd/amd8131 ... end device pci 18.0 on end # LDT1 device pci 18.0 on end # LDT2
Thanks, Myles
On Mon, Aug 9, 2010 at 8:16 AM, Myles Watson mylesgw@gmail.com wrote:
On Sat, Aug 7, 2010 at 9:57 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without stopping the "development server" , then moving it to the target server and power it up (although it takes some effort to avoid bending the pins)
Great.
However I'm not getting any output whatsoever from the target server. Nothing on the serial port, nothing on the VGA output.
Have you tested the serial port under Linux? I'm surprised that you don't see anything since the board is so similar.
I wouldn't even copy the directory until you see serial output. If you've tested the serial port under Linux, then I would build coreboot images for boards with the same chipsets & SuperIO until you find one that gives you some output.
Thanks, Myles
Myles Watson wrote:
On Mon, Aug 9, 2010 at 8:16 AM, Myles Watson mylesgw@gmail.com wrote:
On Sat, Aug 7, 2010 at 9:57 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without stopping the "development server" , then moving it to the target server and power it up (although it takes some effort to avoid bending the pins)
Great.
However I'm not getting any output whatsoever from the target server. Nothing on the serial port, nothing on the VGA output.
Have you tested the serial port under Linux? I'm surprised that you don't see anything since the board is so similar.
I wouldn't even copy the directory until you see serial output. If you've tested the serial port under Linux, then I would build coreboot images for boards with the same chipsets & SuperIO until you find one that gives you some output.
Thanks, Myles
I'm finally getting output now. The problem was that this server has a IPMI board (HP calls it "ILO Integrated Lights Out management"). Somehow the server's hardware serial port is initially redirected to this management board and not to the RS232 port. By connecting to the management board through the dedicated IPMI ethernet port and using telnet I'm able to see the output that coreboot believes it's writing to the RS232 port.
... and after trying a few different motherboard configurations I got success: an image built from the Tyan S2881 image boots. Even the VGA screen wakes up in the end, displaying the last output from coreboot. Here is the end of the output:
coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000003ffeffff: RAM 3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES Wrote coreboot table at: 3fffe000 - 3fffe1a8 checksum 5169 coreboot table: 424 bytes. POST: 0x9e 0. FREE SPACE 40000000 00000000 1. GDT 3fff0200 00000200 2. IRQ TABLE 3fff0400 00001000 3. SMP TABLE 3fff1400 00001000 4. ACPI 3fff2400 0000bc00 5. COREBOOT 3fffe000 00002000 Check CBFS header at fffeffe0 magic is 4f524243 Found CBFS header at fffeffe0 Check fallback/coreboot_ram CBFS: follow chain: fff80000 + 38 + cb8a + align -> fff8cc00 Check CBFS: follow chain: fff8cc00 + 28 + 633b8 + align -> ffff0000 CBFS: Could not find file fallback/payload Boot failed.
On Tue, Aug 10, 2010 at 5:43 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Myles Watson wrote:
On Mon, Aug 9, 2010 at 8:16 AM, Myles Watson mylesgw@gmail.com wrote:
On Sat, Aug 7, 2010 at 9:57 AM, Oskar Enoksson enok@lysator.liu.se wrote:
Ok, I'm able to hotswap the BIOS chip, burn it and hot-remove it without stopping the "development server" , then moving it to the target server and power it up (although it takes some effort to avoid bending the pins)
Great.
However I'm not getting any output whatsoever from the target server. Nothing on the serial port, nothing on the VGA output.
Have you tested the serial port under Linux? I'm surprised that you don't see anything since the board is so similar.
I wouldn't even copy the directory until you see serial output. If you've tested the serial port under Linux, then I would build coreboot images for boards with the same chipsets & SuperIO until you find one that gives you some output.
Thanks, Myles
I'm finally getting output now. The problem was that this server has a IPMI board (HP calls it "ILO Integrated Lights Out management"). Somehow the server's hardware serial port is initially redirected to this management board and not to the RS232 port. By connecting to the management board through the dedicated IPMI ethernet port and using telnet I'm able to see the output that coreboot believes it's writing to the RS232 port.
Good catch.
... and after trying a few different motherboard configurations I got success: an image built from the Tyan S2881 image boots. Even the VGA screen wakes up in the end, displaying the last output from coreboot. Here is the end of the output:
coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000003ffeffff: RAM 3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES Wrote coreboot table at: 3fffe000 - 3fffe1a8 checksum 5169 coreboot table: 424 bytes. POST: 0x9e 0. FREE SPACE 40000000 00000000 1. GDT 3fff0200 00000200 2. IRQ TABLE 3fff0400 00001000 3. SMP TABLE 3fff1400 00001000 4. ACPI 3fff2400 0000bc00 5. COREBOOT 3fffe000 00002000 Check CBFS header at fffeffe0 magic is 4f524243 Found CBFS header at fffeffe0 Check fallback/coreboot_ram CBFS: follow chain: fff80000 + 38 + cb8a + align -> fff8cc00 Check CBFS: follow chain: fff8cc00 + 28 + 633b8 + align -> ffff0000 CBFS: Could not find file fallback/payload Boot failed.
So you need to add a payload (SeaBIOS, FILO, Grub...)
It looks promising.
Myles
That IPMI stuff is a huge pain in the neck. You can try to disable it as I did on the Dell.
src/mainboard/dell/s1850/romstage.c
ron
Ok thank you for all your help. I can boot and run Linux 2.6.33 now and I see all four CPU cores in /proc/cpuinfo. I compiled and added SeaBIOS as payload for coreboot and it works. I also compiled and added GPXE to the image and was able to PXE-boot. However, there are a few problems:
- The server has 4x1GB memory, but I only see 1GB. Why? What can I do?
- There is something wrong with the interrupts. When the kernel is initializing the ethernet interfaces it says
"Determining IP information for eth0...Disabling IRQ #19"
and then hangs for a long time, finally failing. If I add "irqpoll" to the kernel parameter list the server boots, but a myrinet network card installed in the PCI-X slot is still not able to set up interrupts and thus fails to initialize.
mx_driver 0000:01:01.0: can't find IRQ for PCI INT B; probably buggy MP table Board 0: Could not allocate legacy IRQ 0 mx WARN: Failed to initialize Myrinet Board at 0000:01:01.0 (-6)
Perhaps the below excerp from the serial port output of coreboot is significant?
POST: 0x66 Allocating resources... Reading resources... APIC: 00 missing read_resources APIC: 01 missing read_resources APIC: 02 missing read_resources APIC: 03 missing read_resources Done reading resources. Setting resources... Done setting resources. Done allocating resources. POST: 0x88 Enabling resources... done.
Ok thank you for all your help. I can boot and run Linux 2.6.33 now and I see all four CPU cores in /proc/cpuinfo. I compiled and added SeaBIOS as payload for coreboot and it works. I also compiled and added GPXE to the image and was able to PXE-boot. However, there are a few problems:
- The server has 4x1GB memory, but I only see 1GB. Why? What can I do?
Send the complete boot log as an attachment and see if anyone can spot the reason.
- There is something wrong with the interrupts. When the kernel is
initializing the ethernet interfaces it says
"Determining IP information for eth0...Disabling IRQ #19"
Did you modify mptable.c and irq_tables.c for your board? The IRQ routing is probably different than what the s2881 has. You can run getpir and look in /proc/interrupts and lspci when you boot with the factory BIOS.
Perhaps the below excerp from the serial port output of coreboot is significant?
POST: 0x66 Allocating resources... Reading resources... APIC: 00 missing read_resources APIC: 01 missing read_resources APIC: 02 missing read_resources APIC: 03 missing read_resources
That's normal. The APICs don't have any PCI resources.
Thanks, Myles
Myles Watson wrote:
Ok thank you for all your help. I can boot and run Linux 2.6.33 now and I see all four CPU cores in /proc/cpuinfo. I compiled and added SeaBIOS as payload for coreboot and it works. I also compiled and added GPXE to the image and was able to PXE-boot. However, there are a few problems:
- The server has 4x1GB memory, but I only see 1GB. Why? What can I do?
Send the complete boot log as an attachment and see if anyone can spot the reason.
See attachment for my coreboot output. The server has 4x512MB (not 4x1GB) memory, and only half the memory is visible. The /var/log/messages in Linux says:
Scanning NUMA topology in Northbridge 24 Number of physical nodes 2 Node 0 MemBase 0000000000000000 Limit 000000003ffef000 Skipping disabled node 1 Using node hash shift of 63
I can see all four cores in /proc/cpuinfo and I can use them, but "numactl --hardware" shows that there is only one numa node detected, so something is wrong from BIOS.
- There is something wrong with the interrupts. When the kernel is
initializing the ethernet interfaces it says
"Determining IP information for eth0...Disabling IRQ #19"
Did you modify mptable.c and irq_tables.c for your board? The IRQ routing is probably different than what the s2881 has. You can run getpir and look in /proc/interrupts and lspci when you boot with the factory BIOS.
I'm not sure how those numbers and bitmasks in mptables.c, lspci, /proc/interrupts and irq_table.c correlate, but I'll keep trying to figure it out ... I have run getpir and mptable utilitys, but taking the output from these utilitys and putting it into the source tree will not make the server boot. I guess I need to study more exactly how this kind of hardware works, and how to interpret the tables and outputs from lspci.
My latest dl145 sourcecode directory is at the following URL in case someone is interested or could give me a hint: http://www.lysator.liu.se/~enok/dl145_g1/
The output of lspci and /proc/interrupts from a factory BIOS DL145G1 (with two single-core Opterons) looks like this:
[root@cl200 ~]# lspci -tv -[0000:00]-+-01.0-[0000:03]-- +-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-02.0-[0000:02]--+-03.0 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet | -03.1 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet +-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-06.0-[0000:01]--+-00.0 Advanced Micro Devices [AMD] AMD-8111 USB | +-00.1 Advanced Micro Devices [AMD] AMD-8111 USB | -04.0 ATI Technologies Inc Rage XL +-07.0 Advanced Micro Devices [AMD] AMD-8111 LPC +-07.1 Advanced Micro Devices [AMD] AMD-8111 IDE +-07.3 Advanced Micro Devices [AMD] AMD-8111 ACPI +-18.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-18.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-18.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller +-18.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control +-19.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-19.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-19.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller -19.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [root@cl200 ~]# cat /proc/interrupts CPU0 CPU1 0: 125 0 IO-APIC-edge timer 1: 13 27 IO-APIC-edge i8042 4: 0 1 IO-APIC-edge 8: 0 0 IO-APIC-edge rtc0 9: 0 0 IO-APIC-fasteoi acpi 14: 5819 6709 IO-APIC-edge ide0 15: 0 0 IO-APIC-edge ide1 19: 0 0 IO-APIC-fasteoi ohci_hcd:usb1, ohci_hcd:usb2 31: 1220580 993 IO-APIC-fasteoi eth0 NMI: 0 0 Non-maskable interrupts LOC: 997597 807576 Local timer interrupts SPU: 0 0 Spurious interrupts PMI: 0 0 Performance monitoring interrupts PND: 0 0 Performance pending work RES: 49543 65171 Rescheduling interrupts CAL: 55 85 Function call interrupts TLB: 2639 7498 TLB shootdowns TRM: 0 0 Thermal event interrupts THR: 0 0 Threshold APIC interrupts MCE: 0 0 Machine check exceptions MCP: 82 82 Machine check polls ERR: 0 MIS: 0
The same output from my dualcore DL145G1 with coreboot (booted with irqpoll kernel argument) looks as follows:
[root@cl199 ~]# lspci -tv -[0000:00]-+-01.0-[0000:01]----01.0 MYRICOM Inc. Myrinet 2000 Scalable Cluster Interconnect +-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-02.0-[0000:02]--+-03.0 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet | -03.1 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet +-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-03.0-[0000:03]--+-00.0 Advanced Micro Devices [AMD] AMD-8111 USB | +-00.1 Advanced Micro Devices [AMD] AMD-8111 USB | -04.0 ATI Technologies Inc Rage XL +-04.0 Advanced Micro Devices [AMD] AMD-8111 LPC +-04.1 Advanced Micro Devices [AMD] AMD-8111 IDE +-04.2 Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0 +-04.3 Advanced Micro Devices [AMD] AMD-8111 ACPI +-18.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-18.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-18.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller +-18.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control +-19.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration +-19.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map +-19.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller -19.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [root@cl199 ~]# cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 0: 218 0 0 0 IO-APIC-edge timer 1: 0 0 0 42 IO-APIC-edge i8042 2: 0 0 0 0 XT-PIC-XT cascade 4: 0 0 0 1 IO-APIC-edge 6: 0 0 0 3 IO-APIC-edge floppy 8: 0 0 0 0 IO-APIC-edge rtc0 12: 0 0 0 4 IO-APIC-edge i8042 14: 704 0 3 11547 IO-APIC-edge ide0 15: 0 0 0 0 IO-APIC-edge ide1 19: 0 1132 518 941 IO-APIC-fasteoi ohci_hcd:usb1, ohci_hcd:usb2 28: 0 0 0 0 IO-APIC-fasteoi eth0 NMI: 0 0 0 0 Non-maskable interrupts LOC: 895964 895791 895716 895639 Local timer interrupts SPU: 0 0 0 0 Spurious interrupts PMI: 0 0 0 0 Performance monitoring interrupts PND: 0 0 0 0 Performance pending work RES: 2850 3860 8762 3934 Rescheduling interrupts CAL: 106 42 87 104 Function call interrupts TLB: 275 878 275 831 TLB shootdowns TRM: 0 0 0 0 Thermal event interrupts THR: 0 0 0 0 Threshold APIC interrupts MCE: 0 0 0 0 Machine check exceptions MCP: 3 3 3 3 Machine check polls ERR: 0 MIS: 0
Myles Watson wrote:
Ok thank you for all your help. I can boot and run Linux 2.6.33 now and I see all four CPU cores in /proc/cpuinfo. I compiled and added SeaBIOS as payload for coreboot and it works. I also compiled and added GPXE to the image and was able to PXE-boot. However, there are a few problems:
- The server has 4x1GB memory, but I only see 1GB. Why? What can I do?
Send the complete boot log as an attachment and see if anyone can spot
the
reason.
See attachment for my coreboot output.
I'd use SPEW for the console log level until you get it all figured out. That way you can see some more of what's happening.
The server has 4x512MB (not 4x1GB) memory, and only half the memory is visible. The /var/log/messages in Linux says:
Have you tried different configurations? Coreboot is only seeing the RAM on node 0. Where is the RAM on your board?
Scanning NUMA topology in Northbridge 24 Number of physical nodes 2 Node 0 MemBase 0000000000000000 Limit 000000003ffef000 Skipping disabled node 1 Using node hash shift of 63
I can see all four cores in /proc/cpuinfo and I can use them, but "numactl --hardware" shows that there is only one numa node detected, so something is wrong from BIOS.
I think it just means that there's only memory on one node.
- There is something wrong with the interrupts. When the kernel is
initializing the ethernet interfaces it says
"Determining IP information for eth0...Disabling IRQ #19"
Did you modify mptable.c and irq_tables.c for your board? The IRQ
routing
is probably different than what the s2881 has. You can run getpir and
look
in /proc/interrupts and lspci when you boot with the factory BIOS.
I'm not sure how those numbers and bitmasks in mptables.c, lspci, /proc/interrupts and irq_table.c correlate, but I'll keep trying to figure it out ... I have run getpir and mptable utilitys, but taking the output from these utilitys and putting it into the source tree will not make the server boot. I guess I need to study more exactly how this kind of hardware works, and how to interpret the tables and outputs from lspci.
You'll need more verbose output from lspci to see interrupts. lspci -vv will show you the interrupt pin and which IRQ it's routed to.
The output of lspci and /proc/interrupts from a factory BIOS DL145G1 (with two single-core Opterons) looks like this:
[root@cl200 ~]# lspci -tv -[0000:00]-+-01.0-[0000:03]-- +-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-02.0-[0000:02]--+-03.0 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet | -03.1 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet +-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-06.0-[0000:01]--+-00.0 Advanced Micro Devices [AMD] AMD-8111 USB
...
The same output from my dualcore DL145G1 with coreboot (booted with irqpoll kernel argument) looks as follows:
[root@cl199 ~]# lspci -tv -[0000:00]-+-01.0-[0000:01]----01.0 MYRICOM Inc. Myrinet 2000 Scalable Cluster Interconnect
This device doesn't show up with the factory BIOS.
+-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-02.0-[0000:02]--+-03.0 Broadcom Corporation NetXtremeBCM5704 Gigabit Ethernet | -03.1 Broadcom Corporation NetXtreme BCM5704 Gigabit Ethernet +-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC +-03.0-[0000:03]--+-00.0 Advanced Micro Devices [AMD] AMD-8111 USB
These devices have a different offset. It may make it easier to debug interrupt settings if the HyperTransport bus gets enumerated the same way.
I think switching this back to 6 in Kconfig will make it match again.
config HT_CHAIN_END_UNITID_BASE hex # default 0x6 default 0x20 depends on BOARD_HP_DL145_G1
Miscellaneous Control> [root@cl200 ~]# cat /proc/interrupts CPU0 CPU1 0: 125 0 IO-APIC-edge timer 1: 13 27 IO-APIC-edge i8042 4: 0 1 IO-APIC-edge 8: 0 0 IO-APIC-edge rtc0 9: 0 0 IO-APIC-fasteoi acpi 14: 5819 6709 IO-APIC-edge ide0 15: 0 0 IO-APIC-edge ide1 19: 0 0 IO-APIC-fasteoi ohci_hcd:usb1, ohci_hcd:usb2 31: 1220580 993 IO-APIC-fasteoi eth0
[root@cl199 ~]# cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 0: 218 0 0 0 IO-APIC-edge timer 1: 0 0 0 42 IO-APIC-edge i8042 2: 0 0 0 0 XT-PIC-XT cascade 4: 0 0 0 1 IO-APIC-edge 6: 0 0 0 3 IO-APIC-edge floppy 8: 0 0 0 0 IO-APIC-edge rtc0 12: 0 0 0 4 IO-APIC-edge i8042 14: 704 0 3 11547 IO-APIC-edge ide0 15: 0 0 0 0 IO-APIC-edge ide1 19: 0 1132 518 941 IO-APIC-fasteoi ohci_hcd:usb1, ohci_hcd:usb2 28: 0 0 0 0 IO-APIC-fasteoi eth0
I haven't played with mptables or pirq very much. A couple of things from mptable.c: /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ //8111 LPC ???? smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|0, apicid_8111, 0x13);
pin A = 0 pin B = 1 pin C = 2 pin D = 3
IRQ = (device <<2) | pin
The things you should have to play with most are the IRQ and the PIN#. The bus number should be a little more obvious. So this entry says to write an interrupt entry for the device at sysconf.sbdn+1 pin A to the APIC for the 81111, interrupt 0x13.
sysconf.sbdn should be the base device of the 8111 (6 if you switch it back.)
For your eth0, you should be able to modify one of these pieces:
This one assigns the interrupts from bus_8131_2, device 3 (A-D) to pins 0-3 on the APIC apicid_8131_2, which starts at 28 because of previous APICs and the interrupts they've taken.
//Slot 1 PCI-X 133/100/66 or Side 1 on raiser card for(i=0;i<4;i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|i, apicid_8131_2, (0+i)%4); //28 }
You might want to do ACPI instead. I've been able to find documentation and tools more easily for ACPI.
Thanks, Myles
BTW:
It would be easier for me to see what was going on if we could pass back and forth patches to the tree that apply to the s2881's directory. Then when we're ready to commit there will be a lot less to review.
Here's one way to do that:
svn cp src/mainboard/tyan/s2881 src/mainboard/hp/dl145
Copy all of the files you've changed into that directory, replacing the ones that are there.
from the top level:
svn diff > dl145.diff
Then I can do the same svn cp and apply the patch if I want to build it.
Thanks, Myles
Ok I have made some progress: I finally tweaked mptable.c and devicetree.cb so that all peripherals work: The two ethernet NIC's, the Myrinet PCI-X card, IDE, USB and keyboard. Even the ILO (IPMI) card works fine with the ipmi driver in Linux 2.6.33.
I don't know why lspci reports that all IRQ pins have been routed to IRQ 0 though (?): [root@cl199 ~]# lspci -b -vvv | grep IRQ Interrupt: pin ? routed to IRQ 255 Interrupt: pin D routed to IRQ 0 Interrupt: pin A routed to IRQ 0 Interrupt: pin A routed to IRQ 0 Interrupt: pin B routed to IRQ 0 Interrupt: pin D routed to IRQ 0 Interrupt: pin D routed to IRQ 0 Interrupt: pin A routed to IRQ 0
with the factory BIOS is looks like this: [root@cl001 ~]# lspci -b -vvv | grep IRQ Interrupt: pin ? routed to IRQ 255 Interrupt: pin D routed to IRQ 10 Interrupt: pin D routed to IRQ 10 Interrupt: pin A routed to IRQ 11 Interrupt: pin A routed to IRQ 10 Interrupt: pin B routed to IRQ 11 Interrupt: pin A routed to IRQ 9
ACPI doesn't work (yet), but it just worked partially with the factory BIOS anyway. The SMBus and I2C devices work (they never worked with the factory BIOS).
The memory problem remains though. If only that can be solved, then I'm basically satisfied. Any hints?
Have you tried different configurations? Coreboot is only seeing the RAM on node 0. Where is the RAM on your board?
I use four 512MB DIMM's, two on each CPU, so there is one DIMM per channel. The DIMM's on CPU 0 are detected but the DIMM's on CPU 1 are not. If I move all four DIMM's to CPU0 then coreboot detects 2GB but hangs when initializing the memory. The same thing happens if I use two 1GB DIMM's.
Something is wrong with the way memory is detected on the second CPU, that's for sure. This is from dmesg:
BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 000000000009fc00 (usable) BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved) BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 000000003ffef000 (usable) BIOS-e820: 000000003ffef000 - 0000000040000000 (reserved) ... EDAC MC: Ver: 2.1.0 Aug 11 2010 EDAC amd64_edac: Ver: 3.3.0 Aug 11 2010 EDAC amd64: ECC is enabled by BIOS. EDAC amd64: This node reports that Memory ECC is currently disabled, set F3x44[22] (0000:00:19.3). EDAC amd64: ECC disabled in the BIOS or no ECC capability, module will not load. Either enable ECC checking or force module loading by setting 'ecc_enable_override'. (Note that use of the override may cause unknown side effects.) amd64_edac: probe of 0000:00:19.2 failed with error -22 EDAC MC: Rev E or earlier detected EDAC MC0: Giving out device to 'amd64_edac' 'RevF': DEV 0000:00:18.2 EDAC PCI0: Giving out device to module 'amd64_edac' controller 'EDAC PCI controller': DEV '0000:00:18.2' (POLLED)
The output from "svn diff src/mainboard" is in attachment 1 The console output "SPEW" level from coreboot is in attachment 2
Thanks.
Ok I have made some progress: I finally tweaked mptable.c and devicetree.cb so that all peripherals work: The two ethernet NIC's, the Myrinet PCI-X card, IDE, USB and keyboard. Even the ILO (IPMI) card works fine with the ipmi driver in Linux 2.6.33.
Congratulations.
I don't know why lspci reports that all IRQ pins have been routed to IRQ 0 though (?):
I don't know where lspci gets its values. It could be interesting to track it down, but if it works...
ACPI doesn't work (yet), but it just worked partially with the factory BIOS anyway. The SMBus and I2C devices work (they never worked with the factory BIOS).
The memory problem remains though. If only that can be solved, then I'm basically satisfied. Any hints?
Have you tried different configurations? Coreboot is only seeing the
RAM on
node 0. Where is the RAM on your board?
I use four 512MB DIMM's, two on each CPU, so there is one DIMM per channel. The DIMM's on CPU 0 are detected but the DIMM's on CPU 1 are not.
It's possible that there is a mux in the way that needs to be set up correctly to allow you to read the DIMMs on the other CPU.
If I move all four DIMM's to CPU0 then coreboot detects 2GB but hangs when initializing the memory.
That sounds like a different problem. Maybe the mux idea isn't right.
The same thing happens if I use two 1GB DIMM's.
I'd start by enabling the debugging output CONFIG_DEBUG_SMBUS. I haven't had to dig very much in that part of the code.
Thanks, Myles
On 16.08.2010 21:15, Myles Watson wrote:
The memory problem remains though. If only that can be solved, then I'm basically satisfied. Any hints?
Have you tried different configurations? Coreboot is only seeing the RAM on node 0. Where is the RAM on your board?
I use four 512MB DIMM's, two on each CPU, so there is one DIMM per channel. The DIMM's on CPU 0 are detected but the DIMM's on CPU 1 are not.
It's possible that there is a mux in the way that needs to be set up correctly to allow you to read the DIMMs on the other CPU.
If I move all four DIMM's to CPU0 then coreboot detects 2GB but hangs when initializing the memory.
That sounds like a different problem. Maybe the mux idea isn't right.
Very odd. Enabling DRAM debugging is a good idea. By the way, please check if the SPDs for all DIMMs match. If the DIMMs are just compatible and not identical, coreboot may have problems detecting all RAM. OTOH, if all visible (from a SPD perspective) DIMMs are also present in the computed memory count, your problem is unrelated to what I suggested.
Regards, Carl-Daniel
Carl-Daniel Hailfinger wrote:
On 16.08.2010 21:15, Myles Watson wrote:
The memory problem remains though. If only that can be solved, then I'm basically satisfied. Any hints?
Have you tried different configurations? Coreboot is only seeing the RAM on node 0. Where is the RAM on your board?
I use four 512MB DIMM's, two on each CPU, so there is one DIMM per channel. The DIMM's on CPU 0 are detected but the DIMM's on CPU 1 are not.
It's possible that there is a mux in the way that needs to be set up correctly to allow you to read the DIMMs on the other CPU.
If I move all four DIMM's to CPU0 then coreboot detects 2GB but hangs when initializing the memory.
That sounds like a different problem. Maybe the mux idea isn't right.
Very odd. Enabling DRAM debugging is a good idea. By the way, please check if the SPDs for all DIMMs match. If the DIMMs are just compatible and not identical, coreboot may have problems detecting all RAM. OTOH, if all visible (from a SPD perspective) DIMMs are also present in the computed memory count, your problem is unrelated to what I suggested.
Regards, Carl-Daniel
I think Myles was right, there is a i2c mux in this server that somehow multiplexes DIMM devices on the i2c bus. I was able to guess which i2c ports contain the DIMM info, and which port is the mux, then added the mux to devicetree.cb and the DIMM ports under it. Now I'm able to use memory from both CPU's, at least for the combination of DIMM's I have (2x2x1GB and 2x2x512MB).
So I'm basically able to use these servers now. I would love to have ACPI and Cool'nQuiet of course, perhaps I'll try to do that later.
Thanks very much for all help! If you want me to commit the new mainboard to your svn repository let me know.
Best regards. /Oskar
I think Myles was right, there is a i2c mux in this server that somehow multiplexes DIMM devices on the i2c bus. I was able to guess which i2c ports contain the DIMM info, and which port is the mux, then added the mux to devicetree.cb and the DIMM ports under it. Now I'm able to use memory from both CPU's, at least for the combination of DIMM's I have (2x2x1GB and 2x2x512MB).
I'm glad it worked out!
So I'm basically able to use these servers now. I would love to have ACPI and Cool'nQuiet of course, perhaps I'll try to do that later.
Thanks very much for all help! If you want me to commit the new mainboard to your svn repository let me know.
Yes, please. If you'll send your latest patch with a Signed-off-by: line, I'll take it from there.
Thanks, Myles
I forgot DEBUG_RAM_SETUP.
Thanks, Myles
I think this patch is the same as yours, but with some commented out code removed.
I made some white space changes to the s2881 so that it would be easier to see your changes to devicetree.cb.
When you send patches to the list, you should add a Signed-off-by: line, even if it isn't ready to be committed. I'm not adding one because it's your patch :)
Thanks, Myles
-
Andrew -
Carl-Daniel Hailfinger -
Myles Watson -
Oskar Enoksson -
Paul Menzel -
ron minnich