Hi, all, Marc and Yinghai,
We are adapting LB for AMD Herring board based on Turion 64x2 and 690/600. Now we have two questions, could you give us some guide?
1. How to enable the VGA controller on 690? LB has detected the controller, from the previous experience, we seem to need a VBIOS to initialize the controller. But the controller is integrated into the 690, can we handle it just like an onboard controller and put VBIOS at 0xfff80000 and run VBIOS in the function of dev_initialize?
2. 600 is attached to 690 via A-Link, from my understanding, 600 should be on another PCI bus, but from the LB trace, it seems 600 is still on PCI bus 0. Why? The 690 Datasheet says NB/SB Link P2P bridge is hidden by default, is this the reason?
Thanks.
Best Regards
丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406
Hi,
On Mon, Mar 03, 2008 at 06:04:01PM +0800, Feng, Libo wrote:
We are adapting LB for AMD Herring board based on Turion 64x2 and 690/600.
Good news! :)
- How to enable the VGA controller on 690? LB has detected the
controller, from the previous experience, we seem to need a VBIOS to initialize the controller. But the controller is integrated into the 690, can we handle it just like an onboard controller and put VBIOS at 0xfff80000 and run VBIOS in the function of dev_initialize?
Yes, including a copy of the VGA BIOS into coreboot is one way to make it work. Note that for this to be really useful AMD would need to allow distribution of the VGA BIOS for the 690 - which may or may not be possible. (Not possible for Geode for example.)
Another way is to write native graphics drivers for coreboot, Linux framebuffer and X.org. This is how the Geode works, except there is no coreboot driver so the graphics controller is not initialized at boot until the Linux kernel framebuffer driver has started.
Personally I prefer this over including a VGA BIOS, but unless someone also writes a coreboot graphics driver there will be the drawback of having no graphics at all during the potentially sensitive step of starting the payload. (If the payload doesn't work as intendend, many users will require graphics to proceed.)
- 600 is attached to 690 via A-Link, from my understanding, 600
should be on another PCI bus, but from the LB trace, it seems 600 is still on PCI bus 0. Why? The 690 Datasheet says NB/SB Link P2P bridge is hidden by default, is this the reason?
I don't know anything about the 690/600 interconnect so I can only guess here - but you are correct that devices behind a hidden bridge will appear on the same bus as the bridge.
//Peter
Hi,
On 03.03.2008 11:04, Feng, Libo wrote:
We are adapting LB for AMD Herring board based on Turion 64x2 and 690/600.
Great!
Now we have two questions, could you give us some guide?
- How to enable the VGA controller on 690? LB has detected the controller, from the previous experience, we seem to need a VBIOS to initialize the controller. But the controller is integrated into the 690, can we handle it just like an onboard controller and put VBIOS at 0xfff80000 and run VBIOS in the function of dev_initialize?
VGA initialization has changed in latest svn. Which svn revision are you using? You may want to skip VGA initialization for now. It is easier to get the rest working first.
- 600 is attached to 690 via A-Link,
A-Link or A-Link Xpress? If it is the latter, it is a PCI-Express link.
from my understanding, 600 should be on another PCI bus, but from the LB trace, it seems 600 is still on PCI bus 0. Why? The 690 Datasheet says NB/SB Link P2P bridge is hidden by default, is this the reason?
If you post a boot log and/or a patch against latest svn, we can probably help.
Regards, Carl-Daniel