Patch set updated for coreboot: 4d49eb9 armv7/snow: Remove unused modules in bootblock and romstage.

[David Hendricks]

David Hendricks ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2322

-gerrit

commit 4d49eb9050d77567c77bdffc73e5c12852cd209c
Author: Hung-Te Lin 
Date:   Fri Feb 8 13:49:10 2013 +0800

armv7/snow: Remove unused modules in bootblock and romstage.

For Exynos/snow, cpu_info and power modules and also some parts of
    the GPIO API (which require timer and pwm modules) are not used in the
    current bootblock. Clock init only needs to be used if early console
    is enabled.

Now our bootblock is 22420 bytes with early serial console and 11192
    bytes without. Those include the 8KB BL1 region.

Change-Id: I9c958dafb9cf522df0dcfbef373ce741aa162544
    Signed-off-by: Hung-Te Lin 
    Signed-off-by: David Hendricks 
---
 src/cpu/samsung/exynos5250/Makefile.inc | 15 ++++++---------
 src/cpu/samsung/s5p-common/Makefile.inc |  5 ++---
 src/cpu/samsung/s5p-common/s5p_gpio.c   |  7 +++++++
 3 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index 13baa7e..0a58c0c 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -3,23 +3,20 @@
 # image outside of CBFS
 #INTERMEDIATE += exynos5250_add_bl1

-# Clock init is done in bootblock to support UART output for
-# debugging. We may add a Kconfig option to disable clock init
-# in the bootblock and try moving it entirely into romstage.
-bootblock-y += clock_init.c
-bootblock-y += clock.c
 bootblock-y += pinmux.c
-bootblock-y += soc.c
+# Clock is required for UART
+bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c
 bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c

romstage-y += clock.c
 romstage-y += clock_init.c
+romstage-y += pinmux.c  # required by s3c24x0_i2c (s5p-common) and uart.
 romstage-y += exynos_cache.c
-romstage-y += pinmux.c
-romstage-y += power.c
-romstage-y += soc.c
 romstage-y += dmc_common.c
 romstage-y += dmc_init_ddr3.c
+romstage-$(CONFIG_EARLY_CONSOLE) += soc.c
 romstage-$(CONFIG_EARLY_CONSOLE) += uart.c

#ramstage-y += tzpc_init.c
diff --git a/src/cpu/samsung/s5p-common/Makefile.inc b/src/cpu/samsung/s5p-common/Makefile.inc
index 0f4200c..118dd47 100644
--- a/src/cpu/samsung/s5p-common/Makefile.inc
+++ b/src/cpu/samsung/s5p-common/Makefile.inc
@@ -1,8 +1,7 @@
-bootblock-y += pwm.c
 bootblock-y += s5p_gpio.c
-bootblock-y += timer.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += pwm.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += timer.c

-romstage-y += cpu_info.c
 romstage-y += pwm.c	# needed by timer.c
 romstage-y += s5p_gpio.c
 romstage-y += timer.c
diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c
index e91b9df..8daae59 100644
--- a/src/cpu/samsung/s5p-common/s5p_gpio.c
+++ b/src/cpu/samsung/s5p-common/s5p_gpio.c
@@ -414,6 +414,12 @@ int gpio_set_value(unsigned gpio, int value)
  */
 #define GPIO_DELAY_US 5

+#ifndef __BOOT_BLOCK__
+/*
+ * FIXME(dhendrix): These functions use udelay, which has dependencies on
+ * pwm code and timer code. These aren't necessary for the bootblock and
+ * bloat the image significantly.
+ */
 int gpio_read_mvl3(unsigned gpio)
 {
    int high, low;
@@ -476,6 +482,7 @@ int gpio_decode_number(unsigned gpio_list[], int count)

return result;
 }
+#endif	/* __BOOT_BLOCK__ */

static const char *get_cfg_name(int cfg)
 {