While I try to help Roger with his raminit problems and/or port coreboot to SIS630, I also want to get the SCSI part of my P2B-LS fully working. This also means implementing an option table for this board.
I am looking for pointers on what to read to know the relationships between option tables, cmos.layout, and where to implement a new option, especially one that isn't directly related to the southbridge, or is board specific.
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For the last few times I have tried leaving the SCSI part enabled on the board, I am getting lots of noise from the linux aic78xx driver, and the SCSI BIOS, extracted from OEM BIOS image and added to the coreboot image, wouldn't even run properly. I know the factory BIOS provides a setting to control the onboard termination of 2 of the 3 SCSI ports on the board (the third is always terminated), and I'm suspecting this is what making SCSI fail. So I have to implement it. This is where the option table comes in to play.
Meanwhile I am mapping out where all the factory BIOS settings are in the nvram, so I can get the eventual cmos.layout as close to OEM as possible. I got some of it mapped out, by painstakingly toggling every option in its setup screen that won't immediately brick my test machine and taking a before and after nvram dump, looking for differences.
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Thanks Keith
Hi Keith,
On 1/2/11 3:59 AM, Keith Hui wrote:
I also want to get the SCSI part of my P2B-LS fully working. This also means implementing an option table for this board.
Why would that be required?
I am looking for pointers on what to read to know the relationships between option tables, cmos.layout, and where to implement a new option, especially one that isn't directly related to the southbridge, or is board specific.
See for example src/mainboard/kontron/986lcd-m/romstage.c and src/mainboard/kontron/986lcd-m/cmos.layout for some mainboard specific options.
For the last few times I have tried leaving the SCSI part enabled on the board, I am getting lots of noise from the linux aic78xx driver, and the SCSI BIOS, extracted from OEM BIOS image and added to the coreboot image, wouldn't even run properly.
This is where you'd want to start debugging, which of course would need some more detailed information. "wouldn't run properly" is not good enough for an error report. A log file might be better. Is this with SeaBIOS? Or with coreboot? With Yabel? Or native?
Meanwhile I am mapping out where all the factory BIOS settings are in the nvram, so I can get the eventual cmos.layout as close to OEM as possible. I got some of it mapped out, by painstakingly toggling every option in its setup screen that won't immediately brick my test machine and taking a before and after nvram dump, looking for differences.
Not sure what your goal is with this, but it sounds like there might be a better way to achieve this.
Stefan
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Keith Hui -
Stefan Reinauer