Hello Ladies and Gentlemen:
I am trying to do the porting of a computer module based on Intel CoffeeLake/QM370. I don't have the schematics. I was trying to find out how to extract/dump the overcurrent pin mapping from the system, but I was unable to find this information. I need this configuration to correctly set the USB configuration in the devicetree.cb.
In older systems previous to Skylake this information was in the RCBA (dumped by inteltool), but there is no RCBA in newer chipsets.
Anyone can help me in providing the steps?
Thank you, Jose Trujillo.
Hello Jose,
On 13.12.2022 14:01, Jose Trujillo via coreboot wrote:
Hello Ladies and Gentlemen:
I am trying to do the porting of a computer module based on Intel CoffeeLake/QM370. I don't have the schematics. I was trying to find out how to extract/dump the overcurrent pin mapping from the system, but I was unable to find this information. I need this configuration to correctly set the USB configuration in the devicetree.cb.
In older systems previous to Skylake this information was in the RCBA (dumped by inteltool), but there is no RCBA in newer chipsets.
Anyone can help me in providing the steps?
These registers are located in the XHCI PCI space, see https://www.intel.pl/content/www/pl/pl/products/docs/chipsets/300-series-chi... section 20.1.36 and 20.1.37.
The location may change depending on microarchitecture though (I recall OC mapping being moved to XHCI MMIO space, e.g. on Alder Lake S).
Best regards,
Dear Michal:
Thank you very much!
I found it at page 845 (21.1.36, 21.1.37) of the Intel 300 PCH Datasheet Vol. 2 that you gently provided.
I got the configurations from the lspci.log / xHCI Host Controller offsets 0xB0h and 0xD0h and I set them into my devicetree.
Have a nice day, Jose Trujillo.
On 14.12.2022 15:38, Jose Trujillo via coreboot wrote:
Dear Michal:
Thank you very much!
I found it at page 845 (21.1.36, 21.1.37) of the Intel 300 PCH Datasheet Vol. 2 that you gently provided.
Weird, for me it displays the registers under sections 20.1.36 and 20.1.37 on pages 991-992... It is supposed to be the same public datasheet. Is Intel providing different versions of datasheets based on location (?) where the datasheet is accessed? That would be interesting...
Anyway, I'm glad I could help.
Best regards,
michal.zygowski@3mdeb.com wrote:
Weird, for me it displays the registers under sections 20.1.36 and 20.1.37 on pages 991-992... It is supposed to be the same public datasheet. Is Intel providing different versions of datasheets based on location (?)
No. I already had this old datasheet from 2018. But today I downloaded the datasheet from your link and looks the same as yours.
Anyway, I'm glad I could help.
Thanks a lot! Jose Trujillo.