Author: rminnich Date: 2008-08-03 21:39:35 +0200 (Sun, 03 Aug 2008) New Revision: 716
Modified: coreboot-v3/southbridge/nvidia/mcp55/mcp55.c coreboot-v3/southbridge/nvidia/mcp55/mcp55.h coreboot-v3/southbridge/nvidia/mcp55/stage1.c Log: Closer to compiling. Will be bringing in the rest of the functions for this part today.
Signed-off-by: Ronald G. Minnich rminnich@gmail.com Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Modified: coreboot-v3/southbridge/nvidia/mcp55/mcp55.c =================================================================== --- coreboot-v3/southbridge/nvidia/mcp55/mcp55.c 2008-08-03 19:36:53 UTC (rev 715) +++ coreboot-v3/southbridge/nvidia/mcp55/mcp55.c 2008-08-03 19:39:35 UTC (rev 716) @@ -21,32 +21,36 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#include <console/console.h> +#include <console.h>
-#include <arch/io.h> +#include <io.h>
#include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> #include "mcp55.h"
-static uint32_t final_reg; +static u32 final_reg;
-static device_t find_lpc_dev( device_t dev, unsigned devfn) +static struct device *find_lpc_dev( struct device *dev, unsigned devfn) {
- device_t lpc_dev; + struct device *lpc_dev;
lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
if ( !lpc_dev ) return lpc_dev; - - if ((lpc_dev->vendor != PCI_VENDOR_ID_NVIDIA) || ( - (lpc_dev->device < PCI_DEVICE_ID_NVIDIA_MCP55_LPC) || - (lpc_dev->device > PCI_DEVICE_ID_NVIDIA_MCP55_PRO) + /* it had better be a PCI device */ + if ( lpc_dev->id.type != DEVICE_ID_PCI) + return lpc_dev; + /* the range makes it hard to use the library function. Sorry. + * I realize this is not pretty. It would be nice if we could + * use anonymous unions. + */ + if ((lpc_dev->id.u.pci.vendor != PCI_VENDOR_ID_NVIDIA) || ( + (lpc_dev->id.u.pci.device < PCI_DEVICE_ID_NVIDIA_MCP55_LPC) || + (lpc_dev->id.u.pci.device > PCI_DEVICE_ID_NVIDIA_MCP55_PRO) ) ) { - uint32_t id; + u32 id; id = pci_read_config32(lpc_dev, PCI_VENDOR_ID); if ( (id < (PCI_VENDOR_ID_NVIDIA | (PCI_DEVICE_ID_NVIDIA_MCP55_LPC << 16))) || (id > (PCI_VENDOR_ID_NVIDIA | (PCI_DEVICE_ID_NVIDIA_MCP55_PRO << 16))) @@ -58,30 +62,31 @@ return lpc_dev; }
-static void mcp55_enable(device_t dev) +static void mcp55_enable(struct device *dev) { - device_t lpc_dev = 0; - device_t sm_dev = 0; + struct device *lpc_dev = 0; + struct device *sm_dev = 0; unsigned index = 0; unsigned index2 = 0; - uint32_t reg_old, reg; - uint8_t byte; + u32 reg_old, reg; + u8 byte; unsigned deviceid; unsigned vendorid;
struct southbridge_nvidia_mcp55_config *conf; - conf = dev->chip_info; + conf = dev->device_configuration; int i;
unsigned devfn;
- if(dev->device==0x0000) { + /* sorry. Again, anonymous unions etc. would make this easier. */ + if(dev->id.u.pci.device==0x0000) { vendorid = pci_read_config32(dev, PCI_VENDOR_ID); deviceid = (vendorid>>16) & 0xffff; // vendorid &= 0xffff; } else { // vendorid = dev->vendor; - deviceid = dev->device; + deviceid = dev->id.u.pci.device; }
devfn = (dev->path.u.pci.devfn) & ~7; @@ -245,7 +250,7 @@ struct device_operations nvidia_ops = { .id = {.type = DEVICE_ID_PCI, .u = {.pci = {.vendor = PCI_VENDOR_ID_NVIDIA, - .device = PCI_DEVICE_ID_NVIDIA_MCP55_PCIBRIDGE}}}, + .device = PCI_DEVICE_ID_NVIDIA_MCP55_PCI}}}, .constructor = default_device_constructor, .phase3_scan = scan_static_bus, .phase4_read_resources = pci_dev_read_resources,
Modified: coreboot-v3/southbridge/nvidia/mcp55/mcp55.h =================================================================== --- coreboot-v3/southbridge/nvidia/mcp55/mcp55.h 2008-08-03 19:36:53 UTC (rev 715) +++ coreboot-v3/southbridge/nvidia/mcp55/mcp55.h 2008-08-03 19:39:35 UTC (rev 716) @@ -22,6 +22,6 @@ #ifndef MCP55_H #define MCP55_H
-void mcp55_enable(device_t dev);
+ #endif /* MCP55_H */
Modified: coreboot-v3/southbridge/nvidia/mcp55/stage1.c =================================================================== --- coreboot-v3/southbridge/nvidia/mcp55/stage1.c 2008-08-03 19:36:53 UTC (rev 715) +++ coreboot-v3/southbridge/nvidia/mcp55/stage1.c 2008-08-03 19:39:35 UTC (rev 716) @@ -19,6 +19,17 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <console.h> +#include <io.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <amd/k8/k8.h> +#include "mcp55.h" + +#warning fix disgusting define of MCP55_NUM it is mainboard dependent +#define MCP55_NUM 1 static int set_ht_link_mcp55(u8 ht_c_num) { unsigned vendorid = 0x10de; @@ -107,7 +118,7 @@ for(j = 0; j < mcp55_num; j++ ) { setup_resource_map_offset(ctrl_devport_conf, sizeof(ctrl_devport_conf)/sizeof(ctrl_devport_conf[0]), - PCI_DEV(busn[j], devn[j], 0) , io_base[j]); + PCI_BDF(busn[j], devn[j], 0) , io_base[j]); } }
@@ -124,7 +135,7 @@ for(j = 0; j < mcp55_num; j++ ) { setup_resource_map_offset(ctrl_devport_conf_clear, sizeof(ctrl_devport_conf_clear)/sizeof(ctrl_devport_conf_clear[0]), - PCI_DEV(busn[j], devn[j], 0) , io_base[j]); + PCI_BDF(busn[j], devn[j], 0) , io_base[j]); }
@@ -144,8 +155,10 @@ u32 pll_ctrl; u32 dword; int i; - device_t dev; - dev = PCI_DEV(busnx, devnx+1, 1); + //struct device dev; + struct device *dev; +#error dev is not set up + // dev = PCI_BDF(busnx, devnx+1, 1); dword = pci_read_config32(dev, 0xe4); dword |= 0x3f0; // disable it at first pci_write_config32(dev, 0xe4, dword); @@ -328,23 +341,23 @@ mcp55_early_pcie_setup(busn[j], devn[j], io_base[j] + ANACTRL_IO_BASE, pci_e_x[j]);
setup_resource_map_x_offset(ctrl_conf_1, sizeof(ctrl_conf_1)/sizeof(ctrl_conf_1[0]), - PCI_DEV(busn[j], devn[j], 0), io_base[j]); + PCI_BDF(busn[j], devn[j], 0), io_base[j]); for(i=0; i<3; i++) { // three SATA setup_resource_map_x_offset(ctrl_conf_1_1, sizeof(ctrl_conf_1_1)/sizeof(ctrl_conf_1_1[0]), - PCI_DEV(busn[j], devn[j], i), io_base[j]); + PCI_BDF(busn[j], devn[j], i), io_base[j]); } if(busn[j] == 0) { setup_resource_map_x_offset(ctrl_conf_mcp55_only, sizeof(ctrl_conf_mcp55_only)/sizeof(ctrl_conf_mcp55_only[0]), - PCI_DEV(busn[j], devn[j], 0), io_base[j]); + PCI_BDF(busn[j], devn[j], 0), io_base[j]); }
if( (busn[j] == 0) && (mcp55_num>1) ) { setup_resource_map_x_offset(ctrl_conf_master_only, sizeof(ctrl_conf_master_only)/sizeof(ctrl_conf_master_only[0]), - PCI_DEV(busn[j], devn[j], 0), io_base[j]); + PCI_BDF(busn[j], devn[j], 0), io_base[j]); }
setup_resource_map_x_offset(ctrl_conf_2, sizeof(ctrl_conf_2)/sizeof(ctrl_conf_2[0]), - PCI_DEV(busn[j], devn[j], 0), io_base[j]); + PCI_BDF(busn[j], devn[j], 0), io_base[j]);
}
@@ -395,8 +408,9 @@ busnx = ht_c_index * HT_CHAIN_BUSN_D; for(devnx=0;devnx<0x20;devnx++) { u32 id; - device_t dev; - dev = PCI_DEV(busnx, devnx, 0); + struct device *dev; +#error dev is not set up + // dev = PCI_BDF(busnx, devnx, 0); id = pci_read_config32(dev, PCI_VENDOR_ID); if(id == 0x036910de) { busn[mcp55_num] = busnx; @@ -410,7 +424,7 @@ }
out: - print_debug("mcp55_num:"); print_debug_hex8(mcp55_num); print_debug("\r\n"); + printk(BIOS_DEBUG, "mcp55_num: %d\n", mcp55_num);
mcp55_early_set_port(mcp55_num, busn, devn, io_base); mcp55_early_setup(mcp55_num, busn, devn, io_base, pci_e_x);